2015-06-29 Richard Biener <rguenther@suse.de>
PR tree-optimization/66677
* tree-vect-stmts.c (vect_transform_stmt): Make assert about
STMT_VINFO_VEC_STMT clobbering less strict.
* gcc.dg/vect/pr66677.c: New testcase.
From-SVN: r225112
gcc/ChangeLog:
2015-06-29 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/64130
* tree-vrp.c (extract_range_from_binary_expr_1): For unsigned
division, compute max and min when value ranges for dividend and
divisor are available.
gcc/testsuite/ChangeLog:
2015-06-29 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/64130
* gcc.dg/tree-ssa/pr64130.c: New test.
From-SVN: r225108
PR c++/66255
* pt.c (check_unstripped_args): Split out from...
(retrieve_specialization): ...here. Allow typedefs in the type of
a non-type argument.
From-SVN: r225084
2015-06-26 Martin Jambor <mjambor@suse.cz>
PR debug/66301
* tree-ssa-pre.c (before_dom_children): Check that dump_file is not
NULL instead of calling dump_enabled_p.
From-SVN: r225019
2015-06-26 Jiong Wang <jiong.wang@arm.com>
gcc/
* config/aarch64/aarch64-protos.h (aarch64_symbol_type): New type
SYMBOL_SMALL_GOT_28K.
* config/aarch64/aarch64.md: (ldr_got_small_<mode>): Support new GOT
relocation modifiers.
(unspec): New enum "UNSPEC_GOTMALLPIC28K.
(ldr_got_small_28k_<mode>): New.
(ldr_got_small_28k_sidi): New.
* config/aarch64/iterators.md (got_modifier): New mode iterator.
* config/aarch64/aarch64-otps.h (aarch64_code_model): New model.
* config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Support
SYMBOL_SMALL_GOT_28K.
(aarch64_rtx_costs): Add costs for new instruction sequences.
(initialize_aarch64_code_model): Initialize new model.
(aarch64_classify_symbol): Recognize new model and new symbol classification.
(aarch64_asm_preferred_eh_data_format): Support new model.
(aarch64_load_symref_appropriately): Generate new instruction
sequences for -fpic.
(TARGET_USE_PSEUDO_PIC_REG): New definition.
(aarch64_use_pseudo_pic_reg): New function.
gcc/testsuite/
* gcc.target/aarch64/pic-small.c: New testcase.
From-SVN: r225017
gcc/
* config/aarch64/aarch64-protos.h (tune_params): Remove
const from members.
(aarch64_tune_params): Remove const, change to no longer be
a pointer.
* config/aarch64/aarch64.c (aarch64_tune_params): Remove const,
change to no longer be a pointer, initialize to generic_tunings.
(aarch64_min_divisions_for_recip_mul): Change dereference of
aarch64_tune_params to member access.
(aarch64_reassociation_width): Likewise.
(aarch64_rtx_mult_cost): Likewise.
(aarch64_address_cost): Likewise.
(aarch64_branch_cost): Likewise.
(aarch64_rtx_costs): Likewise.
(aarch64_register_move_cost): Likewise.
(aarch64_memory_move_cost): Likewise.
(aarch64_sched_issue_rate): Likewise.
(aarch64_builtin_vectorization_cost): Likewise.
(aarch64_override_options): Take a copy of the selected tuning
struct in to aarch64_tune_params, rather than just setting
a pointer, change dereferences of aarch64_tune_params to member
accesses.
(aarch64_override_options_after_change): Change dereferences of
aarch64_tune_params to member access.
(aarch64_macro_fusion_p): Likewise.
(aarch_macro_fusion_pair_p): Likewise.
* config/aarch64/cortex-a57-fma-steering.c (gate): Likewise.
From-SVN: r225016
2015-06-26 Richard Biener <rguenther@suse.de>
* fold-const.c (fold_binary_loc): Remove -A CMP -B -> A CMP B
and -A CMP CST -> A CMP -CST which is redundant with a pattern
in match.pd.
Move (A | C) == D where C & ~D != 0 -> 0, (X ^ Y) ==/!= 0 -> X ==/!= Y,
(X ^ Y) ==/!= {Y,X} -> {X,Y} ==/!= 0 and
(X ^ C1) op C2 -> X op (C1 ^ C2) to ...
* match.pd: ... patterns here.
* gcc.dg/tree-ssa/forwprop-25.c: Adjust.
From-SVN: r225007
* gcc-interface/trans.c (Handled_Sequence_Of_Statements_to_gnu): When
not optimizing the CFG, clear the DECL_DECLARED_INLINE_P flag on the
at-end procedures.
From-SVN: r225004
* gcc-interface/gigi.h (create_var_decl_1): Rename into...
(create_var_decl): ...this. Add default value for last parameter.
(create_type_stub_decl): Adjust.
(create_type_decl): Likewise.
(create_field_decl): Likewise.
(create_param_decl): Likewise.
(create_label_decl): Likewise.
(create_subprog_decl): Likewise.
* gcc-interface/utils.c (create_var_decl_1): Rename into...
(create_var_decl): ...this. Rename var_name into name and var_init
into init, move const_decl_allowed_p last and adjust accordingly.
(create_type_stub_decl): Rename type_name into name and adjust.
(create_type_decl): Likewise.
(create_field_decl): Likewise for field_name and field_type.
(create_param_decl): Likewise for param_name and param_type.
(create_label_decl): Likewise for label_name.
(create_subprog_decl): Likewise for subprog_name and subprog_type.
* gcc-interface/decl.c (gnat_to_gnu_entity): Adjust couple of calls
to create_var_decl_1.
From-SVN: r225002
gcc/
* rtl.h (emit): Add an optional boolean parameter to control
whether barriers are emitted.
* emit-rtl.c (emit): Likewise.
* gensupport.c (get_emit_function): Return null rather than "emit".
* genemit.c (gen_emit_seq): Handle the null return value.
Don't emit barriers after the final instruction in the sequence.
* gentarget-def.c (main): Don't emit barriers after the instruction.
From-SVN: r225000
* gcc-interface/trans.c (loop_info_d): Add low_bound, high_bound,
artificial, has_checks and warned_aggressive_loop_optimizations.
(gigi): Set warn_aggressive_loop_optimizations to 0.
(inside_loop_p): New inline predicate.
(push_range_check_info): Rename into...
(find_loop_for): ...this and do not push range_check_info_d object.
(Loop_Statement_to_gnu): Set artificial, low_bound and high_bound
fields of gnu_loop_info. Adjust detection of checks enabled by
-funswitch-loops and adds one for -faggressive-loop-optimizations.
(gnat_to_gnu) <N_Indexed_Component>: If aggressive loop optimizations
are enabled, warn for loops overrunning an array of size 1 not at the
end of a record.
From-SVN: r224998
While paving the way to turn on unified syntax in ARM state I came
across this use of TARGET_UNIFIED_ASM that really doesn't make sense.
The idea that pop has different encoding sizes is a property of the
Thumb instruction set rather than a property of which form of unified
syntax was used. I still have quite a large patch set for the unified
asm switch but it seems useful to get this one out of the way to catch
any other issues.
Tested with an appropriate set of multilibs on arm-none-eabi /
applied. Bootstrapped on armhf.
Applied to trunk.
2015-06-26 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/arm/arm.c (arm_output_multireg_pop): Fix use of
TARGET_UNIFIED_ASM.
From-SVN: r224997
2015-06-26 Richard Biener <rguenther@suse.de>
* match.pd: Allow associating FLOAT_TYPE_P when flag_associative_math.
* gfortran.dg/reassoc_3.f90: Adjust.
2015-06-26 Richard Biener <rguenther@suse.de>
* match.pd: Allow (p +p off1) +p off2 to (p +p (off1 + off2))
irrespective on whether the inner operation has a single use
of both off are constant.
From-SVN: r224995
strtol returns long, which is compared against unsigned int. On 32-bit
hosts, it leads to
gcc/gentarget-def.c: In function void def_target_insn(const char*, const char*):
gcc/gentarget-def.c:88:34: error: comparison between signed and unsigned integer expressions [-Werror=sign-compare]
This patch casts return of strtol to unsigned int to avoid the error.
* gentarget-def.c (def_target_insn): Cast return of strtol to
unsigned int.
From-SVN: r224993
gcc/
PR target/65979
PR target/66611
* config/sh/sh.md (tstsi_t peephole2): Use insn_invalid_p to check if
the replacement insn will work.
From-SVN: r224988
