[Patch AArch64 1/4] Define candidates for instruction fusion in a .def file

gcc/

	* config/aarch64/aarch64-fusion-pairs.def: New.
	* config/aarch64/aarch64-protos.h (aarch64_fusion_pairs): New.
	* config/aarch64/aarch64.c (AARCH64_FUSE_NOTHING): Move to
	aarch64_fusion_pairs.
	(AARCH64_FUSE_MOV_MOVK): Likewise.
	(AARCH64_FUSE_ADRP_ADD): Likewise.
	(AARCH64_FUSE_MOVK_MOVK): Likewise.
	(AARCH64_FUSE_ADRP_LDR): Likewise.
	(AARCH64_FUSE_CMP_BRANCH): Likewise.

From-SVN: r225014
This commit is contained in:
James Greenhalgh 2015-06-26 13:54:53 +00:00 committed by James Greenhalgh
parent 6642bdb4b1
commit 665dd6f3fa
4 changed files with 70 additions and 7 deletions

View file

@ -1,3 +1,15 @@
2015-06-26 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64-fusion-pairs.def: New.
* config/aarch64/aarch64-protos.h (aarch64_fusion_pairs): New.
* config/aarch64/aarch64.c (AARCH64_FUSE_NOTHING): Move to
aarch64_fusion_pairs.
(AARCH64_FUSE_MOV_MOVK): Likewise.
(AARCH64_FUSE_ADRP_ADD): Likewise.
(AARCH64_FUSE_MOVK_MOVK): Likewise.
(AARCH64_FUSE_ADRP_LDR): Likewise.
(AARCH64_FUSE_CMP_BRANCH): Likewise.
2015-06-26 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_symbol_type): Rename

View file

@ -0,0 +1,38 @@
/* Copyright (C) 2015 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Pairs of instructions which can be fused. before including this file,
define a macro:
AARCH64_FUSION_PAIR (name, internal_name, index_bit)
Where:
NAME is a string giving a friendly name for the instructions to fuse.
INTERNAL_NAME gives the internal name suitable for appending to
AARCH64_FUSE_ to give an enum name.
INDEX_BIT is the bit to set in the bitmask of supported fusion
operations. */
AARCH64_FUSION_PAIR ("mov+movk", MOV_MOVK, 0)
AARCH64_FUSION_PAIR ("adrp+add", ADRP_ADD, 1)
AARCH64_FUSION_PAIR ("movk+movk", MOVK_MOVK, 2)
AARCH64_FUSION_PAIR ("adrp+ldr", ADRP_LDR, 3)
AARCH64_FUSION_PAIR ("cmp+branch", CMP_BRANCH, 4)

View file

@ -190,6 +190,26 @@ struct tune_params
const int min_div_recip_mul_df;
};
#define AARCH64_FUSION_PAIR(x, name, index) \
AARCH64_FUSE_##name = (1 << index),
/* Supported fusion operations. */
enum aarch64_fusion_pairs
{
AARCH64_FUSE_NOTHING = 0,
#include "aarch64-fusion-pairs.def"
/* Hacky macro to build AARCH64_FUSE_ALL. The sequence below expands
to:
AARCH64_FUSE_ALL = 0 | AARCH64_FUSE_index1 | AARCH64_FUSE_index2 ... */
#undef AARCH64_FUSION_PAIR
#define AARCH64_FUSION_PAIR(x, name, y) \
| AARCH64_FUSE_##name
AARCH64_FUSE_ALL = 0
#include "aarch64-fusion-pairs.def"
};
#undef AARCH64_FUSION_PAIR
HOST_WIDE_INT aarch64_initial_elimination_offset (unsigned, unsigned);
int aarch64_get_condition_code (rtx);
bool aarch64_bitmask_imm (HOST_WIDE_INT val, machine_mode);

View file

@ -321,13 +321,6 @@ static const struct cpu_vector_cost xgene1_vector_cost =
1 /* cond_not_taken_branch_cost */
};
#define AARCH64_FUSE_NOTHING (0)
#define AARCH64_FUSE_MOV_MOVK (1 << 0)
#define AARCH64_FUSE_ADRP_ADD (1 << 1)
#define AARCH64_FUSE_MOVK_MOVK (1 << 2)
#define AARCH64_FUSE_ADRP_LDR (1 << 3)
#define AARCH64_FUSE_CMP_BRANCH (1 << 4)
/* Generic costs for branch instructions. */
static const struct cpu_branch_cost generic_branch_cost =
{