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198695 commits

Author SHA1 Message Date
Gerald Pfeifer
a1292514f8 libstdc++: Adjust "The Component Object Model" reference
libstdc++-v3/ChangeLog:

	* doc/xml/manual/policy_data_structures_biblio.xml: Adjust
	"The Component Object Model" reference.
	* doc/html/manual/policy_data_structures.html: Regenerate.
2023-02-13 23:30:37 +01:00
Richard Sandiford
3cac06d84f lra: Replace subregs in bare uses & clobbers [PR108681]
In this PR we had a write to one vector of a 4-vector tuple.
The vector had mode V1DI, and the target doesn't provide V1DI
moves, so this was converted into:

    (clobber (subreg:V1DI (reg/v:V4x1DI 92 [ b ]) 24))

followed by a DImode move.  (The clobber isn't really necessary
or helpful for a single word, but would be for wider moves.)

The subreg in the clobber survived until after RA:

    (clobber (subreg:V1DI (reg/v:V4x1DI 34 v2 [orig:92 b ] [92]) 24))

IMO this isn't well-formed.  If a subreg of a hard register simplifies
to a hard register, it should be replaced by the hard register.  If the
subreg doesn't simplify, then target-independent code can't be sure
which parts of the register are affected and which aren't.  A clobber
of such a subreg isn't useful and (again IMO) should just be removed.
Conversely, a use of such a subreg is effectively a use of the whole
inner register.

LRA has code to simplify subregs of hard registers, but it didn't
handle bare uses and clobbers.  The patch extends it to do that.

One question was whether the final_p argument to alter_subregs
should be true or false.  True is IMO dangerous, since it forces
replacements that might not be valid from a dataflow perspective,
and uses and clobbers only exist for dataflow.  As said above,
I think the correct way of handling a failed simplification would
be to delete clobbers and replace uses of subregs with uses of
the inner register.  But I didn't want to write untested code
to do that.

In the PR, the clobber caused an infinite loop in DCE, because
of a disagreement about what effect the clobber had.  But for
the reasons above, I think that was GIGO rather than a bug in
DF or DCE.

gcc/
	PR rtl-optimization/108681
	* lra-spills.cc (lra_final_code_change): Extend subreg replacement
	code to handle bare uses and clobbers.

gcc/testsuite/
	PR rtl-optimization/108681
	* gcc.target/aarch64/pr108681.c: New test.
2023-02-13 21:13:59 +00:00
Vladimir N. Makarov
a33e3dcbd1 RA: Clear reg equiv caller_save_p flag when clearing defined_p flag
IRA can invalidate initially setup equivalence in setup_reg_equiv.
Flag caller_saved was not cleared during invalidation although
init_insns were cleared.  It resulted in segmentation fault in
get_equiv.  Clearing the flag solves the problem.  For more
precaution I added clearing the flag in other places too although it
might be not necessary.

        PR rtl-optimization/108774

gcc/ChangeLog:

	* ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
	caller_save_p flag when clearing defined_p flag.
	(setup_reg_equiv): Ditto.
	* lra-constraints.cc (lra_constraints): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/pr108774.c: New.
2023-02-13 16:09:12 -05:00
Harald Anlauf
2ce7e2a83e Fortran: error recovery after invalid use of CLASS variable [PR103475]
gcc/fortran/ChangeLog:

	PR fortran/103475
	* primary.cc (gfc_expr_attr): Avoid NULL pointer dereference for
	invalid use of CLASS variable.

gcc/testsuite/ChangeLog:

	PR fortran/103475
	* gfortran.dg/pr103475.f90: New test.
2023-02-13 22:06:10 +01:00
Uros Bizjak
00b8a212ea i386: Relax extract location operand mode requirements [PR108516]
Combine pass simplifies zero-extend of a zero-extract to:

Trying 16 -> 6:
   16: r86:QI#0=zero_extract(r87:HI,0x8,0x8)
      REG_DEAD r87:HI
    6: r84:SI=zero_extend(r86:QI)
      REG_DEAD r86:QI
Failed to match this instruction:
(set (reg:SI 84 [ s.e2 ])
    (zero_extract:SI (reg:HI 87)
        (const_int 8 [0x8])
        (const_int 8 [0x8])))

which fails instruction recognision.  The pattern is valid, since there
is no requirement on the mode of the location operand.

The patch relaxes location operand mode requirements of *extzv and *extv
insn patterns to allow all supported integer modes.  The patch also
adds support for a related sign-extend from zero-extracted operand.

2023-02-13  Uroš Bizjak  <ubizjak@gmail.com>

gcc/ChangeLog:

	PR target/108516
	* config/i386/predicates.md (extr_register_operand):
	New special predicate.
	* config/i386/i386.md (*extv<mode>): Use extr_register_operand
	as operand 1 predicate.
	(*exzv<mode>): Ditto.
	(*extendqi<SWI24:mode>_ext_1): New insn pattern.

gcc/testsuite/ChangeLog:

	PR target/108516
	* gcc.target/i386/pr108516-1.c: New test.
	* gcc.target/i386/pr108516-2.c: Ditto.
2023-02-13 20:24:02 +01:00
Gaius Mulley
296cf77b78 Cleanup libgm2/libm2iso/RTco.cc
This patch removes the macro tprintf sizeof nop hack and replaces
it with tprintf (...).

libgm2/ChangeLog:

	* libm2iso/RTco.cc (tprintf): Replace definition.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2023-02-13 19:06:36 +00:00
Rimvydas Jasinskas
086a1df437 Fortran: Add !GCC$ attributes NOINLINE,NORETURN,WEAK
gcc/fortran/ChangeLog:

	* decl.cc: Add EXT_ATTR_NOINLINE, EXT_ATTR_NORETURN, EXT_ATTR_WEAK.
	* gfortran.h (ext_attr_id_t): Ditto.
	* gfortran.texi (GCC$ ATTRIBUTES): Document them.
	* trans-decl.cc (build_function_decl): Apply them.

gcc/testsuite/ChangeLog:

	* gfortran.dg/noinline.f90: New test.
	* gfortran.dg/noreturn-1.f90: New test.
	* gfortran.dg/noreturn-2.f90: New test.
	* gfortran.dg/noreturn-3.f90: New test.
	* gfortran.dg/noreturn-4.f90: New test.
	* gfortran.dg/noreturn-5.f90: New test.
	* gfortran.dg/weak-1.f90: New test.

Signed-off-by: Rimvydas Jasinskas <rimvydas.jas@gmail.com>
2023-02-13 18:35:26 +01:00
Richard Biener
72ae1e5635 tree-optimization/28614 - high FRE time for gcc.c-torture/compile/20001226-1.c
I noticed that for gcc.c-torture/compile/20001226-1.c even -O1 has
around 50% of the compile-time accounted to FRE.  That's because
we have blocks with a high incoming edge count and
can_track_predicate_on_edge visits all of them even though it could
stop after the second.  The function is also called repeatedly for
the same edge.  The following fixes this and reduces the FRE time
to 1% on the testcase.

	PR tree-optimization/28614
	* tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
	walking all edges in most cases.
	(vn_nary_op_insert_pieces_predicated): Avoid repeated
	calls to can_track_predicate_on_edge unless checking is
	enabled.
	(process_bb): Instead call it once here for each edge
	we register possibly multiple predicates on.
2023-02-13 15:57:09 +01:00
Richard Biener
6436add49e tree-optimization/108691 - indirect calls to setjmp
DCE now chokes on indirect setjmp calls becoming direct because
that exposes them too late to be subject to abnormal edge creation.
The following patch honors gimple_call_ctrl_altering for those and
_not_ treat formerly indirect calls to setjmp as calls to setjmp
in notice_special_calls.

Unfortunately there's no way to have an indirect call to setjmp
properly annotated (the returns_twice attribute is ignored on types).

RTL expansion late discovers returns-twice for the purpose of
adding REG_SETJMP notes and also sets ->calls_setjmp
(instead of asserting it is set).  There's no good way to
transfer proper knowledge around here so I'm using ->calls_setjmp
as a flag to indicate whether gimple_call_ctrl_altering_p was set.

	PR tree-optimization/108691
	* tree-cfg.cc (notice_special_calls): When the CFG is built
	honor gimple_call_ctrl_altering_p.
	* cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
	temporarily if the call is not control-altering.
	* calls.cc (emit_call_1): Do not add REG_SETJMP if
	cfun->calls_setjmp is not set.  Do not alter cfun->calls_setjmp.

	* gcc.dg/pr108691.c: New testcase.
2023-02-13 15:57:08 +01:00
Stefan Schulze Frielinghaus
452db716d8 IBM zSystems: Do not propagate scheduler state across basic blocks [PR108102]
So far we propagate scheduler state across basic blocks within EBBs and
reset the state otherwise.  In certain circumstances the entry block of
an EBB might be empty, i.e., no_real_insns_p is true.  In those cases
scheduler state is not reset and subsequently wrong state is propagated
to following blocks of the same EBB.

Since the performance benefit of tracking state across basic blocks is
questionable on modern hardware, simply reset the state for each basic
block.

Fix also resetting f{p,x}d_longrunning.

gcc/ChangeLog:

	PR target/108102
	* config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
	(struct s390_sched_state): Initialise to zero.
	(s390_sched_variable_issue): For better debuggability also emit
	the current side.
	(s390_sched_init): Unconditionally reset scheduler state.
2023-02-13 15:33:38 +01:00
Jonathan Yong
6995ac6f98 builtin-declaration-mismatch-7: fix LLP64 targets
gcc/testsuite/ChangeLog:

	* gcc.dg/Wbuiltin-declaration-mismatch-7.c: Use (long )*
	regex pattern to allow long long instead of just long.

Signed-off-by: Jonathan Yong <10walls@gmail.com>
2023-02-13 11:48:26 +00:00
Richard Sandiford
7d5a935070 ifcvt: Fix regression in aarch64/fcsel_1.c
aarch64/fcsel_1.c contains:

double
f_2 (double a, double b, double c, double d)
{
  if (a > b)
    return c;
  else
    return d;
}

which started failing in the GCC 12 timeframe.  When it passed,
the RTL had the form:

[A]
  (set (reg ret) (reg c))
  (set (pc) (if_then_else (gt ...) (label_ref ret) (pc)))
    edge to ret, fallthru to else
else:
  (set (reg ret) (reg d))
    fallthru to ret
ret:
  ...exit...

i.e. a branch around.  Now the RTL has form:

[B]
  (set (reg ret) (reg d))
  (set (pc) (if_then_else (gt ...) (label_ref then) (pc)))
    edge to then, fallthru to ret
ret:
  ...exit...

then:
  (set (reg ret) (reg c))
    edge to ret

i.e. a branch out.

Both are valid, of course, and there's no easy way to predict
which we'll get.  But ifcvt canonicalises its representation on:

  if (cond) goto fallthru else goto non-fallthru

That is, it canoncalises on the branch-around case for half-diamonds.
It therefore wants to invert the comparison in [B] to get:

  if (...) goto ret else goto then

But that isn't possible for strict FP gt, so the optimisation fails.

Canonicalising on the branch-around case seems like the wrong choice for
half diamonds.  The natural way of expressing a conditional branch is
for the label_ref to be the "then" destination and pc to be the "else"
destination.  And the natural choice of condition seems to be the one
under which extra stuff *is* done, rather than the one under which extra
stuff *isn't* done.  But that decision goes back at least 20 years and
it doesn't seem like a good idea to change it in stage 4.

This patch instead allows the internal structure to store the
condition in inverted form.  For simplicity it handles only
conditional moves, which is the one case that is needed
to fix the known regression.  (There are probably unknown
regressions too, but still.)

gcc/
	* ifcvt.h (noce_if_info::cond_inverted): New field.
	* ifcvt.cc (cond_move_convert_if_block): Swap the then and else
	values when cond_inverted is true.
	(noce_find_if_block): Allow the condition to be inverted when
	handling conditional moves.
2023-02-13 11:38:45 +00:00
Stefan Schulze Frielinghaus
1e191d19b5 IBM zSystems: Fix predicate execute_operation
Use constrain_operands in order to check whether there exists a valid
alternative instead of extract_constrain_insn which ICEs in case no
alternative is found.

gcc/ChangeLog:

	* config/s390/predicates.md (execute_operation): Use
	constrain_operands instead of extract_constrain_insn in order to
	determine wheter there exists a valid alternative.
2023-02-13 12:06:44 +01:00
Claudiu Zissulescu
bc5581fe32 arc: Don't use millicode thunks unless asked for.
ARC has enter_s/leave_s instructions which can save/restore the entire
function context. It is not needed the millicode thunks anylonger when
compiling for size, thus, make their usage optional.

gcc/

	* common/config/arc/arc-common.cc (arc_option_optimization_table):
	Remove millicode from list.

gcc/testsuite/

	* gcc.target/arc/milli-1.c: Update test.
2023-02-13 11:35:15 +02:00
Martin Liska
9847c7531e docs: document new param
gcc/ChangeLog:

	* doc/invoke.texi: Document ira-simple-lra-insn-threshold.
2023-02-13 10:15:55 +01:00
Richard Biener
338739645b tree-optimization/106722 - fix CD-DCE edge marking
The following fixes a latent issue when we mark control edges but
end up with marking a block with no stmts necessary.  In this case
we fail to mark dependent control edges of that block.

	PR tree-optimization/106722
	* tree-ssa-dce.cc (mark_last_stmt_necessary): Return
	whether we marked a stmt.
	(mark_control_dependent_edges_necessary): When
	mark_last_stmt_necessary didn't mark any stmt make sure
	to mark its control dependent edges.
	(propagate_necessity): Likewise.

	* gcc.dg/torture/pr108737.c: New testcase.
2023-02-13 08:26:36 +01:00
Kito Cheng
89367e7946 RISC-V: Handle vlenb correctly in unwinding
gcc/ChangeLog:

	* config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
	(DWARF_FRAME_REGISTERS): New.
	(DWARF_REG_TO_UNWIND_COLUMN): New.

libgcc/ChangeLog:

	* config.host (riscv*-*-*): Add config/riscv/value-unwind.h.
	* config/riscv/value-unwind.h: New.
2023-02-13 10:40:46 +08:00
GCC Administrator
22ba8570e6 Daily bump. 2023-02-13 00:18:02 +00:00
Gerald Pfeifer
74e72964b4 libstdc++: Tweak link to N1780 (C++ standard)
libstdc++-v3/ChangeLog:

	* doc/xml/manual/containers.xml: Tweak a link to N1780
	(C++ standard).
	* doc/html/manual/associative.html: Regenerate.
2023-02-12 23:35:40 +01:00
Gerald Pfeifer
06ca0c9abb doc: Remove direct reference to configure/build docs
This has been broken for years (if not forever), both when it comes
to onlinedocs and local installations.

gcc/ChangeLog:

	* doc/sourcebuild.texi: Remove (broken) direct reference to
	"The GNU configure and build system".
2023-02-12 12:37:04 +01:00
Jin Ma
52009fa79c RISC-V: Change the generation mode of ADJUST_SP_RTX from gen_insn to gen_SET.
The gen_insn method is used to generate ADJUST_SP_RTX here, which has certain
potential risks:

When the architecture adds pre-processing to `define_insn "adddi3"`, such as
`define_expend "adddi3"`, the gen_expand will be automatically called here,
causing the patern to emit directly, which will cause insn to enter REG_NOTE
for `DWARF` instead of patern.

The following error REG_NOTE occurred:
error: invalid rtl sharing found in the insn:
(insn 19 3 20 2 (parallel [
        ...
        ])
    (expr_list:REG_CFA_ADJUST_CFA
        (insn 18 0 0 (set (reg/f:DI 2 sp)
            (plus:DI (reg/f:DI 2 sp)
                (const_int -16 [0xfffffffffffffff0]))) -1
        (nil))))

In fact, the correct one should be the following:
(insn 19 3 20 2 (parallel [
        ...
        ])
    (expr_list:REG_CFA_ADJUST_CFA
        (set (reg/f:DI 2 sp)
            (plus:DI (reg/f:DI 2 sp)
                (const_int -16 [0xfffffffffffffff0])))))

Following the treatment of arm or other architectures, it is more reasonable to
use gen_SET here.

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
	gen_add3_insn to gen_rtx_SET.
	(riscv_adjust_libcall_cfi_epilogue): Likewise.
2023-02-12 19:31:25 +08:00
Ju-Zhe Zhong
2cd7cbaf51 RISC-V: Add vaadd.vv C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vaadd_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vv_tumu-3.C: New test.
2023-02-12 18:31:45 +08:00
Ju-Zhe Zhong
e8a0c9e9d4 RISC-V: Add vaadd.vx C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vaadd_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tum_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tum_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tum_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tum_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tum_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tum_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tumu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tumu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tumu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tumu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tumu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vaadd_vx_tumu_rv64-3.C: New test.
2023-02-12 18:31:45 +08:00
Ju-Zhe Zhong
0b1f45786f RISC-V: Add vaaddu.vv C++ api tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vaaddu_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vv_tumu-3.C: New test.
2023-02-12 18:31:45 +08:00
Ju-Zhe Zhong
2ec7533023 RISC-V: Add vaaddu.vx C++ Api tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vaaddu_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tum_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tum_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tum_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tum_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tum_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tum_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tumu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tumu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tumu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tumu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tumu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vaaddu_vx_tumu_rv64-3.C: New test.
2023-02-12 18:31:45 +08:00
Ju-Zhe Zhong
ff4d996600 RISC-V: Add vasub.vv C++ api tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vasub_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vv_tumu-3.C: New test.
2023-02-12 18:31:44 +08:00
Ju-Zhe Zhong
3d65ea07b4 RISC-V: Add vasub.vx C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vasub_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tum_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tum_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tum_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tum_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tum_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tum_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tumu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tumu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tumu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tumu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tumu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vasub_vx_tumu_rv64-3.C: New test.
2023-02-12 18:31:44 +08:00
Ju-Zhe Zhong
1a8c69e7ea RISC-V: Add vasubu.vv C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vasubu_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vv_tumu-3.C: New test.
2023-02-12 18:31:44 +08:00
Ju-Zhe Zhong
90ea2d28d4 RISC-V: Add vasubu.vx C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vasubu_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tum_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tum_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tum_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tum_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tum_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tum_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tumu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tumu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tumu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tumu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tumu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vasubu_vx_tumu_rv64-3.C: New test.
2023-02-12 18:31:44 +08:00
Ju-Zhe Zhong
0906435e2b RISC-V: Add vnclip C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vnclip_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vv_tumu-3.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx-1.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx-2.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx-3.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclip_vx_tumu-3.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vv_tumu-3.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx-1.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx-2.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx-3.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vnclipu_vx_tumu-3.C: New test.
2023-02-12 18:31:44 +08:00
Ju-Zhe Zhong
7302972bcd RISC-V: Add vsmul.vv C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vsmul_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vv_tumu-3.C: New test.
2023-02-12 18:31:44 +08:00
Ju-Zhe Zhong
73dea8e642 RISC-V: Add vsmul.vx C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vsmul_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tum_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tum_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tum_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tum_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tum_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tum_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tumu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tumu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tumu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tumu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tumu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vsmul_vx_tumu_rv64-3.C: New test.
2023-02-12 18:31:44 +08:00
Ju-Zhe Zhong
49e5388208 RISC-V: Add vssra.vv C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vssra_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vssra_vv_tumu-3.C: New test.
2023-02-12 18:31:43 +08:00
Ju-Zhe Zhong
7326a694da RISC-V: Add vssra.vx C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vssra_vx-1.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx-2.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx-3.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vssra_vx_tumu-3.C: New test.
2023-02-12 18:31:43 +08:00
Ju-Zhe Zhong
02b0325269 RISC-V: Add vssrl.vv C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vssrl_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vv_tumu-3.C: New test.
2023-02-12 18:31:43 +08:00
Ju-Zhe Zhong
b7795fb143 RISC-V: Add vssrl.vx C++ API tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vssrl_vx-1.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx-2.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx-3.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_tu-1.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_tu-2.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_tu-3.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_tum-1.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_tum-2.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_tum-3.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_tumu-1.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_tumu-2.C: New test.
	* g++.target/riscv/rvv/base/vssrl_vx_tumu-3.C: New test.
2023-02-12 18:31:43 +08:00
Ju-Zhe Zhong
e85cb86e33 RISC-V: Add vaadd.vv C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/binop_vx_constraint-122.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vv_tumu-3.c: New test.
2023-02-12 18:31:43 +08:00
Ju-Zhe Zhong
5898e1f333 RISC-V: Add vaadd.vx C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vaadd_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tum_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tum_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tum_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tum_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tum_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tum_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tumu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tumu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tumu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tumu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tumu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaadd_vx_tumu_rv64-3.c: New test.
2023-02-12 18:31:43 +08:00
Ju-Zhe Zhong
119e5d9aff RISC-V: Add vaaddu.vv C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vaaddu_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vv_tumu-3.c: New test.
2023-02-12 18:31:43 +08:00
Ju-Zhe Zhong
6ad0002f1e RISC-V: Add vaaddu.vx C API tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vaaddu_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tum_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tum_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tum_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tum_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tum_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tum_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tumu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tumu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tumu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tumu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tumu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vaaddu_vx_tumu_rv64-3.c: New test.
2023-02-12 18:31:43 +08:00
Ju-Zhe Zhong
4432ef4eca RISC-V: Add vasub.vv C API tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vasub_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vv_tumu-3.c: New test.
2023-02-12 18:31:42 +08:00
Ju-Zhe Zhong
48e24473fe RISC-V: Add vasub.vx C API tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vasub_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tum_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tum_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tum_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tum_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tum_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tum_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tumu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tumu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tumu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tumu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tumu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasub_vx_tumu_rv64-3.c: New test.
2023-02-12 18:31:42 +08:00
Ju-Zhe Zhong
193a125c3f RISC-V: Add vasubu.vv C API tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vasubu_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vv_tumu-3.c: New test.
2023-02-12 18:31:42 +08:00
Ju-Zhe Zhong
1580eda6c3 RISC-V: Add vasubu.vx C API tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vasubu_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tum_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tum_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tum_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tum_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tum_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tum_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tumu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tumu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tumu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tumu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tumu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vasubu_vx_tumu_rv64-3.c: New test.
2023-02-12 18:31:42 +08:00
Ju-Zhe Zhong
367a01e6a0 RISC-V: Add vnclip C API tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vnclip_wv-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wv_tumu-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclip_wx_tumu-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wv_tumu-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vnclipu_wx_tumu-3.c: New test.
2023-02-12 18:31:42 +08:00
Ju-Zhe Zhong
c156e8d7bc RISC-V: Add vsmul.vv C API tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vsmul_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vv_tumu-3.c: New test.
2023-02-12 18:31:42 +08:00
Ju-Zhe Zhong
bbb168daec RISC-V: Add vsmul.vx C API tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vsmul_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tum_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tum_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tum_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tum_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tum_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tum_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tumu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tumu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tumu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tumu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tumu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vsmul_vx_tumu_rv64-3.c: New test.
2023-02-12 18:31:41 +08:00
Ju-Zhe Zhong
5ca5ca30b6 RISC-V: Add vssra.vv C API tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vssra_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vv_tumu-3.c: New test.
2023-02-12 18:31:41 +08:00
Ju-Zhe Zhong
4e00937ec3 RISC-V: Add vssra.vx C API tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vssra_vx-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx-3.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vssra_vx_tumu-3.c: New test.
2023-02-12 18:31:41 +08:00
Ju-Zhe Zhong
13907f4bd2 RISC-V: Add vssrl.vv C API tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vssrl_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vssrl_vv_tumu-3.c: New test.
2023-02-12 18:31:41 +08:00