Commit graph

441 commits

Author SHA1 Message Date
Max Filippov
991995c4e7 xtensa: fix _Unwind_GetCFA
Returning context->cfa in _Unwind_GetCFA makes CFA point one stack frame
higher than what was actually used by code at context->ra. This results
in invalid CFA value in signal frames and premature unwinding completion
in forced unwinding used by uClibc NPTL thread cancellation.
Returning context->sp from _Unwind_GetCFA makes all CFA values valid and
matching code that used them.

2015-08-18  Max Filippov  <jcmvbkbc@gmail.com>
libgcc/
	* config/xtensa/unwind-dw2-xtensa.c (_Unwind_GetCFA): Return
	context->sp instead of context->cfa.

From-SVN: r226964
2015-08-18 01:08:22 +00:00
Max Filippov
0e19db59e2 xtensa: use unwind-dw2-fde-dip instead of unwind-dw2-fde
This allows having exception cleanup code in binaries that don't
register their unwind tables.

2015-08-18  Max Filippov  <jcmvbkbc@gmail.com>
libgcc/
	* config/xtensa/t-windowed (LIB2ADDEH): Replace unwind-dw2-fde
	with unwind-dw2-fde-dip.

From-SVN: r226963
2015-08-18 01:07:10 +00:00
Max Filippov
b6ac5f6231 xtensa: reimplement register spilling
Spilling windowed registers in userspace is much easier, more portable,
less error-prone and equally effective as in kernel. Now that register
spilling syscall is considered obsolete in the xtensa linux kernel
replace it with CALL12 followed by series of ENTRY in libgcc.

2015-08-18  Max Filippov  <jcmvbkbc@gmail.com>
libgcc/
	* config/xtensa/lib2funcs.S (__xtensa_libgcc_window_spill): Use
	CALL12 followed by series of ENTRY to spill windowed registers.
	(__xtensa_nonlocal_goto): Call __xtensa_libgcc_window_spill
	instead of making linux spill syscall.

From-SVN: r226962
2015-08-18 01:05:44 +00:00
Yuri Rumyantsev
3e0f334989 driver-i386.c (host_detect_local_cpu): Add support for skylake.
gcc/

	* config/i386/driver-i386.c (host_detect_local_cpu): Add support
	for skylake.
	* config/i386/i386.c (PTA_SKYLAKE): New macros.
	(processor_alias_table): Add skylake description.
	(enum processor_model): Add skylake processor.
	(arch_names_table): Add skylake record.
	* doc/invoke.texi: Add skylake item.

gcc/testsuite/

	* gcc.target/i386/builtin_target.c: Add skylake check.

libgcc/

	* config/i386/cpuinfo.c (enum processor_subtypes): Add skylake.
	(get_intel_cpu): Likewise.

From-SVN: r226884
2015-08-14 09:11:01 +00:00
H.J. Lu
51c728b17d Add Knights Landing support to __builtin_cpu_is
This patch adds Knights Landing support to __builtin_cpu_is.

gcc/testsuite/

	* gcc.target/i386/builtin_target.c (check_intel_cpu_model):
	Check Knights Landing support.

libgcc/

	* config/i386/cpuinfo.c (processor_types): Add INTEL_KNL.
	(get_intel_cpu): Add Knights Landing support.

From-SVN: r226817
2015-08-12 07:52:22 -07:00
Uros Bizjak
aff4eeac68 re PR target/66954 (function multiversioning fails for target "aes")
libgcc/ChangeLog:

	PR target/66954
	* config/i386/cpuinfo.c (enum processor_features): Add FEATURE_PCLMUL.
	(get_available_features): Handle FEATURE_PCLMUL.

gcc/ChangeLog:

	PR target/66954
	* config/i386/i386.c (get_builtin_code_for_version): Add P_PCLMUL
	to enum feature_priority and feature_list.
	(fold_builtin_cpu): Add F_PCLMUL to enum processor_features
	and isa_names_table.

gcc/testsuite/ChangeLog:

	PR target/66954
	* g++.dg/ext/mv25.C: New test.

From-SVN: r226784
2015-08-11 19:53:41 +02:00
H.J. Lu
736e56dac0 Treat model == 0x4f as Broadwell
gcc/testsuite/

	* gcc.target/i386/builtin_target.c (check_intel_cpu_model):
	Treat model == 0x4f as Broadwell.

libgcc/

	* config/i386/cpuinfo.c (get_intel_cpu): Treat model == 0x4f as
	Broadwell.

From-SVN: r226766
2015-08-10 12:19:05 -07:00
Uros Bizjak
54d22142b1 re PR target/66954 (function multiversioning fails for target "aes")
libgcc/ChangeLog:

	PR target/66954
	* config/i386/cpuinfo.c (enum processor_features): Add FEATURE_AES.
	(get_available_features): Handle FEATURE_AES.

gcc/ChangeLog:

	PR target/66954
	* config/i386/i386.c (get_builtin_code_for_version): Add P_AES
	to enum feature_priority and feature_list.
	(fold_builtin_cpu): Add F_AES to enum processor_features
	and isa_names_table.

gcc/testsuite/ChangeLog:

	PR target/66954
	* g++.dg/ext/mv24.C: New test.

From-SVN: r226081
2015-07-22 20:01:33 +02:00
Chung-Lin Tang
20ca17e480 linux-atomic.c (<asm/unistd.h>): Remove #include.
2015-07-22  Chung-Lin Tang  <cltang@codesourcery.com>

	libgcc/
	* config/nios2/linux-atomic.c (<asm/unistd.h>): Remove #include.
	(EFAULT,EBUSY,ENOSYS): Delete unused #defines.

From-SVN: r226063
2015-07-22 11:39:30 +00:00
Jan Beulich
180744c0cf libgcc: fix build with older make
Make up to 3.80 (documented as minimal permitted version) doesn't
support "else if...".

2015-07-17  Jan Beulich  <jbeulich@suse.com>

	* config/t-softfp: Split up "else ifneq".

From-SVN: r225920
2015-07-17 07:14:25 +00:00
Sandra Loosemore
a03c6ae388 tramp.c (MOVHI, ORI, JMP): Conditionalize for __nios2_arch__ level.
2015-07-14  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>
	    Chung-Lin Tang  <cltang@codesourcery.com>

	libgcc/
	* config/nios2/tramp.c (MOVHI, ORI, JMP): Conditionalize
	for __nios2_arch__ level.

Co-Authored-By: Cesar Philippidis <cesar@codesourcery.com>
Co-Authored-By: Chung-Lin Tang <cltang@codesourcery.com>

From-SVN: r225794
2015-07-14 18:43:46 -04:00
John Marino
73358db5d1 t-dragonfly: New.
2015-07-13  John Marino  <gnugcc@marino.st>

	* config/i386/t-dragonfly: New.

From-SVN: r225738
2015-07-13 15:53:16 +01:00
John David Anglin
f9a12f7b8f linux-atomic.c (__kernel_cmpxchg): Reorder arguments to better match light-weight syscall argument order.
* config/pa/linux-atomic.c (__kernel_cmpxchg): Reorder arguments to
	better match light-weight syscall argument order.
	(__kernel_cmpxchg2): Likewise.
	Adjust callers.

From-SVN: r225267
2015-07-01 17:42:20 +00:00
H.J. Lu
cb78b51ca0 IA MCU psABI support: changes to libraries
Patch in the bottom adds support of IA MCU psABI to libgcc (enables
soft-fp) and libdecnumber (enables it for IA MCU).

config/

	* dfp.m4 (enable_decimal_float): Also set to yes for
	i?86*-*-elfiamcu target.

gcc/

	* configure: Regenerated.

libdecnumber/

	* configure: Regenerated.

libgcc/

	* config.host: Support i[34567]86-*-elfiamcu target.
	* config/t-softfp-sfdftf: New file.
	* config/i386/32/t-iamcu: Likewise.
	* configure: Regenerated.

From-SVN: r225198
2015-06-30 09:42:07 -07:00
James Lemke
4fa0f9ea8c lib1funcs.S (aeabi_idiv0, [...]): Add CFI entries.
2015-06-23  James Lemke  <jwlemke@codesourcery.com>

	libgcc/config/arm/
	* lib1funcs.S (aeabi_idiv0, aeabi_ldiv0): Add CFI entries.

From-SVN: r224854
2015-06-23 17:45:18 +00:00
John Marino
89c54dd357 config.host (i[34567]86-*-freebsd*, [...]): Set md_unwind_header
* config.host (i[34567]86-*-freebsd*, x86_64-*-freebsd*): Set
        md_unwind_header
        * config/i386/freebsd-unwind.h: New.

From-SVN: r223765
2015-05-27 10:14:10 -06:00
Uros Bizjak
9b789cc15c config.host (i[34567]-*-*, x86_64-*-*): Add t-crtfm instead of i386/t-crtfm to tmake_file.
* config.host (i[34567]-*-*, x86_64-*-*): Add t-crtfm instead of
	i386/t-crtfm to tmake_file.
	* config/i386/crtfastmath.c (set_fast_math_sse): New function.
	(set_fast_math): Use set_fast_math_sse for SSE targets.
	* config/i386/t-crtfm: Remove.

From-SVN: r223578
2015-05-22 16:39:22 +02:00
Alan Modra
3dafb2207e re PR libgcc/66225 (libgcc/config/rs6000/morecore.S will not build on systems with an older assembler)
PR libgcc/66225
	* config/rs6000/morestack.S: Remove ".abiversion 1".

From-SVN: r223464
2015-05-21 09:25:08 +09:30
Alan Modra
0f0fd74525 rs6000-common.c (TARGET_SUPPORTS_SPLIT_STACK): Define.
gcc/
	* common/config/rs6000/rs6000-common.c (TARGET_SUPPORTS_SPLIT_STACK):
	Define.
	(rs6000_supports_split_stack): New function.
	* gcc/config/rs6000/rs6000.c (machine_function): Add
	split_stack_arg_pointer.
	(TARGET_EXTRA_LIVE_ON_ENTRY, TARGET_INTERNAL_ARG_POINTER): Define.
	(setup_incoming_varargs): Use crtl->args.internal_arg_pointer
	rather than virtual_incoming_args_rtx.
	(rs6000_va_start): Likewise.
	(split_stack_arg_pointer_used_p): New function.
	(rs6000_emit_prologue): Set up arg pointer for -fsplit-stack.
	(morestack_ref): New var.
	(gen_add3_const, rs6000_expand_split_stack_prologue,
	rs6000_internal_arg_pointer, rs6000_live_on_entry,
	rs6000_split_stack_space_check): New functions.
	(rs6000_elf_file_end): Call file_end_indicate_split_stack.
	* gcc/config/rs6000/rs6000.md (UNSPEC_STACK_CHECK): Define.
	(UNSPECV_SPLIT_STACK_RETURN): Define.
	(split_stack_prologue, load_split_stack_limit,
	load_split_stack_limit_di, load_split_stack_limit_si,
	split_stack_return, split_stack_space_check): New expands and insns.
	* gcc/config/rs6000/rs6000-protos.h
	(rs6000_expand_split_stack_prologue): Declare.
	(rs6000_split_stack_space_check): Declare.
libgcc/
	* config/rs6000/morestack.S: New.
	* config/rs6000/t-stack-rs6000: New.
	* config.host (powerpc*-*-linux*): Add t-stack and t-stack-rs6000
	to tmake_file.
	* generic-morestack.c: Don't build for powerpc 32-bit.

From-SVN: r223426
2015-05-20 10:56:28 +09:30
James Bowman
fef939d6a9 FT32 target added. Approved by Jeff Law [law@redhat.com]
From-SVN: r223261
2015-05-16 23:49:08 +00:00
Martin Galvan
ff935d0c3d Add support for CFI directives in fp emulation routines for ARM.
2015-05-15  Martin Galvan  <martin.galvan@tallertechnologies.com>

        * config/arm/lib1funcs.S (CFI_START_FUNCTION, CFI_END_FUNCTION):
        New macros.
        * config/arm/ieee754-df.S: Add CFI directives.
        * config/arm/ieee754-sf.S: Add CFI directives.

From-SVN: r223220
2015-05-15 16:57:10 +00:00
Sandra Loosemore
5a0ff57c48 unknown-elf.h (STARTFILE_SPEC): Add conditional linking of crtfastmath.o.
2015-05-06  Sandra Loosemore  <sandra@codesourcery.com>
	    Chris Jones  <chrisj@nvidia.com>
	    Joshua Conner  <jconner@nvidia.com>

	gcc/
	* config/arm/unknown-elf.h (STARTFILE_SPEC): Add conditional
	linking of crtfastmath.o.
	* config/arm/linux-eabi.h (STARTFILE_SPEC): Likewise.

	libgcc/
	* config.host (arm*-*-linux*): Add support for crtfastmath.o.
	(arm*-*-uclinux*): Likewise.
	(arm*-*-eabi* | arm*-*-rtems*): Likewise.
	* config/arm/crtfastmath.c: New file.


Co-Authored-By: Chris Jones <chrisj@nvidia.com>
Co-Authored-By: Joshua Conner <jconner@nvidia.com>

From-SVN: r222857
2015-05-06 12:01:05 -04:00
Uros Bizjak
cc86234f0f elf-lib.h: New file.
libgcc/ChangeLog:

	* config/frv/elf-lib.h: New file.
	(CRT_GET_RFIB_DATA): Move definition from gcc/config/frv/frv.h.
	* libgcc/config.host (frv-*elf, frv-*-*linux*): Add frv/elf-lib.h
	to tm_file.

	* config/frv/frvbengin.c: Do not include defaults.h
	* config/frv/frvend.c: Ditto.

gcc/ChangeLog:

	* config/frv/frv.h (CRT_GET_RFIB_DATA): Move definition to
	libgcc/config/frv/elf-lib.h.

From-SVN: r222519
2015-04-28 11:23:40 +02:00
Yoshinori Sato
2f6bd6eb67 config.gcc: Add h8300-*-linux.
gcc/
	* config.gcc: Add h8300-*-linux.
	* config/h8300/linux.h: New.
	* config/h8300/t-linux: New.
	* config/h8300/h8300.c (h8300_option_override): Normal mode
	is not supported for h8300-*-linux.
	(h8300_file_start): Target priority change.
	(get_shift_alg): Likewise.
	(h8300_shift_need_scratch_p): Likewise.
	* config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
	* config/h8300/h8300.md (define_peephole2): Remove duplicate condition.

libgcc/

	* config.host: Add h8300-*-linux
	* config/h8300/t-linux: New file.
	* config/h8300/lib1funs.s: Change symbol prefix.
	* config/h8300/sfp-machine.h: 64bit double support.

From-SVN: r222479
2015-04-27 13:16:27 -06:00
H.J. Lu
abd0cdc9c0 Hide __cpu_indicator_init/__cpu_model from linker
We shouldn't call external function, __cpu_indicator_init, while an object
is being relocated since its .got.plt section hasn't been updated.  It
works for non-PIE since no update on .got.plt section is required.  This
patch creates libgcc.so as a linker script, hides __cpu_indicator_init
and __cpu_model in libgcc.so.1 from linker, forces linker to resolve
__cpu_indicator_init and __cpu_model to their hidden definitions in
libgcc.a while providing backward binary compatibility.

gcc/testsuite/

	PR target/65612
	* g++.dg/ext/mv18.C: New test.
	* g++.dg/ext/mv19.C: Likewise.
	* g++.dg/ext/mv20.C: Likewise.
	* g++.dg/ext/mv21.C: Likewise.
	* g++.dg/ext/mv22.C: Likewise.
	* g++.dg/ext/mv23.C: Likewise.

libgcc/

	PR target/65612
	* config.host (tmake_file): Add t-slibgcc-libgcc for Linux/x86.
	* config/i386/cpuinfo.c (__cpu_model): Initialize.
	(__cpu_indicator_init@GCC_4.8.0): New.
	(__cpu_model@GCC_4.8.0): Likewise.
	* config/i386/t-linux (HOST_LIBGCC2_CFLAGS): Add
	-DUSE_ELF_SYMVER.

From-SVN: r222178
2015-04-17 05:58:07 -07:00
Nick Clifton
72ed112686 rl78-opts.h (enum rl78_mul_types): Add MUL_G14 and MUL_UNINIT.
* config/rl78/rl78-opts.h (enum rl78_mul_types): Add MUL_G14 and
 	MUL_UNINIT.
 	(enum rl78_cpu_type): New.
 	* config/rl78/rl78-virt.md (attr valloc): Add divhi and divsi.
 	(umulhi3_shift_virt): Remove m constraint from operand 1.
 	(umulqihi3_virt): Likewise.
 	* config/rl78/rl78.c (rl78_option_override): Add code to process
 	-mcpu and -mmul options.
 	(rl78_alloc_physical_registers): Add code to handle divhi and
 	divsi valloc attributes.
 	(set_origin): Likewise.
 	* config/rl78/rl78.h (RL78_MUL_G14): Define.
 	(TARGET_G10, TARGET_G13, TARGET_G14): Define.
 	(TARGET_CPU_CPP_BUILTINS): Define __RL78_MUL_xxx__ and
 	__RL78_Gxx__.
 	(ASM_SPEC): Pass -mcpu on to assembler.
 	* config/rl78/rl78.md (mulqi3): Add a clobber of AX.
 	(mulqi3_rl78): Likewise.
 	(mulhi3_g13): Likewise.
 	(mulhi3): Generate the G13 or G14 versions of the insn directly.
 	(mulsi3): Likewise.
 	(mulhi3_g14): Add clobbers of AX and BC.
 	(mulsi3_g14): Likewise.
 	(mulsi3_g13): Likewise.
 	(udivmodhi4, udivmodhi4_g14, udivmodsi4): New patterns.
 	(udivmodsi4_g14, udivmodsi4_g13): New patterns.
 	* config/rl78/rl78.opt (mmul): Initialise value to
 	RL78_MUL_UNINIT.
 	(mcpu): New option.
 	(m13, m14, mrl78): New option aliases.
 	* config/rl78/t-rl78 (MULTILIB_OPTIONS): Add mg13 and mg14.
 	(MULTILIB_DIRNAMES): Add g13 and g14.
 	* doc/invoke.texi: Document -mcpu and -mmul options.

 	* config/rl78/divmodhi.S: Add G14 and G13 versions of the __divhi3
 	and __modhi3 functions.
	* config/rl78/divmodso.S: Add G14 and G13 versions of the
 	__divsi3, __udivsi3, __modsi3 and __umodsi3 functions.

From-SVN: r222142
2015-04-16 07:57:56 +00:00
Max Filippov
590e26360c Implement call0 ABI for xtensa
call0 is an ABI that doesn't use register windows.

2015-03-03  Max Filippov  <jcmvbkbc@gmail.com>

gcc/
	* config/xtensa/constraints.md ("a" constraint): Include stack
	pointer in case of call0 ABI.
	("q" constraint): Make empty in case of call0 ABI.
	("D" constraint): Include stack pointer in case of call0 ABI.
	* config/xtensa/xtensa-protos.h (xtensa_set_return_address,
	xtensa_expand_epilogue, xtensa_regno_to_class): Add new function
	prototypes.
	* config/xtensa/xtensa.c (xtensa_callee_save_size): New
	variable.
	(xtensa_regno_to_class): Make it a local variable in the
	function xtensa_regno_to_class.
	(xtensa_function_epilogue, TARGET_ASM_FUNCTION_EPILOGUE): Remove
	macro, function prototype and implementation.
	(reg_nonleaf_alloc_order): Make it a local variable in the
	function order_regs_for_local_alloc.
	(xtensa_conditional_register_usage): New function.
	(TARGET_CONDITIONAL_REGISTER_USAGE): Define macro.
	(xtensa_valid_move): Allow direct moves to stack pointer
	register in call0 ABI.
	(xtensa_setup_frame_addresses): Only spill register windows in
	windowed ABI.
	(xtensa_emit_call): Emit call(x)8 or call(x)0 in windowed and
	call0 ABI respectively.
	(xtensa_function_arg_1): Only mark a7 register for copying in
	windowed ABI.
	(xtensa_call_save_reg): New function.
	(compute_frame_size): Add space for callee saved register
	storage to the frame size in call0 ABI.
	(xtensa_expand_prologue): Generate code to set up stack frame
	and save callee-saved registers in call0 ABI.
	(xtensa_expand_epilogue): New function.
	(xtensa_set_return_address): New function.
	(xtensa_return_addr): Calculate return address in call0 ABI.
	(xtensa_builtin_saveregs): Only mark a7 register for copying and
	emit copying code in windowed ABI.
	(order_regs_for_local_alloc): Add preferred register allocation
	order for non-leaf function in call0 ABI.
	(xtensa_static_chain): Add atatic chain passing for call0 ABI.
	(xtensa_asm_trampoline_template): Add trampoline generation for
	call0 ABI.
	(xtensa_trampoline_init): Add trampoline initialization for
	call0 ABI.
	(xtensa_conditional_register_usage, xtensa_regno_to_class): New
	functions.
	* config/xtensa/xtensa.h (TARGET_WINDOWED_ABI): New macro.
	(TARGET_CPU_CPP_BUILTINS): Add built-in define for call0 ABI.
	(CALL_USED_REGISTERS): Modify to encode both windowed and call0
	ABI call-used registers.
	(HARD_FRAME_POINTER_REGNUM): Add frame pointer for call0 ABI.
	(INCOMING_REGNO, OUTGOING_REGNO): Use argument unchanged in
	call0 ABI.
	(REG_CLASS_CONTENTS): Include all registers into the preferred
	reload registers set, adjust the set in the
	xtensa_conditional_register_usage.
	(xtensa_regno_to_class): Drop variable declaration.
	(REGNO_REG_CLASS): Redefine to use xtensa_regno_to_class
	function.
	(WINDOW_SIZE): Define as 8 or 0 for windowed and call0 ABI
	respectively.
	(FUNCTION_PROFILER): Add _mcount call for call0 ABI.
	(TRAMPOLINE_SIZE): Define trampoline size for call0 ABI.
	(RETURN_ADDR_IN_PREVIOUS_FRAME): Define to 0 in call0 ABI.
	(ASM_OUTPUT_POOL_PROLOGUE): Always generate literal pool
	location in call0 ABI.
	(EH_RETURN_STACKADJ_RTX): New definition, use a10 for passing
	stack adjustment size when handling exception.
	(CRT_CALL_STATIC_FUNCTION): Add definition for call0 ABI.
	* config/xtensa/xtensa.md (A9_REG, UNSPECV_BLOCKAGE): New
	definitions.
	("return" pattern): Generate ret.n/ret in call0 ABI.
	("epilogue" pattern): Expand epilogue.
	("nonlocal_goto" pattern): Use default in call0 ABI.
	("eh_return" pattern): Move implementation to eh_set_a0_windowed,
	emit eh_set_a0_* depending on ABI.
	("eh_set_a0_windowed" pattern): Former eh_return pattern.
	("eh_set_a0_call0", "blockage"): New patterns.

libgcc/
	* config/xtensa/lib2funcs.S (__xtensa_libgcc_window_spill,
	__xtensa_nonlocal_goto): Don't compile for call0 ABI.
	(__xtensa_sync_caches): Only use entry and retw in windowed ABI,
	use ret in call0 ABI.
	* config/xtensa/t-windowed: New file.
	* libgcc/config/xtensa/t-xtensa (LIB2ADDEH): Move to t-windowed.
	* libgcc/configure: Regenerated.
	* libgcc/configure.ac: Check if xtensa target is configured for
	windowed ABI and thus needs to use custom unwind code.

From-SVN: r221158
2015-03-03 17:44:01 +00:00
Jonathan Wakely
7727f8f2c0 re PR libgcc/64885 (libstdc++ all_attributes failure)
PR libgcc/64885
	* gthr-single.h: Use __unused__ attribute instead of unused.
	* config/gthr-vxworks.h: Likewise.
	* config/i386/gthr-win32.h: Likewise.

From-SVN: r221120
2015-03-02 18:02:18 +00:00
Thomas Schwinge
b6530d0a50 [PR target/65181] nvptx libgcc: Prevent building "advanced" stuff (for example, gcov support)
When building GCC against a proper newlib sysroot, the libgcc build will
include more than what's built in the -Dinhibit_libc configuration used when
building newlib as part of the GCC build process.  See the inhibit_libc logic
in gcc/configure.ac.

To avoid...

    ptxas _gcov_indirect_call_topn_profiler.o, line 101; error   : Type or alignment of argument does not match formal parameter 'ptr'
    ptxas _gcov_indirect_call_topn_profiler.o, line 101; error   : Call has wrong number of parameters
    ptxas _gcov_indirect_call_topn_profiler.o, line 101; error   : Type or alignment of argument does not match formal parameter 'size'
    ptxas fatal   : Ptx assembly aborted due to errors
    nvptx-as: ptxas returned 255 exit status
    make[2]: *** [_gcov_indirect_call_topn_profiler.o] Error 1

..., "dumb down" the libgcc build:

	libgcc/
	PR target/65181
	* config/nvptx/t-nvptx (INHIBIT_LIBC_CFLAGS): Define to
	-Dinhibit_libc.

From-SVN: r220915
2015-02-23 18:51:41 +01:00
Sandra Loosemore
53cfb467cf bpabi.S (test_div_by_zero): Make label names consistent between thumb2 and arm mode cases.
2015-02-17  Sandra Loosemore  <sandra@codesourcery.com>

	libgcc/
	* config/arm/bpabi.S (test_div_by_zero): Make label names
	consistent between thumb2 and arm mode cases.  Separate the
	signed comparison on the high word of the numerator from the
	unsigned comparison on the low word.
	* config/arm/bpabi-v6m.S (test_div_by_zero): Similarly separate
	signed comparison.

	gcc/testsuite/
	* gcc.target/arm/divzero.c: New test case.

From-SVN: r220765
2015-02-17 12:39:22 -05:00
Joseph Myers
77d10a1b20 Avoid dependence on libc headers in nvptx realloc.
* config/nvptx/realloc.c: Include <stddef.h> instead of <stdlib.h>
	and <string.h>.
	(__nvptx_realloc): Call __builtin_memcpy instead of memcpy.

From-SVN: r220764
2015-02-17 16:19:56 +00:00
Nick Clifton
771bef141f fpmath-sf.S (__rl78_int_pack_a_r8): Fix edge case rounding up the fraction.
* config/rl78/fpmath-sf.S (__rl78_int_pack_a_r8): Fix edge case
	rounding up the fraction.

	* config/rl78/rl78.c (rl78_note_reg_set): Note the use of REGs
	inside a MEM.

From-SVN: r220410
2015-02-04 16:39:16 +00:00
John David Anglin
407028931a linux-atomic.c (__kernel_cmpxchg2): Change declaration of oldval and newval to const void *.
* config/pa/linux-atomic.c (__kernel_cmpxchg2): Change declaration of
	oldval and newval to const void *.  Fix typo.
	(FETCH_AND_OP_2): Use __atomic_load_n to load value.
	(FETCH_AND_OP_WORD): Likewise.
	(OP_AND_FETCH_WORD): Likewise.
	(COMPARE_AND_SWAP_2): Likewise.
	(__sync_val_compare_and_swap_4): Likewise.
	(__sync_lock_test_and_set_4): Likewise.
	(SYNC_LOCK_RELEASE_2): Likewise.
	Remove support for long long atomic operations.

From-SVN: r220307
2015-01-31 19:45:53 +00:00
Nick Clifton
8410904a77 cmpsi2.S: Use function start and end macros.
* config/rl78/cmpsi2.S: Use function start and end macros.
	(__gcc_bcmp): New function.
	* config/rl78/lshrsi3.S: Use function start and end macros.
	* config/rl78/mulsi3.S: Add support for G10.
	(__mulqi3): New function for G10.
	* config/rl78/signbit.S: Use function start and end macros.
	* config/rl78/t-rl78 (LIB2ADD): Add bit-count.S, fpbit-sf.S and
	fpmath-sf.S.
	(LIB2FUNCS_EXCLUDE): Define.
	(LIB2FUNCS_ST): Define.
	* config/rl78/trampoline.S: Use function start and end macros.
	* config/rl78/vregs.h (START_FUNC): New macro.
	(START_ANOTHER_FUNC): New macro.
	(END_FUNC): New macro.
	(END_ANOTHER_FUNC): New macro.
	* config/rl78/bit-count.S: New file.  Contains assembler
	implementations of the bit counting functions: ___clzhi2,
	__clzsi2, ctzhi2, ctzsi2, ffshi2, ffssi2, __partityhi2,
	__paritysi2, __popcounthi2 and __popcountsi2.
	* config/rl78/fpbit-sf.S: New file.  Contains assembler
	implementationas of the math functions: __negsf2, __cmpsf2,
	__eqsf2, __nesf2, __lesf2, __ltsf2, __gesf2, gtsf2, __unordsf2,
	__fixsfsi,  __fixunssfsi, __floatsisf and __floatunssisf.
	* config/rl78/fpmath-sf.S: New file.  Contains assembler
	implementations of the math functions: __subsf3, __addsf3,
	__mulsf3 and __divsf3

From-SVN: r220162
2015-01-27 11:36:01 +00:00
Rainer Orth
f962fbf14c Move Solaris/x86 CRT_GET_RFIB_DATA definition to libgcc
gcc:
	* config/i386/sysv4.h (CRT_GET_RFIB_DATA): Remove.

	libgcc:
	* config.host (i[34567]86-*-solaris2*, x86_64-*-solaris2.1[0-9]*):
	Add i386/elf-lib.h to tm_file.
	* config/i386/elf-lib.h: Fix comment.
	* unwind-dw2-fde-dip.c (_Unwind_IteratePhdrCallback) [__x86_64__
	&& __sun__ && __svr4__]: Remove workaround.

From-SVN: r220160
2015-01-27 10:02:26 +00:00
Allan Sandfeld Jensen
939911c558 i386.c (get_builtin_code_for_version): Add support for BMI and BMI2 multiversion functions.
gcc/ChangeLog:

	* config/i386/i386.c (get_builtin_code_for_version): Add
	support for BMI and BMI2 multiversion functions.
	(fold_builtin_cpu): Add F_BMI and F_BMI2.

libgcc/ChangeLog:

	* config/i386/cpuinfo.c (enum processor_features): Add FEATURE_BMI and
	FEATURE_BMI2.
	(get_available_features): Detect FEATURE_BMI and FEATURE_BMI2.

testsuite/ChangeLog:

	* gcc.target/i386/funcspec-5.c: Test new multiversion targets.
	* g++.dg/ext/mv17.C: Test BMI/BMI2 multiversion dispatcher.


Co-Authored-By: Uros Bizjak <ubizjak@gmail.com>

From-SVN: r220095
2015-01-25 19:17:46 +01:00
H.J. Lu
c8f2dff2c6 Support new Intel processor model numbers
gcc/

	* config/i386/driver-i386.c (host_detect_local_cpu): Check new
	Silvermont, Haswell, Broadwell and Knights Landing model numbers.
	* config/i386/i386.c (processor_model): Add
	M_INTEL_COREI7_BROADWELL.
	(arch_names_table): Add "broadwell".

gcc/testsuite/

	* gcc.target/i386/builtin_target.c (check_intel_cpu_model): Add
	Silvermont, Ivy Bridge, Haswell and Broadwell tests.  Update Sandy
	Bridge test.

2015-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/cpuinfo.c (processor_subtypes): Add
	INTEL_COREI7_BROADWELL.
	(get_intel_cpu): Support new Silvermont, Haswell and Broadwell
	model numbers.

From-SVN: r220090
2015-01-24 20:42:50 -08:00
Uros Bizjak
7bbf973451 elf-lib.h: New file.
libgcc/ChangeLog:

	* config/i386/elf-lib.h: New file.
	(CRT_GET_RFIB_DATA): Move definition from gcc/config/i386/gnu-user.h.
	Wrap definition in #ifdef __i386__.
	* libgcc/config.host (i[34567]86-*-linux*, i[34567]86-*-kfreebsd*-gnu)
	(i[34567]86-*-knetbsd*-gnu, i[34567]86-*-gnu*)
	(i[34567]86-*-kopensolaris*-gnu, x86_64-*-linux*)
	(x86_64-*-kfreebsd*-gnu, x86_64-*-knetbsd*-gnu): Add i386/elf-lib.h
	to tm_file.

gcc/ChangeLog:

	* config/i386/gnu-user.h (CRT_GET_RFIB_DATA): Move definition to
	libgcc/config/i386/elf-lib.h.

From-SVN: r220056
2015-01-23 20:46:43 +01:00
Chung-Lin Tang
a9ce4e4a70 nios2.c (nios2_asm_file_end): Implement TARGET_ASM_FILE_END hook for adding .note.GNU-stack section when needed.
2015-01-20  Chung-Lin Tang  <cltang@codesourcery.com>

	gcc/
	* config/nios2/nios2.c (nios2_asm_file_end): Implement
	TARGET_ASM_FILE_END hook for adding .note.GNU-stack section when
	needed.
	(TARGET_ASM_FILE_END): Define.

	libgcc/
	* config/nios2/linux-unwind.h (nios2_fallback_frame_state):
	Update rt_sigframe format and address for current Nios II
	Linux conventions.

From-SVN: r219898
2015-01-20 14:49:51 +00:00
Andreas Tobler
82a19768cb configure.ac: Don't add ${libgcj} for arm*-*-freebsd*.
toplevel:

    * configure.ac: Don't add ${libgcj} for arm*-*-freebsd*.
    * configure: Regenerate.
gcc:
    * config.gcc (arm*-*-freebsd*): New configuration.
    * config/arm/freebsd.h: New file.
    * config.host: Add extra components for arm*-*-freebsd*.
    * config/arm/arm.h: Introduce MAX_SYNC_LIBFUNC_SIZE.
    * config/arm/arm.c (arm_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE.

libgcc:

    * config.host (arm*-*-freebsd*): Add new configuration for
    arm*-*-freebsd*.
    * config/arm/freebsd-atomic.c: New file.
    * config/arm/t-freebsd: Likewise.
    * config/arm/unwind-arm.h: Add __FreeBSD__ to the list of
    'PC-relative indirect' OS's.

libatomic:

    * configure.tgt: Exclude arm*-*-freebsd* from try_ifunc.

libstdc++-v3:

    * configure.host: Add arm*-*-freebsd* port_specific_symbol_files.

From-SVN: r219388
2015-01-09 15:06:02 +01:00
Eric Botcazou
0969ec7d5d configure.ac: Add Visium support.
* configure.ac: Add Visium support.
	* configure: Regenerate.
libgcc/
	* config.host: Add Visium support.
	* config/visium: New directory.
gcc/
	* config.gcc: Add Visium support.
	* configure.ac: Likewise.
	* configure: Regenerate.
	* doc/extend.texi (interrupt attribute): Add Visium.
	* doc/invoke.texi: Document Visium options.
	* doc/install.texi: Document Visium target.
	* doc/md.texi: Document Visium constraints.
	* common/config/visium: New directory.
	* config/visium: Likewise.
gcc/testsuite/
	* lib/target-supports.exp (check_profiling_available): Return 0 for
	Visium.
	(check_effective_target_tls_runtime): Likewise.
	(check_effective_target_logical_op_short_circuit): Return 1 for Visium.
	* gcc.dg/20020312-2.c: Adjust for Visium.
	* gcc.dg/tls/thr-cse-1.c: Likewise
	* gcc.dg/tree-ssa/20040204-1.c: Likewise
	* gcc.dg/tree-ssa/loop-1.c: Likewise.
	* gcc.dg/weak/typeof-2.c: Likewise.

From-SVN: r219219
2015-01-06 08:50:12 +00:00
Jakub Jelinek
5624e564d2 Update copyright years.
From-SVN: r219188
2015-01-05 13:33:28 +01:00
Matthew Fortune
82f84ecbb4 MIPS32R6 and MIPS64R6 support
gcc/

	* config.gcc: Add mipsisa64r6 and mipsisa32r6 cpu support.
	* config/mips/constraints.md (ZD): Add r6 restrictions.
	* config/mips/gnu-user.h (DRIVER_SELF_SPECS): Add MIPS_ISA_LEVEL_SPEC.
	* config/mips/loongson.md
	(<u>div<mode>3, <u>mod<mode>3): Move to mips.md.
	* config/mips/mips-cpus.def (mips32r6, mips64r6): Define.
	* config/mips/mips-modes.def (CCF): New mode.
	* config/mips/mips-protos.h
	(mips_9bit_offset_address_p): New prototype.
	* config/mips/mips-tables.opt: Regenerate.
	* config/mips/mips.c (MIPS_JR): Use JALR $, <reg> for R6.
	(mips_rtx_cost_data): Add pseudo-processors W32 and W64.
	(mips_9bit_offset_address_p): New function.
	(mips_rtx_costs): Account for R6 multiply and FMA instructions.
	(mips_emit_compare): Implement R6 FPU comparisons.
	(mips_expand_conditional_move): Implement R6 selects.
	(mips_expand_conditional_trap): Account for removed trap immediate.
	(mips_expand_block_move): Disable inline move when LWL/LWR are removed.
	(mips_print_float_branch_condition): Update for R6 FPU branches.
	(mips_print_operand): Handle CCF mode compares.
	(mips_interrupt_extra_call_saved_reg_p): Do not attempt to callee-save
	MD_REGS for R6.
	(mips_hard_regno_mode_ok_p): Support CCF mode.
	(mips_mode_ok_for_mov_fmt_p): Likewise.
	(mips_secondary_reload_class): CCFmode can be loaded directly.
	(mips_set_fast_mult_zero_zero_p): Account for R6 multiply instructions.
	(mips_option_override): Ensure R6 is used with fp64.  Set default
	mips_nan modes.  Check for mips_nan support.  Prevent DSP with R6.
	(mips_conditional_register_usage): Disable MD_REGS for R6. Disable
	FPSW for R6.
	(mips_mulsidi3_gen_fn): Support R6 multiply instructions.
	* config/mips/mips.h (ISA_MIPS32R6, ISA_MIPS64R6): Define.
	(TARGET_CPU_CPP_BUILTINS): Rework for mips32/mips64.
	(ISA_HAS_JR): New macro.
	(ISA_HAS_HILO): New macro.
	(ISA_HAS_R6MUL): Likewise.
	(ISA_HAS_R6DMUL): Likewise.
	(ISA_HAS_R6DIV): Likewise.
	(ISA_HAS_R6DDIV): Likewise.
	(ISA_HAS_CCF): Likewise.
	(ISA_HAS_SEL): Likewise.
	(ISA_HAS_COND_TRAPI): Likewise.
	(ISA_HAS_FP_MADDF_MSUBF): Likewise.
	(ISA_HAS_LWL_LWR): Likewise.
	(ISA_HAS_IEEE_754_LEGACY): Likewise.
	(ISA_HAS_IEEE_754_2008): Likewise.
	(ISA_HAS_PREFETCH_9BIT): Likewise.
	(MIPSR6_9BIT_OFFSET_P): New macro.
	(BASE_DRIVER_SELF_SPECS): Use MIPS_ISA_DRIVER_SELF_SPECS.
	(DRIVER_SELF_SPECS): Use MIPS_ISA_LEVEL_SPEC.
	(MULTILIB_ISA_DEFAULT): Handle mips32r6 and mips64r6.
	(MIPS_ISA_LEVEL_SPEC): Likewise.
	(MIPS_ISA_SYNCI_SPEC): Likewise.
	(ISA_HAS_64BIT_REGS): Likewise.
	(ISA_HAS_BRANCHLIKELY): Likewise.
	(ISA_HAS_MUL3): Likewise.
	(ISA_HAS_DMULT): Likewise.
	(ISA_HAS_DDIV): Likewise.
	(ISA_HAS_DIV): Likewise.
	(ISA_HAS_MULT): Likewise.
	(ISA_HAS_FP_CONDMOVE): Likewise.
	(ISA_HAS_8CC): Likewise.
	(ISA_HAS_FP4): Likewise.
	(ISA_HAS_PAIRED_SINGLE): Likewise.
	(ISA_HAS_MADD_MSUB): Likewise.
	(ISA_HAS_FP_RECIP_RSQRT): Likewise.
	* config/mips/mips.md (processor): Add w32 and w64.
	(FPCC): New mode iterator.
	(reg): Add CCF mode.
	(fpcmp): New mode attribute.
	(fcond): Add ordered, ltgt and ne codes.
	(fcond): Update code attribute.
	(sel): New code attribute.
	(selinv): Likewise.
	(ctrap<mode>4): Update condition.
	(*conditional_trap_reg<mode>): New define_insn.
	(*conditional_trap<mode>): Update condition.
	(mul<mode>3): Expand R6 multiply instructions.
	(<su>mulsi3_highpart): Likewise.
	(<su>muldi3_highpart): Likewise.
	(mul<mode>3_mul3_loongson): Rename...
	(mul<mode>3_mul3_hilo): To this.  Add R6 mul instruction.
	(<u>mulsidi3_32bit_r6): New expander.
	(<u>mulsidi3_32bit): Restrict to pre-r6 multiplies.
	(<u>mulsidi3_32bit_r4000): Likewise.
	(<u>mulsidi3_64bit): Likewise.
	(<su>mulsi3_highpart_internal): Likewise.
	(mulsidi3_64bit_r6dmul): New instruction.
	(<su>mulsi3_highpart_r6): Likewise.
	(<su>muldi3_highpart_r6): Likewise.
	(fma<mode>4): Likewise.
	(movccf): Likewise.
	(*sel<code><GPR:mode>_using_<GPR2:mode>): Likewise.
	(*sel<mode>): Likewise.
	(<u>div<mode>3): Moved from loongson.md.  Add R6 instructions.
	(<u>mod<mode>3): Likewise.
	(extvmisalign<mode>): Require ISA_HAS_LWL_LWR.
	(extzvmisalign<mode>): Likewise.
	(insvmisalign<mode>): Likewise.
	(mips_cache): Account for R6 displacement field sizes.
	(*branch_fp): Rename...
	(*branch_fp_<mode>): To this.  Add CCFmode support.
	(*branch_fp_inverted): Rename...
	(*branch_fp_inverted_<mode>): To this.  Add CCFmode support.
	(s<code>_<mode>): Rename...
	(s<code>_<SCALARF:mode>_using_<FPCC:mode>): To this.  Add FCCmode
	condition support.
	(s<code>_<mode> swapped): Rename...
	(s<code>_<SCALARF:mode>_using_<FPCC:mode> swapped): To this. Add
	CCFmode condition support.
	(mov<mode>cc GPR): Expand R6 selects.
	(mov<mode>cc FPR): Expand R6 selects.
	(*tls_get_tp_<mode>_split): Do not .set push for >= mips32r2.
	* config/mips/netbsd.h (TARGET_CPU_CPP_BUILTINS): Update similarly to
	mips.h.
	(ASM_SPEC): Add mips32r6, mips64r6.
	* config/mips/t-isa3264 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Update
	for mips32r6/mips64r6.
	* doc/invoke.texi: Document -mips32r6,-mips64r6.
	* doc/md.texi: Update comment for ZD constraint.

libgcc/

	* config.host: Support mipsisa32r6 and mipsisa64r6.
	* config/mips/mips16.S: Do not build for R6.

gcc/testsuite/

	* gcc.dg/torture/mips-hilo-2.c: Unconditionally pass for R6 onwards.
	* gcc.dg/torture/pr19683-1.c: Likewise.
	* gcc.target/mips/branch-cost-2.c: Require MOVN.
	* gcc.target/mips/movcc-1.c: Likewise.
	* gcc.target/mips/movcc-2.c: Likewise.
	* gcc.target/mips/movcc-3.c: Likewise.
	* gcc.target/mips/call-saved-4.c: Require LDC.
	* gcc.target/mips/dmult-1.c: Require R5 or earlier.
	* gcc.target/mips/fpcmp-1.c: Likewise.
	* gcc.target/mips/fpcmp-2.c: Likewise.
	* gcc.target/mips/neg-abs-2.c: Likewise.
	* gcc.target/mips/timode-1.c: Likewise.
	* gcc.target/mips/unaligned-1.c: Likewise.
	* gcc.target/mips/madd-3.c: Require MADD.
	* gcc.target/mips/madd-9.c: Likewise.
	* gcc.target/mips/maddu-3.c: Likewise.
	* gcc.target/mips/msub-3.c: Likewise.
	* gcc.target/mips/msubu-3.c: Likewise.
	* gcc.target/mips/mult-1.c: Require INS and not DMUL.
	* gcc.target/mips/mips-ps-type-2.c: Require MADD.PS.
	* gcc.target/mips/mips.exp (mips_option_groups): Add ins, dmul, ldc,
	movn, madd, maddps.
	(mips-dg-options): INS available from R2.  LDC available from MIPS II,
	DMUL is present in octeon.  Describe all features removed from R6.

Co-Authored-By: Steve Ellcey <sellcey@imgtec.com>

From-SVN: r218973
2014-12-19 20:17:36 +00:00
Oleg Endo
69044fa9eb crt.h: New.
libgcc/
	* config/sh/crt.h: New.
	* config/sh/crti.S: Use GLOBAL macro from crt.h for _init and _fini
	symbols.
	* config/sh/crt1.S: Likewise.

From-SVN: r218807
2014-12-17 02:01:10 +00:00
Michael Haubenwallner
dd91332382 (libgcc_s) Optional filename-based shared library versioning on AIX.
2014-12-09  Michael Haubenwallner <michael.haubenwallner@ssi-schaefer.com>

        (libgcc_s) Optional filename-based shared library versioning on AIX.
        * gcc/doc/install.texi: Describe --with-aix-soname option.
        * Makefile.in (with_aix_soname): Define.
        * config/rs6000/t-slibgcc-aix: Act upon --with-aix-soname option.
        * configure.ac: Accept --with-aix-soname=aix|svr4|both option.
        * configure: Recreate.

From-SVN: r218539
2014-12-09 15:48:48 -05:00
Oleg Endo
6342b2c592 lib1funcs.S: Check value of __SHMEDIA__ instead of checking whether it's defined.
libgcc/
	* config/sh/lib1funcs.S: Check value of __SHMEDIA__ instead of checking
	whether it's defined.

From-SVN: r218190
2014-11-30 19:03:29 +00:00
Ilya Tocar
c17eac8561 Support avx512f in __builtin_cpu_supports.
gcc/

        * config/i386/cpuid.h (bit_MPX, bit_BNDREGS, bit_BNDCSR):
        Define.
        * config/i386/i386.c (get_builtin_code_for_version): Add avx512f.
        (fold_builtin_cpu): Ditto.
        * doc/extend.texi: Documment it.



gcc/testsuite/

        * g++.dg/ext/mv2.C: Add test for target ("avx512f").
        * gcc.target/i386/builtin_target.c: Ditto.



libgcc/

        * config/i386/cpuinfo.c (processor_features): Add FEATURE_AVX512F.
        * config/i386/cpuinfo.c (get_available_features): Detect it.

From-SVN: r218125
2014-11-27 16:51:10 +03:00
Tony Wang
1025cb6c0d lib1funcs.S (FUNC_START): Add conditional section redefine for macro L_arm_muldivsf3 and L_arm_muldivdf3.
2014-11-27  Tony Wang  <tony.wang@arm.com>

    libgcc/
    * config/arm/lib1funcs.S (FUNC_START): Add conditional section
    redefine for macro L_arm_muldivsf3 and L_arm_muldivdf3.
    (SYM_END, ARM_SYM_START): Add macros used to expose function Symbols.

From-SVN: r218124
2014-11-27 13:38:51 +00:00
John David Anglin
17f6e9a357 linux-atomic.c (ABORT_INSTRUCTION): Use __builtin_trap() instead.
* config/pa/linux-atomic.c (ABORT_INSTRUCTION): Use __builtin_trap()
	instead.

From-SVN: r218033
2014-11-24 23:39:47 +00:00
Guy Martin
0cd7c67283 linux-atomic.c (__kernel_cmpxchg2): New.
* config/pa/linux-atomic.c (__kernel_cmpxchg2): New.
	(FETCH_AND_OP_2): New.  Use for subword and double word operations.
	(OP_AND_FETCH_2): Likewise.
	(COMPARE_AND_SWAP_2): Likewise.
	(SYNC_LOCK_TEST_AND_SET_2): Likewise.
	(SYNC_LOCK_RELEASE_2): Likewise.
	(SUBWORD_SYNC_OP): Remove.
	(SUBWORD_VAL_CAS): Likewise.
	(SUBWORD_BOOL_CAS): Likewise.
	(FETCH_AND_OP_WORD): Update.
	Consistently use signed types.
	

Co-Authored-By: John David Anglin <danglin@gcc.gnu.org>

From-SVN: r217956
2014-11-22 00:18:49 +00:00