Commit graph

201927 commits

Author SHA1 Message Date
Martin Jambor
0be3a051c0
ipa-sra: Disable candidates with no known callers (PR 110276)
In IPA-SRA we use can_be_local_p () predicate rather than just plain
local call graph flag in order to figure out whether the node is a
part of an external API that we cannot change.  Although there are
cases where this can allow more transformations, it also means we can
analyze functions which have no callers at all, which is pointless.

Moreover, it makes an assert of hint propagation trigger, which checks
that we have looked at callers before processing hints that come from
them.  This has been reported as PR 110276.

This patch simply adds a check that a node has at least one caller
into the early checks and makes the node a non-candidate for any
transformation if it does not.

gcc/ChangeLog:

2023-06-16  Martin Jambor  <mjambor@suse.cz>

	PR ipa/110276
	* ipa-sra.cc (struct caller_issues): New field there_is_one.
	(check_for_caller_issues): Set it.
	(check_all_callers_for_issues): Check it.

gcc/testsuite/ChangeLog:

2023-06-16  Martin Jambor  <mjambor@suse.cz>

	PR ipa/110276
	* gcc.dg/ipa/pr110276.c: New test.
2023-06-20 18:16:29 +02:00
Martin Jambor
7f986e2ed9
ipa-cp: Avoid long linear searches through DECL_ARGUMENTS
There have been concerns that linear searches through DECL_ARGUMENTS
that are often necessary to compute the index of a particular
PARM_DECL which is the key to results of IPA-CP can happen often
enough to be a compile time issue, especially if we plug the results
into value numbering, as I intend to do with a follow-up patch.

This patch creates a vector sorted according to PARM_DECLs to do the look-up
for all functions which have some information discovered by IPA-CP and which
have 32 parameters or more.  32 is a hard-wired magical constant here to
capture the trade-off between the memory allocation overhead and length of the
linear search.  I do not think it is worth making it a --param but if people
think it appropriate, I can turn it into one.

gcc/ChangeLog:

2023-05-31  Martin Jambor  <mjambor@suse.cz>

	* ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
	(struct ipcp_transformation): Rearrange members	according to
	C++ class coding convention, add m_uid_to_idx,
	get_param_index and maybe_create_parm_idx_map.
	* ipa-cp.cc (ipcp_transformation::get_param_index): New function.
	(compare_uids): Likewise.
	(ipcp_transformation::maype_create_parm_idx_map): Likewise.
	* ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
	(ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
	(ipcp_update_vr): Likewise.
	(ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
	out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
2023-06-20 18:16:14 +02:00
Carl Love
86df278de1 rs6000: Add builtins for IEEE 128-bit floating point values
Add support for the following builtins:

 __vector unsigned long long int scalar_extract_exp_to_vec (__ieee128);
 __vector unsigned __int128 scalar_extract_sig_to_vec (__ieee128);
 __ieee128 scalar_insert_exp (__vector unsigned __int128,
 			      __vector unsigned long long);

The instructions used in the builtins operate on vector registers.  Thus
the result must be moved to a scalar type.  There is no clean, performant
way to do this.  The user code typically needs the result as a vector
anyway.

gcc/
	* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
	Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
	Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
	Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
	Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
	(CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
	CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
	* config/rs6000/rs6000-builtins.def
	(__builtin_vsx_scalar_extract_exp_to_vec,
	__builtin_vsx_scalar_extract_sig_to_vec,
	__builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
	Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
	xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
	* config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
	Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
	overloaded instance. Update comments.
	* config/rs6000/rs6000-overload.def
	(__builtin_vec_scalar_insert_exp): Add new overload definition with
	vector arguments.
	(scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
	overloaded definitions.
	* config/rs6000/vsx.md (V2DI_DI): New mode iterator.
	(DI_to_TI): New mode attribute.
	Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
	Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
	Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
	* doc/extend.texi (scalar_extract_exp_to_vec,
	scalar_extract_sig_to_vec): Add documentation for new builtins.
	(scalar_insert_exp): Add new overloaded builtin definition.

gcc/testsuite/
	* gcc.target/powerpc/bfp/scalar-extract-exp-8.c: New test case.
	* gcc.target/powerpc/bfp/scalar-extract-sig-8.c: New test case.
	* gcc.target/powerpc/bfp/scalar-insert-exp-16.c: New test case.
2023-06-20 11:42:40 -04:00
Jonathan Wakely
b4f1e4a644 libstdc++: Remove redundant code in std::to_array
libstdc++-v3/ChangeLog:

	* include/std/array (to_array(T(&)[N])): Remove redundant
	condition.
	(to_array(T(&&)[N])): Remove redundant std::move.
2023-06-20 15:35:48 +01:00
Robin Dapp
649c640cc4 RISC-V: testsuite: Add missing -mabi=lp64d.
This fixes more cases of missing -mabi=lp64d.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c: Add
	-mabi=lp64d.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-1.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-2.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-3.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-4.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-1.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-2.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-3.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-4.c: Dito.
2023-06-20 16:16:39 +02:00
Li Xu
cb421ffff6 RISC-V: Set the natural size of constant vector mask modes to one RVV data vector.
If reinterpret vnx2bi as vnx16qi, vnx16qi must occupy no more of the underlying
registers than vnx2bi.

Consider this following case:
void test_vreinterpret_v_b64_i8m1 (uint8_t *in, int8_t *out)
{
  vbool64_t vmask = __riscv_vlm_v_b64 (in, 2);
  vint8m1_t vout = __riscv_vreinterpret_v_b64_i8m1 (vmask);
  __riscv_vse8_v_i8m1(out, vout, 16);
}

compiler parameters: -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -O3
Compilation fails with:
test_vreinterpret_v_b64_i8m1during RTL pass: expand

test.c: In function 'test_vreinterpret_v_b64_i8m1':
test.c:11:22: internal compiler error: in gen_lowpart_general, at rtlhooks.cc:57
   11 |     vint8m1_t vout = __riscv_vreinterpret_v_b64_i8m1(src);
      |                      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0xf11876 gen_lowpart_general(machine_mode, rtx_def*)
        ../.././riscv-gcc/gcc/rtlhooks.cc:57
0x191435e gen_vreinterpretvnx16qi(rtx_def*, rtx_def*)
        ../.././riscv-gcc/gcc/config/riscv/vector.md:486
0xe08858 maybe_expand_insn(insn_code, unsigned int, expand_operand*)
        ../.././riscv-gcc/gcc/optabs.cc:8213
0x1471209 riscv_vector::function_expander::generate_insn(insn_code)
        ../.././riscv-gcc/gcc/config/riscv/riscv-vector-builtins.cc:3813
0x147629c riscv_vector::function_expander::expand()
        ../.././riscv-gcc/gcc/config/riscv/riscv-vector-builtins.h:520
0x147629c riscv_vector::expand_builtin(unsigned int, tree_node*, rtx_def*)
        ../.././riscv-gcc/gcc/config/riscv/riscv-vector-builtins.cc:4103
0x9868f9 expand_builtin(tree_node*, rtx_def*, rtx_def*, machine_mode, int)
        ../.././riscv-gcc/gcc/builtins.cc:7342

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
	size of vector mask mode to one rvv register.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vreinterpet-fixed.c: New test.
2023-06-20 22:14:22 +08:00
Juzhe-Zhong
1c0b118bab RISC-V: Optimize codegen of VLA SLP
Add comments for Robin:
We want to create a pattern where value[ix] = floor (ix / NPATTERNS).
As NPATTERNS is always a power of two we can rewrite this as
= ix & -NPATTERNS.
`
Recently, I figure out a better approach in case of codegen for VLA stepped vector.

Here is the detail descriptions:

Case 1:
void
f (uint8_t *restrict a, uint8_t *restrict b)
{
  for (int i = 0; i < 100; ++i)
    {
      a[i * 8] = b[i * 8 + 37] + 1;
      a[i * 8 + 1] = b[i * 8 + 37] + 2;
      a[i * 8 + 2] = b[i * 8 + 37] + 3;
      a[i * 8 + 3] = b[i * 8 + 37] + 4;
      a[i * 8 + 4] = b[i * 8 + 37] + 5;
      a[i * 8 + 5] = b[i * 8 + 37] + 6;
      a[i * 8 + 6] = b[i * 8 + 37] + 7;
      a[i * 8 + 7] = b[i * 8 + 37] + 8;
    }
}

We need to generate the stepped vector:
NPATTERNS = 8.
{ 0, 0, 0, 0, 0, 0, 0, 0, 8, 8, 8, 8, 8, 8, 8, 8 }

Before this patch:
vid.v    v4         ;; {0,1,2,3,4,5,6,7,...}
vsrl.vi  v4,v4,3    ;; {0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,...}
li       a3,8       ;; {8}
vmul.vx  v4,v4,a3   ;; {0,0,0,0,0,0,0,8,8,8,8,8,8,8,8,...}

After this patch:
vid.v    v4                    ;; {0,1,2,3,4,5,6,7,...}
vand.vi  v4,v4,-8(-NPATTERNS)  ;; {0,0,0,0,0,0,0,8,8,8,8,8,8,8,8,...}

Case 2:
void
f (uint8_t *restrict a, uint8_t *restrict b)
{
  for (int i = 0; i < 100; ++i)
    {
      a[i * 8] = b[i * 8 + 3] + 1;
      a[i * 8 + 1] = b[i * 8 + 2] + 2;
      a[i * 8 + 2] = b[i * 8 + 1] + 3;
      a[i * 8 + 3] = b[i * 8 + 0] + 4;
      a[i * 8 + 4] = b[i * 8 + 7] + 5;
      a[i * 8 + 5] = b[i * 8 + 6] + 6;
      a[i * 8 + 6] = b[i * 8 + 5] + 7;
      a[i * 8 + 7] = b[i * 8 + 4] + 8;
    }
}

We need to generate the stepped vector:
NPATTERNS = 4.
{ 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12, ... }

Before this patch:
li       a6,134221824
slli     a6,a6,5
addi     a6,a6,3        ;; 64-bit: 0x0003000200010000
vmv.v.x  v6,a6          ;; {3, 2, 1, 0, ... }
vid.v    v4             ;; {0, 1, 2, 3, 4, 5, 6, 7, ... }
vsrl.vi  v4,v4,2        ;; {0, 0, 0, 0, 1, 1, 1, 1, ... }
li       a3,4           ;; {4}
vmul.vx  v4,v4,a3       ;; {0, 0, 0, 0, 4, 4, 4, 4, ... }
vadd.vv  v4,v4,v6       ;; {3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12, ... }

After this patch:
li	a3,-536875008
slli	a3,a3,4
addi	a3,a3,1
slli	a3,a3,16
vmv.v.x	v2,a3           ;; {3, 1, -1, -3, ... }
vid.v	v4              ;; {0, 1, 2, 3, 4, 5, 6, 7, ... }
vadd.vv	v4,v4,v2        ;; {3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12, ... }

gcc/ChangeLog:

	* config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/partial/slp-1.c: Adapt testcase.
	* gcc.target/riscv/rvv/autovec/partial/slp-16.c: New test.
	* gcc.target/riscv/rvv/autovec/partial/slp_run-16.c: New test.
2023-06-20 21:59:22 +08:00
Robin Dapp
b26f1735cb RISC-V: testsuite: Add -Wno-psabi to vec_set/vec_extract testcases.
This fixes some fallout from the recent psabi changes.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-1.c: Add
	-Wno-psabi.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-2.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-3.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-4.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c:
	Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-1.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-2.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-3.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-4.c: Dito.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c: Dito.
2023-06-20 15:04:19 +02:00
Lehua Ding
4a6c44f4ad RISC-V: Fix compiler warning of riscv_arg_has_vector
Hi,

This little patch fixes a compile warning issue that my previous patch
introduced, sorry for introducing this issue.

Best,
Lehua

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_arg_has_vector): Add default
	switch handler.
2023-06-20 15:04:19 +02:00
Robin Dapp
37c167e89b RISC-V: testsuite: Fix vmul test expectation and fix -ffast-math.
I forgot to check for vfmul in the multiplication tests as well as
some -ffast-math arguments.  Fix this.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/binop/vadd-run.c: Add
	-ffast-math.
	* gcc.target/riscv/rvv/autovec/binop/vadd-zvfh-run.c: Dito.
	* gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c: Remove
	-ffast-math
	* gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c: Check for
	vfmul.
	* gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c: Dito.
2023-06-20 15:04:09 +02:00
Tobias Burnus
99e3214f58 Fortran: Fix parse-dump-tree for OpenMP ALLOCATE clause
Commit r14-1301-gd64e8e1224708e added u2.allocator to gfc_omp_namelist
for better readability and to permit to use namelist->expr for code
like the following:
  !$omp allocators allocate(align(32) : dt%alloc_comp)
    allocate (dt%alloc_comp(5))
  !$omp allocate(dt%alloc_comp2) align(64)
    allocate (dt%alloc_comp2(10))
However, for the parse-tree dump the change was incomplete.

gcc/fortran/ChangeLog:

	* dump-parse-tree.cc (show_omp_namelist): Fix dump of the allocator
	modifier of OMP_LIST_ALLOCATE.
2023-06-20 13:49:54 +02:00
Eric Botcazou
6f695bfd73 ada: Minor tweaks
gcc/ada/

	* gcc-interface/decl.cc (gnat_to_gnu_entity) <E_Variable>: Pass
	the NULL_TREE explicitly and test imported_p in lieu of
	Is_Imported. <E_Function>: Remove public_flag local variable and
	make extern_flag local variable a constant.
2023-06-20 13:25:28 +02:00
Yannick Moy
c11ef75cb2 ada: Fix crash on inlining in GNATprove
After the recent change on detection of non-inlining, calls inside
the iterator part of a quantified expression were not considered
as preventing inlining anymore, leading to a crash later on inside
GNATprove. Now fixed.

gcc/ada/

	* sem_res.adb (Resolve_Call): Fix change that replaced test for
	quantified expressions by the test for potentially unevaluated
	contexts. Both should be performed.
2023-06-20 13:25:28 +02:00
Eric Botcazou
865c5db7cb ada: Further fixes to handling of private views in instances
This removes more bypasses for private views in instances that are present
in type predicates (Conforming_Types, Covers, Specific_Type and Wrong_Type),
which in exchange requires additional work in Sem_Ch12 to restore the proper
view of types during the instantiation of generic bodies.

The main mechanism for this is the Has_Private_View flag, but it comes with
the limitations that 1) there must be a direct reference to the global type
in the generic construct (either a reference to a global object of this type
or the explicit declaration of a local object of this type), which is not
always the case e.g. for loop parameters and 2) it can deal with a single
type at a time, e.g. it cannot deal with an array type and its component
type if their respective views are not the same in the instance.

To overcome the second limitation, a new Has_Secondary_Private_View flag
is introduced to deal with a secondary type, which as of this writing is
either the component type of an array type or the designated type of an
access type (together they make up the vast majority of the problematic
cases for the Has_Private_View flag alone). This new mechanism subsumes
a specific treatment for them that was added in Copy_Generic_Node a few
years ago, although a specific treatment still needs to be preserved for
comparison and equality operators in a narrower case.

Additional handling is also introduced to overcome the first limitation
for loop parameters in Copy_Generic_Node, and a relaxed condition is used
in Exp_Ch7.Convert_View to generate an unchecked conversion between views.

gcc/ada/

	* exp_ch7.adb (Convert_View): Detect more cases of mismatches for
	private types and use Implementation_Base_Type as main criterion.
	* gen_il-fields.ads (Opt_Field_Enum): Add
	Has_Secondary_Private_View
	* gen_il-gen-gen_nodes.adb (N_Expanded_Name): Likewise.
	(N_Direct_Name): Likewise.
	(N_Op): Likewise.
	* sem_ch12.ads (Check_Private_View): Document the usage of second
	flag Has_Secondary_Private_View.
	* sem_ch12.adb (Get_Associated_Entity): New function to retrieve
	the ultimate associated entity, if any.
	(Check_Private_View): Implement Has_Secondary_Private_View
	support.
	(Copy_Generic_Node): Remove specific treatment for Component_Type
	of an array type and Designated_Type of an access type. Add
	specific treatment for comparison and equality operators, as well
	as iterator and loop parameter specifications.
	(Instantiate_Type): Implement Has_Secondary_Private_View support.
	(Requires_Delayed_Save): Call Get_Associated_Entity.
	(Set_Global_Type): Implement Has_Secondary_Private_View support.
	* sem_ch6.adb (Conforming_Types): Remove bypass for private views
	in instances.
	* sem_type.adb (Covers): Return true if Is_Subtype_Of does so.
	Remove bypass for private views in instances.
	(Specific_Type): Likewise.
	* sem_util.adb (Wrong_Type): Likewise.
	* sinfo.ads (Has_Secondary_Private_View): Document new flag.
2023-06-20 13:25:28 +02:00
Ronan Desplanques
31edd39bc4 ada: Remove outdated comment
The Preelaborate pragma the removed comment was referring to was
indeed present in AI 167, as well as in clause 5.3 of the rationale
for Ada 2012, but it never made it into the 2012 version of the
reference manual.

gcc/ada/

	* libgnarl/s-mudido.ads: Remove outdated comment.
2023-06-20 13:25:28 +02:00
Tobias Burnus
0607e93490 Fortran's gfc_match_char: %S to match symbol with host_assoc
gfc_match ("... %s ...", ...) matches a gfc_symbol but with
host_assoc = 0. This commit adds '%S' as variant which matches
with host_assoc = 1

gcc/fortran/ChangeLog:

	* match.cc (gfc_match_char): Match with '%S' a symbol
	with host_assoc = 1.
2023-06-20 13:23:40 +02:00
Richard Biener
9d597e0075 Improve DSE to handle stores before __builtin_unreachable ()
DSE isn't good at identifying program points that end lifetime
of variables that are not associated with virtual operands.  But
at least for those that end basic-blocks we can handle the simple
case where this ending is in the same basic-block as the definition
we want to elide.  That should catch quite some common cases already.

	* tree-ssa-dse.cc (dse_classify_store): When we found
	no defs and the basic-block with the original definition
	ends in __builtin_unreachable[_trap] the store is dead.

	* gcc.dg/tree-ssa/ssa-dse-47.c: New testcase.
	* c-c++-common/asan/pr106558.c: Avoid undefined behavior
	due to missing return.
2023-06-20 12:48:24 +02:00
Richard Biener
85107abeb7 Update virtual SSA form manually where easily possible in phiprop
This keeps virtual SSA form up-to-date in phiprop when easily possible.
Only when we deal with aggregate copies the work would be too
heavy-handed in general.

	* tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
	keep the virtual SSA form up-to-date.
2023-06-20 12:48:23 +02:00
Kyrylo Tkachov
63aaff9b3a aarch64: Optimise ADDP with same source operands
We've been asked to optimise the testcase in this patch of a 64-bit ADDP with
the low and high halves of the same 128-bit vector. This can be done by a
single .4s ADDP followed by just reading the bottom 64 bits. A splitter for
this is quite straightforward now that all the vec_concat stuff is collapsed
by simplify-rtx.

With this patch we generate a single:
	addp	v0.4s, v0.4s, v0.4s
instead of:
        dup     d31, v0.d[1]
        addp    v0.2s, v0.2s, v31.2s
        ret

Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf.

gcc/ChangeLog:

	* config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
	New define_insn_and_split.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/simd/addp-same-low_1.c: New test.
2023-06-20 11:03:47 +01:00
Tamar Christina
36de416df8 AArch64: remove test comment from *mov<mode>_aarch64
I accidentally left a test comment in the final version of the patch.
This removes the comment.

gcc/ChangeLog:

	* config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
2023-06-20 08:54:42 +01:00
Eric Botcazou
eb5c593cab ada: Fix couple of issues in documentation of overflow checking
There is still a mention of the defunct CHECKED mode and the Default
Settings paragraph is confusing with regard to the -gnato switch.

gcc/ada/

	* doc/gnat_ugn/gnat_and_program_execution.rst (Overflows in GNAT)
	<Default Settings>: Remove obsolete paragraph about -gnato.
	<Implementation Notes>: Replace CHECKED with STRICT.
	* gnat_ugn.texi: Regenerate.
2023-06-20 09:30:50 +02:00
Yannick Moy
8912b95779 ada: Do not issue warning on postcondition in some cases
Warning on suspicious postcondition is not relevant if contract
Exceptional_Cases is present, or if contract Always_Terminates is
present with a non-statically True value, as in those cases the
postcondition can be used to indicate constraints on those pre-state
for which the subprogram might terminate normally.

gcc/ada/

	* sem_util.adb (Check_Result_And_Post_State): Do not warn in cases
	where the warning could be spurious.
2023-06-20 09:30:50 +02:00
Yannick Moy
f1c15fe3f0 ada: Add the ability to add error codes to error messages
Add a new character sequence [] for error codes in error messages
handled by Error_Msg procedures, to use for SPARK-related errors.
Display of additional information on the error or warning based on
the error code is delegated to GNATprove.

gcc/ada/

	* err_vars.ads (Error_Msg_Code): New variable for error codes.
	* errout.adb (Error_Msg_Internal): Display continuation message
	when an error code was present.
	(Set_Msg_Text): Handle character sequence [] for error codes.
	* errout.ads: Document new insertion sequence [].
	(Error_Msg_Code): New renaming.
	* erroutc.adb (Prescan_Message): Detect presence of error code.
	(Set_Msg_Insertion_Code): Handle new insertion sequence [].
	* erroutc.ads (Has_Error_Code): New variable for prescan.
	(Set_Msg_Insertion_Code): Handle new insertion sequence [].
	* contracts.adb (Check_Type_Or_Object_External_Properties):
	Replace reference to SPARK RM section by an error code.
	* sem_elab.adb (SPARK_Processor): Same.
	* sem_prag.adb (Check_Missing_Part_Of): Same.
	* sem_res.adb (Resolve_Actuals, Resolve_Entity_Name): Same.
2023-06-20 09:30:50 +02:00
Piotr Trojanek
b367a66cfb ada: Fix for attribute Range in Exceptional_Cases
Attribute Range is now handled like First and Last when occurring within
the consequence of Exceptional_Cases, i.e. attribute Range is not
considered to be a read of a formal parameter that would not be allowed
in the contract.

gcc/ada/

	* sem_res.adb (Resolve_Entity_Name): Handle Range like First and Last.
2023-06-20 09:30:50 +02:00
Jose Ruiz
0aca9f500e ada: Document partition-wide Ada signal handlers
Indicate the signal handlers that are set by the Ada
run time, and explain how to prevent them if needed.

gcc/ada/

	* doc/gnat_ugn/the_gnat_compilation_model.rst
	(Partition-Wide Settings): add this subsection to document
	configuration settings made by the Ada run time.
	* gnat_ugn.texi: Regenerate.
2023-06-20 09:30:49 +02:00
Piotr Trojanek
86f03e37d6 ada: Fix for quantified expressions in Exceptional_Cases
When detecting illegal uses of formal parameters of the current
subprogram in contract of its Exceptional_Cases, we relied on the
Current_Scope. However, quantified expressions introduce an implicit
scope, which we need to take into account.

gcc/ada/

	* sem_res.adb (Resolve_Entity_Name): Ignore implicit loop scopes
	introduced by quantified expressions.
2023-06-20 09:30:49 +02:00
Bob Duff
970ee828e7 ada: Fix bug in predicate checks with address clauses
This patch fixes a compiler bug triggered by having a type with some
defaulted components, and a predicate, and an object of that type with
an address clause. In this case, the compiler was crashing.

gcc/ada/

	* sem_ch3.adb (Analyze_Object_Declaration): Remove predicate-check
	generation if there is an address clause. These are unnecessary,
	and cause gigi to crash.
	* exp_util.ads (Following_Address_Clause): Remove obsolete "???"
	comments. The suggested changes were done long ago.
2023-06-20 09:30:49 +02:00
Eric Botcazou
d39664b659 ada: Fix fallout of fix to handling of private views in instances
Check_Actual_Type incorrectly switches the view of a private type declared
in the enclosing scope of a generic unit but that has a private ancestor.

gcc/ada/

	* einfo.ads (Has_Private_Ancestor): Fix inaccuracy in description.
	* sem_ch12.adb (Check_Actual_Type): Do not switch the view of the
	type if it has a private ancestor.
2023-06-20 09:30:49 +02:00
Daniel King
b9b1dcc841 ada: Add CHERI intrinsic bindings and helper functions.
The package Interfaces.CHERI provides intrinsic bindings and
helper functions to allow software to query, create, and
manipulate CHERI capabilities.

gcc/ada/

	* libgnat/i-cheri.ads: Add CHERI intrinsics and helper functions.
	* libgnat/i-cheri.adb: Likewise
2023-06-20 09:30:49 +02:00
Eric Botcazou
ccacd752a4 ada: Small fixes to handling of private views in instances
The main change is the removal of the special bypass for private views in
Resolve_Implicit_Dereference, which in exchange requires additional work
in Check_Generic_Actuals and a couple more calls to Set_Global_Type in
Save_References_In_Identifier.  This also removes an unused parameter in
Convert_View and adds a missing comment in Build_Derived_Record_Type.

gcc/ada/

	* exp_ch7.adb (Convert_View): Remove Ind parameter and adjust.
	* sem_ch12.adb (Check_Generic_Actuals): Check the type of both in
	and in out actual objects, as well as the type of formal parameters
	of actual subprograms.  Extend the condition under which the views
	are swapped to nested generic constructs.
	(Save_References_In_Identifier): Call Set_Global_Type on a global
	identifier rewritten as an explicit dereference, either directly
	or after having first been rewritten as a function call.
	(Save_References_In_Operator): Set N2 unconditionally and reuse it.
	* sem_ch3.adb (Build_Derived_Record_Type): Add missing comment.
	* sem_res.adb (Resolve_Implicit_Dereference): Remove special bypass
	for private views in instances.
2023-06-20 09:30:49 +02:00
Eric Botcazou
d22792bc24 ada: Fix internal error on aggregate within container aggregate
This just applies the same fix to Expand_Array_Aggregate as the one that was
recently applied to Convert_To_Assignments.

gcc/ada/

	* exp_aggr.adb (Convert_To_Assignments): Tweak comment.
	(Expand_Array_Aggregate): Do not delay the expansion if the parent
	node is a container aggregate.
2023-06-20 09:30:49 +02:00
Ghjuvan Lacambre
3404e481d0 ada: Fix -fdiagnostics-format=json not printing all messages
The previous version of this code stopped printing messages as soon as
it encountered a deleted or continuation message. This was wrong,
continuation and deleted messages can be followed by live messages that
do need to be printed.

gcc/ada/

	* errout.adb (Output_Messages): Fix loop termination condition.
2023-06-20 09:30:49 +02:00
Eric Botcazou
298a486c58 ada: Introduce -gnateH switch to force reverse Bit_Order threshold to 64
This can be helpful for legacy code that still makes use of an original
reverse Bit_Order clause, i.e. without a Scalar_Storage_Order clause.

gcc/ada/

	* doc/gnat_ugn/building_executable_programs_with_gnat.rst (Compiler
	Switches): Document -gnateH.
	* opt.ads (Reverse_Bit_Order_Threshold): New variable.
	* sem_ch13.adb (Adjust_Record_For_Reverse_Bit_Order): Use its value
	if it is nonnegative instead of System_Max_Integer_Size.
	* switch-c.adb (Scan_Front_End_Switches): Deal with -gnateH.
	* usage.adb (Usage): Print -gnateH.
	* gnat_ugn.texi: Regenerate.
2023-06-20 09:30:48 +02:00
Yannick Moy
adc853f066 ada: Update annotations in runtime for proof
With bump of stable SPARK used for proof of the runtime,
some annotations need to change.

gcc/ada/

	* libgnat/s-aridou.adb (Scaled_Divide): Add assertions.
	* libgnat/s-valuti.adb: Add Loop_Variant.
	* libgnat/s-valuti.ads: Add Exceptional_Cases on No_Return
	procedure.
2023-06-20 09:30:48 +02:00
Marc Poulhiès
ca27b8a030 ada: Fix type derivation of subtype of derived type
Deriving from a subtype of a derived type of a private type, whose full
view is itself a derived type of a discriminated record with a known
discriminatant was failing with the error message:

  invalid constraint: type has no discriminant

The compiler needs to use the full view to be able to constrain the
type.

Also fix minor typo in comments.

gcc/ada/

	* sem_ch3.adb (Build_Derived_Record_Type): Use full view as
	Parent_Base if needed.
2023-06-20 09:30:48 +02:00
Ghjuvan Lacambre
2071134b54 ada: Pass Error_Node to calls to Error_Msg in lib-load.adb
When not passing Error_Node, Error_Msg will treat Current_Node as the
node attached to the message. When this happens in lib-load.adb due to a
file that cannot be loaded, Current_Node might reference a node that
doesn't actually exist. This is a problem when using -gnatdJ and
-fdiagnostics-format, as in this case GNAT will attempt to retrieve
information from the node attached to the message and thus crash when
said node is invalid.

gcc/ada/

	* lib-load.adb (Load_Unit): Pass Error_Node to calls to Error_Msg.
2023-06-20 09:30:48 +02:00
Claire Dross
b1c3d01619 ada: Remove references to Might_Not_Return and Always_Return
The Might_Not_Return and Always_Return annotations for GNATprove
should now be replaced by the two more precise aspects
Exceptional_Cases and Always_Terminates.
They allow to specify whether a subprogram is allowed to raise
exceptions or fail to complete.

gcc/ada/

	* libgnat/a-strfix.ads: Replace Might_Not_Return annotations by
	Exceptional_Cases and Always_Terminates aspects.
	* libgnat/a-tideio.ads: Idem.
	* libgnat/a-tienio.ads: Idem.
	* libgnat/a-tifiio.ads: Idem.
	* libgnat/a-tiflio.ads: Idem.
	* libgnat/a-tiinio.ads: Idem.
	* libgnat/a-timoio.ads: Idem.
	* libgnat/a-textio.ads: Idem. Also mark functions Name, Col, Line,
	and Page as out of SPARK as they might raise Layout_Error.
	* libgnarl/a-reatim.ads: Replace Always_Return annotations by
	Always_Terminates aspects.
	* libgnat/a-chahan.ads: Idem.
	* libgnat/a-nbnbig.ads: Idem.
	* libgnat/a-nbnbin.ads: Idem.
	* libgnat/a-nbnbre.ads: Idem.
	* libgnat/a-ngelfu.ads: Idem.
	* libgnat/a-nlelfu.ads: Idem.
	* libgnat/a-nllefu.ads: Idem.
	* libgnat/a-nselfu.ads: Idem.
	* libgnat/a-nuelfu.ads: Idem.
	* libgnat/a-strbou.ads: Idem.
	* libgnat/a-strmap.ads: Idem.
	* libgnat/a-strsea.ads: Idem.
	* libgnat/a-strsup.ads: Idem.
	* libgnat/a-strunb.ads: Idem.
	* libgnat/a-strunb__shared.ads: Idem.
	* libgnat/g-souinf.ads: Idem.
	* libgnat/i-c.ads: Idem.
	* libgnat/interfac.ads: Idem.
	* libgnat/interfac__2020.ads: Idem.
	* libgnat/s-aridou.adb: Idem.
	* libgnat/s-arit32.adb: Idem.
	* libgnat/s-atacco.ads: Idem.
	* libgnat/s-spcuop.ads: Idem.
	* libgnat/s-stoele.ads: Idem.
	* libgnat/s-vaispe.ads: Idem.
	* libgnat/s-vauspe.ads: Idem.
	* libgnat/i-cstrin.ads: Add a precondition instead of a
	Might_Not_Return annotation.
2023-06-20 09:30:48 +02:00
Javier Miranda
862f84b4a3 ada: Spurious error on package instantiation
The compiler reports spurious errors processing the instantation
of a generic package when the instantation is performed in the
the body of a package that has a private type T, a dispatching
primitive of T has the same name as a component of T, and
an extension of T is used as the actual parameter for a
formal derived type of T in the instantiation.

gcc/ada/

	* sem_ch4.adb
	(Try_Selected_Component_In_Instance): New subprogram; factorizes
	existing code.
	(Find_Component_In_Instance) Moved inside the new subprogram.
	(Analyze_Selected_Component): Invoke the new subprogram before
	trying the Object.Operation notation.
2023-06-20 09:30:48 +02:00
Ronan Desplanques
869216ec14 ada: Fix edge case in Ada.Calendar.Formatting.Time_Of
Before this patch, Ada.Calendar.Formatting.Time_Of executed extra code
when passed a number of seconds equal to the number of seconds in a day.
This caused the result to be off, perhaps because a statement resetting
the number of seconds to zero was missing.

Instead of adding such a statement, this patch removes the special
handling of the problematic case, which gives the intended result.

gcc/ada/

	* libgnat/a-calfor.adb (Time_Of): Fix handling of special case.
2023-06-20 09:30:48 +02:00
Jan Beulich
d3a21558fd x86: correct and improve "*vec_dupv2di"
The input constraint for the %vmovddup alternative was wrong, as the
upper 16 XMM registers require AVX512VL to be used with this insn. To
compensate, introduce a new alternative permitting all 32 registers, by
broadcasting to the full 512 bits in that case if AVX512VL is not
available.

gcc/

	* config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
	constraint. Add new AVX512F alternative.

gcc/testsuite/

	* gcc.target/i386/avx512f-dupv2di.c: New test.
2023-06-20 09:05:48 +02:00
Richard Biener
963f87f8a6 debug/110295 - mixed up early/late debug for member DIEs
When we process a scope typedef during early debug creation and
we have already created a DIE for the type when the decl is
TYPE_DECL_IS_STUB and this DIE is still in limbo we end up
just re-parenting that type DIE instead of properly creating
a DIE for the decl, eventually picking up the now completed
type and creating DIEs for the members.  Instead this is currently
defered to the second time we come here, when we annotate the
DIEs with locations late where now the type DIE is no longer
in limbo and we fall through doing the job for the decl.

The following makes sure we perform the necessary early tasks
for this by continuing with the decl DIE creation after setting
a parent for the limbo type DIE.

	PR debug/110295
	* dwarf2out.cc (process_scope_var): Continue processing
	the decl after setting a parent in case the existing DIE
	was in limbo.

	* g++.dg/debug/pr110295.C: New testcase.
2023-06-20 08:59:20 +02:00
Juzhe-Zhong
62514099cb RISC-V: Fix fails of testcases
FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test for excess errors)
Excess errors:
xgcc: fatal error: Cannot find suitable multilib set for '-march=rv64imafdcv_zicsr_zifencei_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b'/'-mabi=lp64d'
compilation terminated.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-run.c: Fix fail.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_extract-zvfh-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c: Ditto.
2023-06-20 09:17:03 +08:00
Lehua Ding
1d2308d685 RISC-V: Add tuple vector mode psABI checking and simplify code
Hi,

This patch does several things:
  1. Adds the missed checking of tuple vector mode
  2. Extend the scope of checking to all vector types, previously it
     was only for scalable vector types.
  3. Simplify the logic of determining code of vector type which will lower to
     vector tmode  code

Best,
Lehua

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
	(riscv_arg_has_vector): Simplify.
	(riscv_pass_in_vector_p): Adjust warning message.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/fixed-vlmax-1.c: Add -Wno-psabi option.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-7.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-7.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-7.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-7.c: Ditto.
	* gcc.target/riscv/rvv/base/pr110119-1.c: Ditto.
	* gcc.target/riscv/rvv/base/pr110119-2.c: Ditto.
	* gcc.target/riscv/vector-abi-1.c: Ditto.
	* gcc.target/riscv/vector-abi-2.c: Ditto.
	* gcc.target/riscv/vector-abi-3.c: Ditto.
	* gcc.target/riscv/vector-abi-4.c: Ditto.
	* gcc.target/riscv/vector-abi-5.c: Ditto.
	* gcc.target/riscv/vector-abi-6.c: Ditto.
	* gcc.target/riscv/vector-abi-7.c: New test.
	* gcc.target/riscv/vector-abi-8.c: New test.
	* gcc.target/riscv/vector-abi-9.c: New test.
2023-06-20 09:15:11 +08:00
GCC Administrator
e517d3f571 Daily bump. 2023-06-20 00:17:14 +00:00
Ben Boeckel
c1dbaa6656 libcpp: reject codepoints above 0x10FFFF
Unicode does not support such values because they are unrepresentable in
UTF-16.

libcpp/

	* charset.cc: Reject encodings of codepoints above 0x10FFFF.
	UTF-16 does not support such codepoints and therefore all
	Unicode rejects such values.

Signed-off-by: Ben Boeckel <ben.boeckel@kitware.com>
2023-06-19 17:20:41 -04:00
Jin Ma
dbcbc858c7 RISC-V: Save and restore FCSR in interrupt functions to avoid program errors.
In order to avoid interrupt functions to change the FCSR, it needs to be saved
and restored at the beginning and end of the function.

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
	(riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
	* config/riscv/riscv.md (riscv_frcsr): New patterns.
	(riscv_fscsr): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/interrupt-fcsr-1.c: New test.
	* gcc.target/riscv/interrupt-fcsr-2.c: New test.
	* gcc.target/riscv/interrupt-fcsr-3.c: New test.
2023-06-19 13:02:47 -06:00
Toru Kisuki
827b2a279f Do not allow "x + 0.0" to "x" optimization with -fsignaling-nans
gcc/
	PR rtl-optimization/110305
	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
	Handle HONOR_SNANS for x + 0.0.
2023-06-19 11:53:11 -06:00
Jan Hubicka
7b34cacc57 optimize std::max early
we currently produce very bad code on loops using std::vector as a stack, since
we fail to inline push_back which in turn prevents SRA and we fail to optimize
out some store-to-load pairs.

I looked into why this function is not inlined and it is inlined by clang.  We
currently estimate it to 66 instructions and inline limits are 15 at -O2 and 30
at -O3.  Clang has similar estimate, but still decides to inline at -O2.

I looked into reason why the body is so large and one problem I spotted is the
way std::max is implemented by taking and returning reference to the values.

  const T& max( const T& a, const T& b );

This makes it necessary to store the values to memory and load them later
and max is used by code computing new size of vector on resize.

We optimize this to MAX_EXPR, but only during late optimizations.  I think this
is a common enough coding pattern and we ought to make this transparent to
early opts and IPA.  The following is easist fix that simply adds phiprop pass
that turns the PHI of address values into PHI of values so later FRE can
propagate values across memory, phiopt discover the MAX_EXPR pattern and DSE
remove the memory stores.

gcc/ChangeLog:

	PR tree-optimization/109811
	PR tree-optimization/109849
	* passes.def: Add phiprop to early optimization passes.
	* tree-ssa-phiprop.cc: Allow clonning.

gcc/testsuite/ChangeLog:

	PR tree-optimization/109811
	PR tree-optimization/109849
	* gcc.dg/tree-ssa/phiprop-1.c: New test.
	* gcc.dg/tree-ssa/pr21463.c: Adjust template.
2023-06-19 18:28:17 +02:00
Tamar Christina
c72a7b8498 AArch64: convert some patterns to compact MD syntax
Hi All,

This converts some patterns in the AArch64 backend to use the new
compact syntax.

gcc/ChangeLog:

	* config/aarch64/aarch64.md (arches): Add nosimd.
	(*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
	compact syntax.
2023-06-19 15:57:48 +01:00
Tamar Christina
957ae90406 New compact syntax for insn and insn_split in Machine Descriptions.
This patch adds support for a compact syntax for specifying constraints in
instruction patterns. Credit for the idea goes to Richard Earnshaw.

With this new syntax we want a clean break from the current limitations to make
something that is hopefully easier to use and maintain.

The idea behind this compact syntax is that often times it's quite hard to
correlate the entries in the constrains list, attributes and instruction lists.

One has to count and this often is tedious.  Additionally when changing a single
line in the insn multiple lines in a diff change, making it harder to see what's
going on.

This new syntax takes into account many of the common things that are done in MD
files.   It's also worth saying that this version is intended to deal with the
common case of a string based alternatives.   For C chunks we have some ideas
but those are not intended to be addressed here.

It's easiest to explain with an example:

normal syntax:

(define_insn_and_split "*movsi_aarch64"
  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,k,r,r,r,r, r,w, m, m,  r,  r,  r, w,r,w, w")
	(match_operand:SI 1 "aarch64_mov_operand"  " r,r,k,M,n,Usv,m,m,rZ,w,Usw,Usa,Ush,rZ,w,w,Ds"))]
  "(register_operand (operands[0], SImode)
    || aarch64_reg_or_zero (operands[1], SImode))"
  "@
   mov\\t%w0, %w1
   mov\\t%w0, %w1
   mov\\t%w0, %w1
   mov\\t%w0, %1
   #
   * return aarch64_output_sve_cnt_immediate (\"cnt\", \"%x0\", operands[1]);
   ldr\\t%w0, %1
   ldr\\t%s0, %1
   str\\t%w1, %0
   str\\t%s1, %0
   adrp\\t%x0, %A1\;ldr\\t%w0, [%x0, %L1]
   adr\\t%x0, %c1
   adrp\\t%x0, %A1
   fmov\\t%s0, %w1
   fmov\\t%w0, %s1
   fmov\\t%s0, %s1
   * return aarch64_output_scalar_simd_mov_immediate (operands[1], SImode);"
  "CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), SImode)
    && REG_P (operands[0]) && GP_REGNUM_P (REGNO (operands[0]))"
   [(const_int 0)]
   "{
       aarch64_expand_mov_immediate (operands[0], operands[1]);
       DONE;
    }"
  ;; The "mov_imm" type for CNT is just a placeholder.
  [(set_attr "type" "mov_reg,mov_reg,mov_reg,mov_imm,mov_imm,mov_imm,load_4,
		    load_4,store_4,store_4,load_4,adr,adr,f_mcr,f_mrc,fmov,neon_move")
   (set_attr "arch"   "*,*,*,*,*,sve,*,fp,*,fp,*,*,*,fp,fp,fp,simd")
   (set_attr "length" "4,4,4,4,*,  4,4, 4,4, 4,8,4,4, 4, 4, 4,   4")
]
)

New syntax:

(define_insn_and_split "*movsi_aarch64"
  [(set (match_operand:SI 0 "nonimmediate_operand")
	(match_operand:SI 1 "aarch64_mov_operand"))]
  "(register_operand (operands[0], SImode)
    || aarch64_reg_or_zero (operands[1], SImode))"
  {@ [cons: =0, 1; attrs: type, arch, length]
     [r , r  ; mov_reg  , *   , 4] mov\t%w0, %w1
     [k , r  ; mov_reg  , *   , 4] ^
     [r , k  ; mov_reg  , *   , 4] ^
     [r , M  ; mov_imm  , *   , 4] mov\t%w0, %1
     [r , n  ; mov_imm  , *   ,16] #
     /* The "mov_imm" type for CNT is just a placeholder.  */
     [r , Usv; mov_imm  , sve , 4] << aarch64_output_sve_cnt_immediate ("cnt", "%x0", operands[1]);
     [r , m  ; load_4   , *   , 4] ldr\t%w0, %1
     [w , m  ; load_4   , fp  , 4] ldr\t%s0, %1
     [m , rZ ; store_4  , *   , 4] str\t%w1, %0
     [m , w  ; store_4  , fp  , 4] str\t%s1, %0
     [r , Usw; load_4   , *   , 8] adrp\t%x0, %A1;ldr\t%w0, [%x0, %L1]
     [r , Usa; adr      , *   , 4] adr\t%x0, %c1
     [r , Ush; adr      , *   , 4] adrp\t%x0, %A1
     [w , rZ ; f_mcr    , fp  , 4] fmov\t%s0, %w1
     [r , w  ; f_mrc    , fp  , 4] fmov\t%w0, %s1
     [w , w  ; fmov     , fp  , 4] fmov\t%s0, %s1
     [w , Ds ; neon_move, simd, 4] << aarch64_output_scalar_simd_mov_immediate (operands[1], SImode);
  }
  "CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), SImode)
    && REG_P (operands[0]) && GP_REGNUM_P (REGNO (operands[0]))"
  [(const_int 0)]
  {
    aarch64_expand_mov_immediate (operands[0], operands[1]);
    DONE;
  }
)

The main syntax rules are as follows (See docs for full rules):
  - Template must start with "{@" and end with "}" to use the new syntax.
  - "{@" is followed by a layout in parentheses which is "cons:" followed by
    a list of match_operand/match_scratch IDs, then a semicolon, then the
    same for attributes ("attrs:"). Both sections are optional (so you can
    use only cons, or only attrs, or both), and cons must come before attrs
    if present.
  - Each alternative begins with any amount of whitespace.
  - Following the whitespace is a comma-separated list of constraints and/or
    attributes within brackets [], with sections separated by a semicolon.
  - Following the closing ']' is any amount of whitespace, and then the actual
    asm output.
  - Spaces are allowed in the list (they will simply be removed).
  - All alternatives should be specified: a blank list should be
    "[,,]", "[,,;,]" etc., not "[]" or "" (however genattr may segfault if
    you leave certain attributes empty, I have found).
  - The actual constraint string in the match_operand or match_scratch, and
    the attribute string in the set_attr, must be blank or an empty string
    (you can't combine the old and new syntaxes).
  - The common idion * return can be shortened by using <<.
  - Any unexpanded iterators left during processing will result in an error at
    compile time.   If for some reason <> is needed in the output then these
    must be escaped using \.
  - Within an {@ block both multiline and singleline C comments are allowed, but
    when used outside of a C block they must be the only non-whitespace blocks on
    the line
  - Inside an {@ block any unexpanded iterators will result in a compile time
    fault instead of incorrect assembly being generated at runtime.  If the
    literal <> is needed in the output this needs to be escaped with \<\>.
  - This check is not performed inside C blocks (lines starting with *).
  - Instead of copying the previous instruction again in the next pattern, one
    can use ^ to refer to the previous asm string.

This patch works by blindly transforming the new syntax into the old syntax,
so it doesn't do extensive checking. However, it does verify that:
	- The correct number of constraints/attributes are specified.
	- You haven't mixed old and new syntax.
	- The specified operand IDs/attribute names actually exist.
	- You don't have duplicate cons

If something goes wrong, it may write invalid constraints/attributes/template
back into the rtx. But this shouldn't matter because error_at will cause the
program to fail on exit anyway.

Because this transformation occurs as early as possible (before patterns are
queued), the rest of the compiler can completely ignore the new syntax and
assume that the old syntax will always be used.

This doesn't seem to have any measurable effect on the runtime of gen*
programs.

gcc/ChangeLog:

	* gensupport.cc (class conlist, add_constraints, add_attributes,
	skip_spaces, expect_char, preprocess_compact_syntax,
	parse_section_layout, parse_section, convert_syntax): New.
	(process_rtx): Check for conversion.
	* genoutput.cc (process_template): Check for unresolved iterators.
	(class data): Add compact_syntax_p.
	(gen_insn): Use it.
	* gensupport.h (compact_syntax): New.
	(hash-set.h): Include.
	* doc/md.texi: Document it.

Co-Authored-By: Omar Tahir <Omar.Tahir2@arm.com>
2023-06-19 15:56:50 +01:00