RISC-V: Add tuple vector mode psABI checking and simplify code
Hi, This patch does several things: 1. Adds the missed checking of tuple vector mode 2. Extend the scope of checking to all vector types, previously it was only for scalable vector types. 3. Simplify the logic of determining code of vector type which will lower to vector tmode code Best, Lehua gcc/ChangeLog: * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete. (riscv_arg_has_vector): Simplify. (riscv_pass_in_vector_p): Adjust warning message. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/fixed-vlmax-1.c: Add -Wno-psabi option. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge-1.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge-2.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge-3.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge-5.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge-6.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge-7.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-1.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-2.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-3.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-4.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-5.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-6.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-7.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm-1.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm-2.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm-3.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm-4.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm-5.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm-6.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm-7.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-1.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-2.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-3.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-4.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-5.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-6.c: Ditto. * gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-7.c: Ditto. * gcc.target/riscv/rvv/base/pr110119-1.c: Ditto. * gcc.target/riscv/rvv/base/pr110119-2.c: Ditto. * gcc.target/riscv/vector-abi-1.c: Ditto. * gcc.target/riscv/vector-abi-2.c: Ditto. * gcc.target/riscv/vector-abi-3.c: Ditto. * gcc.target/riscv/vector-abi-4.c: Ditto. * gcc.target/riscv/vector-abi-5.c: Ditto. * gcc.target/riscv/vector-abi-6.c: Ditto. * gcc.target/riscv/vector-abi-7.c: New test. * gcc.target/riscv/vector-abi-8.c: New test. * gcc.target/riscv/vector-abi-9.c: New test.
This commit is contained in:
parent
e517d3f571
commit
1d2308d685
41 changed files with 104 additions and 74 deletions
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@ -3806,31 +3806,22 @@ riscv_pass_fpr_pair (machine_mode mode, unsigned regno1,
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GEN_INT (offset2))));
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}
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/* Use the TYPE_SIZE to distinguish the type with vector_size attribute and
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intrinsic vector type. Because we can't get the decl for the params. */
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static bool
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riscv_scalable_vector_type_p (const_tree type)
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{
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tree size = TYPE_SIZE (type);
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if (size && TREE_CODE (size) == INTEGER_CST)
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return false;
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/* For the data type like vint32m1_t, the size code is POLY_INT_CST. */
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return true;
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}
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/* Return true if a vector type is included in the type TYPE. */
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static bool
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riscv_arg_has_vector (const_tree type)
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{
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bool is_vector = false;
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if (riscv_v_ext_mode_p (TYPE_MODE (type)))
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return true;
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if (!COMPLETE_TYPE_P (type))
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return false;
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switch (TREE_CODE (type))
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{
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case RECORD_TYPE:
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if (!COMPLETE_TYPE_P (type))
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break;
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/* If it is a record, it is further determined whether its fileds have
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vector type. */
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for (tree f = TYPE_FIELDS (type); f; f = DECL_CHAIN (f))
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if (TREE_CODE (f) == FIELD_DECL)
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{
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@ -3838,25 +3829,15 @@ riscv_arg_has_vector (const_tree type)
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if (!TYPE_P (field_type))
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break;
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/* Ignore it if it's fixed length vector. */
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if (VECTOR_TYPE_P (field_type))
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is_vector = riscv_scalable_vector_type_p (field_type);
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else
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is_vector = riscv_arg_has_vector (field_type);
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if (riscv_arg_has_vector (field_type))
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return true;
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}
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break;
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case VECTOR_TYPE:
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is_vector = riscv_scalable_vector_type_p (type);
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break;
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default:
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is_vector = false;
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break;
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case ARRAY_TYPE:
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return riscv_arg_has_vector (TREE_TYPE (type));
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}
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return is_vector;
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return false;
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}
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/* Pass the type to check whether it's a vector type or contains vector type.
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@ -3867,11 +3848,11 @@ riscv_pass_in_vector_p (const_tree type)
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{
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static int warned = 0;
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if (type && riscv_arg_has_vector (type) && !warned)
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if (type && riscv_v_ext_mode_p (TYPE_MODE (type)) && !warned)
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{
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warning (OPT_Wpsabi, "ABI for the scalable vector type is currently in "
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"experimental stage and may changes in the upcoming version of "
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"GCC.");
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warning (OPT_Wpsabi,
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"ABI for the vector type is currently in experimental stage and "
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"may changes in the upcoming version of GCC.");
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warned = 1;
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}
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}
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@ -1,5 +1,5 @@
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/* { dg-do compile } */
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/* { dg-options "-march=rv32gcv -mabi=ilp32 -mpreferred-stack-boundary=3 -fno-schedule-insns -fno-schedule-insns2 -O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-march=rv32gcv -mabi=ilp32 -mpreferred-stack-boundary=3 -fno-schedule-insns -fno-schedule-insns2 -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include "riscv_vector.h"
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@ -1,5 +1,5 @@
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include <stdint-gcc.h>
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include <stdint-gcc.h>
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include <stdint-gcc.h>
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include <stdint-gcc.h>
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include <stdint-gcc.h>
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include <stdint-gcc.h>
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include <stdint-gcc.h>
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include "merge-1.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include "merge-2.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include "merge-3.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include "merge-4.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include "merge-5.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include "merge-6.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include "merge-7.c"
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
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#include "perm.h"
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
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#include "perm.h"
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
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#include "perm.h"
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
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#include "perm.h"
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
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#include "perm.h"
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
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#include "perm.h"
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
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/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
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#include "perm.h"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
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#include "perm-1.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
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#include "perm-2.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
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#include "perm-3.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
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#include "perm-4.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
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#include "perm-5.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
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#include "perm-6.c"
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O0" } */
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/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O0 -Wno-psabi" } */
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#include "perm-7.c"
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
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/* { dg-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
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#include "riscv_vector.h"
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gczve32x --param=riscv-autovec-preference=fixed-vlmax" } */
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||||
/* { dg-options "-march=rv64gczve32x -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
|
||||
|
||||
#include <stdint.h>
|
||||
#include "riscv_vector.h"
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
#include "riscv_vector.h"
|
||||
|
||||
void
|
||||
fun (vint32m1_t a) { } /* { dg-warning "the scalable vector type" } */
|
||||
fun (vint32m1_t a) { } /* { dg-warning "the vector type" } */
|
||||
|
||||
void
|
||||
bar ()
|
||||
|
|
|
@ -5,7 +5,7 @@
|
|||
#include "riscv_vector.h"
|
||||
|
||||
vint32m1_t
|
||||
fun (vint32m1_t* a) { return *a; } /* { dg-warning "the scalable vector type" } */
|
||||
fun (vint32m1_t* a) { return *a; } /* { dg-warning "the vector type" } */
|
||||
|
||||
void
|
||||
bar ()
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
#include "riscv_vector.h"
|
||||
|
||||
vint32m1_t*
|
||||
fun (vint32m1_t* a) { return a; } /* { dg-bogus "the scalable vector type" } */
|
||||
fun (vint32m1_t* a) { return a; } /* { dg-bogus "the vector type" } */
|
||||
|
||||
void
|
||||
bar ()
|
||||
|
|
|
@ -6,7 +6,7 @@
|
|||
typedef int v4si __attribute__ ((vector_size (16)));
|
||||
|
||||
v4si
|
||||
fun (v4si a) { return a; } /* { dg-bogus "the scalable vector type" } */
|
||||
fun (v4si a) { return a; } /* { dg-bogus "the vector type" } */
|
||||
|
||||
void
|
||||
bar ()
|
||||
|
|
|
@ -2,10 +2,15 @@
|
|||
/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
|
||||
|
||||
typedef int v4si __attribute__ ((vector_size (16)));
|
||||
struct A { int a; v4si b; };
|
||||
struct A { int a; int b; };
|
||||
|
||||
void foo (int b);
|
||||
|
||||
void
|
||||
fun (struct A a) {} /* { dg-bogus "the scalable vector type" } */
|
||||
fun (struct A a) {
|
||||
|
||||
foo (a.b);
|
||||
} /* { dg-bogus "the vector type" } */
|
||||
|
||||
void
|
||||
bar ()
|
||||
|
|
|
@ -12,7 +12,7 @@ foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out,
|
|||
vl = __riscv_vsetvlmax_e16mf2();
|
||||
for (size_t i = 0; i < n; i += 1)
|
||||
{
|
||||
vint32m1_t a = __riscv_vle32_v_i32m1(in1, vl); /* { dg-bogus "the scalable vector type" } */
|
||||
vint32m1_t a = __riscv_vle32_v_i32m1(in1, vl); /* { dg-bogus "the vector type" } */
|
||||
vint32m1_t b = __riscv_vle32_v_i32m1_tu(a, in2, vl);
|
||||
vint32m1_t c = __riscv_vle32_v_i32m1_tu(b, in3, vl);
|
||||
__riscv_vse32_v_i32m1(out, c, vl);
|
||||
|
|
14
gcc/testsuite/gcc.target/riscv/vector-abi-7.c
Normal file
14
gcc/testsuite/gcc.target/riscv/vector-abi-7.c
Normal file
|
@ -0,0 +1,14 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-O0 -march=rv64gcv -mabi=lp64d" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
void
|
||||
fun (vint32m1x3_t a) { } /* { dg-warning "the vector type" } */
|
||||
|
||||
void
|
||||
bar ()
|
||||
{
|
||||
vint32m1x3_t a;
|
||||
fun (a);
|
||||
}
|
14
gcc/testsuite/gcc.target/riscv/vector-abi-8.c
Normal file
14
gcc/testsuite/gcc.target/riscv/vector-abi-8.c
Normal file
|
@ -0,0 +1,14 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
vint32m1x3_t*
|
||||
fun (vint32m1x3_t* a) { return a; } /* { dg-bogus "the vector type" } */
|
||||
|
||||
void
|
||||
bar ()
|
||||
{
|
||||
vint32m1x3_t a;
|
||||
fun (&a);
|
||||
}
|
16
gcc/testsuite/gcc.target/riscv/vector-abi-9.c
Normal file
16
gcc/testsuite/gcc.target/riscv/vector-abi-9.c
Normal file
|
@ -0,0 +1,16 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
|
||||
|
||||
#include "riscv_vector.h"
|
||||
|
||||
typedef int v4si __attribute__ ((vector_size (16)));
|
||||
|
||||
v4si
|
||||
fun (v4si a) { return a; } /* { dg-warning "the vector type" } */
|
||||
|
||||
void
|
||||
bar ()
|
||||
{
|
||||
v4si a;
|
||||
fun (a);
|
||||
}
|
Loading…
Add table
Reference in a new issue