RISC-V: Add tuple vector mode psABI checking and simplify code

Hi,

This patch does several things:
  1. Adds the missed checking of tuple vector mode
  2. Extend the scope of checking to all vector types, previously it
     was only for scalable vector types.
  3. Simplify the logic of determining code of vector type which will lower to
     vector tmode  code

Best,
Lehua

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
	(riscv_arg_has_vector): Simplify.
	(riscv_pass_in_vector_p): Adjust warning message.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/fixed-vlmax-1.c: Add -Wno-psabi option.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge-7.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/merge_run-7.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-7.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm_run-7.c: Ditto.
	* gcc.target/riscv/rvv/base/pr110119-1.c: Ditto.
	* gcc.target/riscv/rvv/base/pr110119-2.c: Ditto.
	* gcc.target/riscv/vector-abi-1.c: Ditto.
	* gcc.target/riscv/vector-abi-2.c: Ditto.
	* gcc.target/riscv/vector-abi-3.c: Ditto.
	* gcc.target/riscv/vector-abi-4.c: Ditto.
	* gcc.target/riscv/vector-abi-5.c: Ditto.
	* gcc.target/riscv/vector-abi-6.c: Ditto.
	* gcc.target/riscv/vector-abi-7.c: New test.
	* gcc.target/riscv/vector-abi-8.c: New test.
	* gcc.target/riscv/vector-abi-9.c: New test.
This commit is contained in:
Lehua Ding 2023-06-18 19:41:57 +08:00 committed by Pan Li
parent e517d3f571
commit 1d2308d685
41 changed files with 104 additions and 74 deletions

View file

@ -3806,31 +3806,22 @@ riscv_pass_fpr_pair (machine_mode mode, unsigned regno1,
GEN_INT (offset2))));
}
/* Use the TYPE_SIZE to distinguish the type with vector_size attribute and
intrinsic vector type. Because we can't get the decl for the params. */
static bool
riscv_scalable_vector_type_p (const_tree type)
{
tree size = TYPE_SIZE (type);
if (size && TREE_CODE (size) == INTEGER_CST)
return false;
/* For the data type like vint32m1_t, the size code is POLY_INT_CST. */
return true;
}
/* Return true if a vector type is included in the type TYPE. */
static bool
riscv_arg_has_vector (const_tree type)
{
bool is_vector = false;
if (riscv_v_ext_mode_p (TYPE_MODE (type)))
return true;
if (!COMPLETE_TYPE_P (type))
return false;
switch (TREE_CODE (type))
{
case RECORD_TYPE:
if (!COMPLETE_TYPE_P (type))
break;
/* If it is a record, it is further determined whether its fileds have
vector type. */
for (tree f = TYPE_FIELDS (type); f; f = DECL_CHAIN (f))
if (TREE_CODE (f) == FIELD_DECL)
{
@ -3838,25 +3829,15 @@ riscv_arg_has_vector (const_tree type)
if (!TYPE_P (field_type))
break;
/* Ignore it if it's fixed length vector. */
if (VECTOR_TYPE_P (field_type))
is_vector = riscv_scalable_vector_type_p (field_type);
else
is_vector = riscv_arg_has_vector (field_type);
if (riscv_arg_has_vector (field_type))
return true;
}
break;
case VECTOR_TYPE:
is_vector = riscv_scalable_vector_type_p (type);
break;
default:
is_vector = false;
break;
case ARRAY_TYPE:
return riscv_arg_has_vector (TREE_TYPE (type));
}
return is_vector;
return false;
}
/* Pass the type to check whether it's a vector type or contains vector type.
@ -3867,11 +3848,11 @@ riscv_pass_in_vector_p (const_tree type)
{
static int warned = 0;
if (type && riscv_arg_has_vector (type) && !warned)
if (type && riscv_v_ext_mode_p (TYPE_MODE (type)) && !warned)
{
warning (OPT_Wpsabi, "ABI for the scalable vector type is currently in "
"experimental stage and may changes in the upcoming version of "
"GCC.");
warning (OPT_Wpsabi,
"ABI for the vector type is currently in experimental stage and "
"may changes in the upcoming version of GCC.");
warned = 1;
}
}

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@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -mpreferred-stack-boundary=3 -fno-schedule-insns -fno-schedule-insns2 -O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -mpreferred-stack-boundary=3 -fno-schedule-insns -fno-schedule-insns2 -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include "riscv_vector.h"

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include <stdint-gcc.h>

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include <stdint-gcc.h>

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include <stdint-gcc.h>

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@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include <stdint-gcc.h>

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include <stdint-gcc.h>

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include <stdint-gcc.h>

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include <stdint-gcc.h>

View file

@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include "merge-1.c"

View file

@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include "merge-2.c"

View file

@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include "merge-3.c"

View file

@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include "merge-4.c"

View file

@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include "merge-5.c"

View file

@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include "merge-6.c"

View file

@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-O3 --param riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include "merge-7.c"

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
#include "perm.h"

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@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
#include "perm.h"

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
#include "perm.h"

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
#include "perm.h"

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@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
#include "perm.h"

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
#include "perm.h"

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@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d" } */
/* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
#include "perm.h"

View file

@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
#include "perm-1.c"

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@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
#include "perm-2.c"

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@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
#include "perm-3.c"

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@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
#include "perm-4.c"

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@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
#include "perm-5.c"

View file

@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 -Wno-psabi" } */
#include "perm-6.c"

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@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O0" } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O0 -Wno-psabi" } */
#include "perm-7.c"

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include "riscv_vector.h"

View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gczve32x --param=riscv-autovec-preference=fixed-vlmax" } */
/* { dg-options "-march=rv64gczve32x -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -Wno-psabi" } */
#include <stdint.h>
#include "riscv_vector.h"

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@ -4,7 +4,7 @@
#include "riscv_vector.h"
void
fun (vint32m1_t a) { } /* { dg-warning "the scalable vector type" } */
fun (vint32m1_t a) { } /* { dg-warning "the vector type" } */
void
bar ()

View file

@ -5,7 +5,7 @@
#include "riscv_vector.h"
vint32m1_t
fun (vint32m1_t* a) { return *a; } /* { dg-warning "the scalable vector type" } */
fun (vint32m1_t* a) { return *a; } /* { dg-warning "the vector type" } */
void
bar ()

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@ -4,7 +4,7 @@
#include "riscv_vector.h"
vint32m1_t*
fun (vint32m1_t* a) { return a; } /* { dg-bogus "the scalable vector type" } */
fun (vint32m1_t* a) { return a; } /* { dg-bogus "the vector type" } */
void
bar ()

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@ -6,7 +6,7 @@
typedef int v4si __attribute__ ((vector_size (16)));
v4si
fun (v4si a) { return a; } /* { dg-bogus "the scalable vector type" } */
fun (v4si a) { return a; } /* { dg-bogus "the vector type" } */
void
bar ()

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@ -2,10 +2,15 @@
/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
typedef int v4si __attribute__ ((vector_size (16)));
struct A { int a; v4si b; };
struct A { int a; int b; };
void foo (int b);
void
fun (struct A a) {} /* { dg-bogus "the scalable vector type" } */
fun (struct A a) {
foo (a.b);
} /* { dg-bogus "the vector type" } */
void
bar ()

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@ -12,7 +12,7 @@ foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out,
vl = __riscv_vsetvlmax_e16mf2();
for (size_t i = 0; i < n; i += 1)
{
vint32m1_t a = __riscv_vle32_v_i32m1(in1, vl); /* { dg-bogus "the scalable vector type" } */
vint32m1_t a = __riscv_vle32_v_i32m1(in1, vl); /* { dg-bogus "the vector type" } */
vint32m1_t b = __riscv_vle32_v_i32m1_tu(a, in2, vl);
vint32m1_t c = __riscv_vle32_v_i32m1_tu(b, in3, vl);
__riscv_vse32_v_i32m1(out, c, vl);

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@ -0,0 +1,14 @@
/* { dg-do compile } */
/* { dg-options "-O0 -march=rv64gcv -mabi=lp64d" } */
#include "riscv_vector.h"
void
fun (vint32m1x3_t a) { } /* { dg-warning "the vector type" } */
void
bar ()
{
vint32m1x3_t a;
fun (a);
}

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@ -0,0 +1,14 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
#include "riscv_vector.h"
vint32m1x3_t*
fun (vint32m1x3_t* a) { return a; } /* { dg-bogus "the vector type" } */
void
bar ()
{
vint32m1x3_t a;
fun (&a);
}

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@ -0,0 +1,16 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "riscv_vector.h"
typedef int v4si __attribute__ ((vector_size (16)));
v4si
fun (v4si a) { return a; } /* { dg-warning "the vector type" } */
void
bar ()
{
v4si a;
fun (a);
}