gcc/fortran/ChangeLog:
PR fortran/108420
* iresolve.cc (check_charlen_present): Preserve character length if
there is no array constructor.
gcc/testsuite/ChangeLog:
PR fortran/108420
* gfortran.dg/pr108420.f90: New test.
In r13-4469 we started to build the RESULT_DECL in grokdeclarator, while we
still know the location of the return type. But in this testcase, we hit
that code again when parsing the explicit instantiation, and clobber the
DECL_RESULT that was previously used in parsing the function. So, only set
DECL_RESULT if it isn't already set.
PR c++/108496
gcc/cp/ChangeLog:
* decl.cc (grokdeclarator): Check whether DECL_RESULT is already
set.
gcc/testsuite/ChangeLog:
* g++.dg/template/explicit-instantiation5.C: New test.
Creating a safe iterator from a normal iterator is done within the library where we
already know that it is done correctly. The rare situation where a user would use safe
iterators for his own purpose is non-Standard code so outside _GLIBCXX_DEBUG scope. For
those reasons the __msg_init_singular is useless and can be removed.
Additionally in the copy constructor used for post-increment and post-decrement operators
the __msg_init_copy_singular check can also be ommitted because of the preliminary
__msg_bad_incr and __msg_bad_decr checks.
libstdc++-v3/ChangeLog:
* include/debug/safe_iterator.h (_Safe_iterator<>::_Unchecked): New.
(_Safe_iterator(const _Safe_iterator&, _Unchecked)): New.
(_Safe_iterator::operator++(int)): Use latter.
(_Safe_iterator::operator--(int)): Likewise.
(_Safe_iterator(_Iterator, const _Safe_sequence_base*)): Remove !_M_insular()
check.
* include/debug/safe_local_iterator.h (_Safe_local_iterator<>::_Unchecked):
New.
(_Safe_local_iterator(const _Safe_local_iterator&, _Unchecked)): New.
(_Safe_local_iterator::operator++(int)): Use latter.
* src/c++11/debug.cc (_S_debug_messages): Add as comment the _Debug_msg_id
entry associated to the array entry.
The adds the includes in the FE as done in other GCC languages.
It also revises the library handling to avoid additional -L options
from hiding LIBDIR.
For the include/import paths as presented to the front end initialisation,
we capture them and then arrange to emit the 'standard library' paths in
the same order as specified for C.
The specs are tidied up.
The use of the internal prefix also fixes searching in a relocated compiler.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
PR modula2/108182
PR modula2/108480
gcc/m2/ChangeLog:
* Make-lang.in: Pass libsubdir to the language init
build.
* gm2-lang.cc (INCLUDE_VECTOR): Define.
(add_one_import_path): New.
(add_m2_import_paths): New.
(gm2_langhook_post_options): Arrange to add the include
paths (and add the system ones) in the same order as C
uses.
* gm2spec.cc (build_archive_path): Remove.
(add_default_combination): Remove.
(add_default_archives): Remove.
(add_default_libs): We no longer need a '-L' option, just
emit the -l and each library in use.
(build_include_path): Remove.
(add_include): Remove.
(add_default_includes): Remove.
(library_installed): Remove.
(check_valid_library): Remove.
(check_valid_list): Remove.
(convert_abbreviation): Diagnose unhandled cases.
(lang_specific_driver): Skip options where we will add back
a validated version.
* lang-specs.h (M2CPP): Reformat, append %I when -fcpp is not
in use. Revise the cc1gm2 spec to omit mentioning options that
are handled in the c pre-processor line.
* lang.opt: Allow preprocessing and path options as input to the
cc1gm2 invocation, so that they can be passed to the preprocessor
invocation.
As noted in the PR, the problem is that we make a request for additional
stack that violates the constraints on some systems.
This patch chooses a value that is divisible by common OS page sizes.
TODO: the user value should be checked and then an exception thrown if it
is not suitable.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
PR modula2/108405
gcc/m2/ChangeLog:
* gm2-libs-iso/Preemptive.mod (initPreemptive): Use a value for
extra space that is divisible by common OS pagesizes.
This patch fixes the documentation for -mbranch-protection command line option.
gcc/ChangeLog:
2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* doc/invoke.texi (-mbranch-protection): Update documentation.
This patch adds support for Arm frame unwinding instruction "0xb5" [1]. When
an exception is taken and "0xb5" instruction is encounter during runtime
stack-unwinding, we use effective vsp as modifier in pointer authentication.
On completion of stack unwinding if "0xb5" instruction is not encountered
then CFA will be used as modifier in pointer authentication.
[1] https://github.com/ARM-software/abi-aa/releases/download/2022Q3/ehabi32.pdf
libgcc/ChangeLog:
2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/arm/pr-support.c (__gnu_unwind_execute): Decode opcode
"0xb5".
This patch adds the support for pacbti multlilib linking by making
"-mbranch-protection=none" as default multilib option for arm-none-eabi
target.
Eg 1.
If the passed command line flags are (without mbranch-protection):
a) -march=armv8.1-m.main+mve -mfloat-abi=hard -mfpu=auto
"-mbranch-protection=none" will be used in the multilib matching.
Eg 2.
If the passed command line flags are (with mbranch-protection):
a) -march=armv8.1-m.main+mve+pacbti -mfloat-abi=hard -mfpu=auto -mbranch-protection=pac-ret
"-mbranch-protection=standard" will be used in the multilib matching.
gcc/ChangeLog:
2023-01-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config.gcc ($tm_file): Update variable.
* config/arm/arm-mlib.h: Create new header file.
* config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
multilib arch directory.
(MULTILIB_REUSE): Add multilib reuse rules.
(MULTILIB_MATCHES): Add multilib match rules.
gcc/testsuite/ChangeLog:
2023-01-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* gcc.target/arm/multilib.exp (multilib_config "rmprofile"): Update
tests.
* gcc.target/arm/pac-12.c: New test.
* gcc.target/arm/pac-13.c: Likewise.
* gcc.target/arm/pac-14.c: Likewise.
This patch adds the -mcpu support for the Arm Cortex-M85 CPU which is
an Armv8.1-M Mainline CPU supporting MVE and PACBTI by default.
-mpcu=cortex-m85 switch by default matches to -march=armv8.1-m.main+pacbti+mve.fp+fp.dp.
Also following options are provided to disable default features.
+nomve.fp (disables MVE Floating point)
+nomve (disables MVE Integer and MVE Floating point)
+nodsp (disables dsp, MVE Integer and MVE Floating point)
+nopacbti (disables pacbti)
+nofp (disables floating point and MVE floating point)
gcc/ChangeLog:
2022-08-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/arm/arm-cpus.in (cortex-m85): Define new CPU.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
* (-mfix-cmse-cve-2021-35465): Likewise.
gcc/testsuite/ChangeLog:
2022-08-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* gcc.target/arm/multilib.exp: Add tests for cortex-m85.
The following deals with .LOOP_DIST_ALIAS surviving vectorization
because any of the loops involved were elided between loop distribution
and vectorization. As opposed to .LOOP_VECTORIZED which exists only
between if-conversion and vectorization with no intermediate passes
this is more difficult to deal with in advance and thus cleaning
up after vectorization looks better. There's the unconditional
vector lowering pass which looks like a good place for this (for
SIMD uid we have pass_simduid_cleanup).
PR tree-optimization/108482
* tree-vect-generic.cc (expand_vector_operations): Fold remaining
.LOOP_DIST_ALIAS calls.
* gcc.dg/torture/pr108482.c: New testcase.
Hi all,
this patch enables Branch Target Identification Armv8.1-M Mechanism
[1].
This is achieved by using the bti pass made common with Aarch64.
The pass iterates through the instructions and adds the necessary BTI
instructions at the beginning of every function and at every landing
pads targeted by indirect jumps.
Best Regards
Andrea
[1]
<https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension>
gcc/ChangeLog
2022-04-07 Andrea Corallo <andrea.corallo@arm.com>
* config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
* config/arm/arm-protos.h: Update.
* config/arm/aarch-common-protos.h: Declare
'aarch_bti_arch_check'.
* config/arm/arm.cc (aarch_bti_enabled) Update.
(aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
(aarch_gen_bti_j, aarch_bti_arch_check): New functions.
* config/arm/arm.md (bti_nop): New insn.
* config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
(aarch-bti-insert.o): New target.
* config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
* config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
compatibility.
(gate): Make use of 'aarch_bti_arch_check'.
* config/arm/arm-passes.def: New file.
* config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
gcc/testsuite/ChangeLog
2022-04-07 Andrea Corallo <andrea.corallo@arm.com>
* gcc.target/arm/bti-1.c: New testcase.
* gcc.target/arm/bti-2.c: Likewise.
Hi all,
this patch splits and restructures the aarch64 bti pass code in order
to have it usable by the arm backend as well. These changes have no
functional impact.
Best Regards
Andrea
gcc/Changelog
* config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
'aarch-bti-insert.o'.
* config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
proto.
* config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
(aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
(aarch64_output_mi_thunk)
(aarch64_print_patchable_function_entry)
(aarch64_file_end_indicate_exec_stack): Update renamed function
calls to renamed functions.
* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
* config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
target.
* config/aarch64/aarch64-bti-insert.cc: Delete.
* config/arm/aarch-bti-insert.cc: New file including and
generalizing code from aarch64-bti-insert.cc.
* config/arm/aarch-common-protos.h: Update.
Hi all,
this patch enables address return signature and verification based on
Armv8.1-M Pointer Authentication [1].
To sign the return address, we use the PAC R12, LR, SP instruction
upon function entry. This is signing LR using SP and storing the
result in R12. R12 will be pushed into the stack.
During function epilogue R12 will be popped and AUT R12, LR, SP will
be used to verify that the content of LR is still valid before return.
Here an example of PAC instrumented function prologue and epilogue:
void foo (void);
int main()
{
foo ();
return 0;
}
Compiled with '-march=armv8.1-m.main -mbranch-protection=pac-ret
-mthumb' translates into:
main:
pac ip, lr, sp
push {r3, r7, ip, lr}
add r7, sp, #0
bl foo
movs r3, #0
mov r0, r3
pop {r3, r7, ip, lr}
aut ip, lr, sp
bx lr
The patch also takes care of generating a PACBTI instruction in place
of the sequence BTI+PAC when Branch Target Identification is enabled
contextually.
Ex. the previous example compiled with '-march=armv8.1-m.main
-mbranch-protection=pac-ret+bti -mthumb' translates into:
main:
pacbti ip, lr, sp
push {r3, r7, ip, lr}
add r7, sp, #0
bl foo
movs r3, #0
mov r0, r3
pop {r3, r7, ip, lr}
aut ip, lr, sp
bx lr
As part of previous upstream suggestions a test for varargs has been
added and '-mtpcs-frame' is deemed being incompatible with this return
signing address feature being introduced.
[1] <https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension>
gcc/
* config/arm/arm.h (arm_arch8m_main): Declare it.
* config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
Declare it.
* config/arm/arm.cc (arm_arch8m_main): Define it.
(arm_option_reconfigure_globals): Set arm_arch8m_main.
(arm_compute_frame_layout, arm_expand_prologue)
(thumb2_expand_return, arm_expand_epilogue)
(arm_conditional_register_usage): Update for pac codegen.
(arm_current_function_pac_enabled_p): New function.
(aarch_bti_enabled) New function.
(use_return_insn): Return zero when pac is enabled.
* config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
Add new patterns.
* config/arm/unspecs.md (UNSPEC_PAC_NOP)
(VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
gcc/testsuite/
* gcc.target/arm/pac.h : New file.
* gcc.target/arm/pac-1.c : New test case.
* gcc.target/arm/pac-2.c : Likewise.
* gcc.target/arm/pac-3.c : Likewise.
* gcc.target/arm/pac-4.c : Likewise.
* gcc.target/arm/pac-5.c : Likewise.
* gcc.target/arm/pac-6.c : Likewise.
* gcc.target/arm/pac-7.c : Likewise.
* gcc.target/arm/pac-8.c : Likewise.
* gcc.target/arm/pac-9.c : Likewise.
* gcc.target/arm/pac-10.c : Likewise.
* gcc.target/arm/pac-11.c : Likewise.
This patch emits assembler directives for PACBTI build attributes as
defined by the
ABI.
<https://github.com/ARM-software/abi-aa/releases/download/2021Q1/addenda32.pdf>
gcc/ChangeLog:
* config/arm/arm.cc (arm_file_start): Emit EABI attributes for
Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
gcc/testsuite/ChangeLog:
* gcc.target/arm/acle/pacbti-m-predef-1.c: New test.
* gcc.target/arm/acle/pacbti-m-predef-3.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-6.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-7.c: Likewise.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
This patch adds authentication for when the stack is unwound when an
exception is taken. All the changes here are done to the runtime code
in libgcc's unwinder code for Arm target. All the changes are guarded
under defined (__ARM_FEATURE_PAC_DEFAULT) and activated only if the
+pacbti feature is switched on for the architecture. This means that
switching on the target feature via -march or -mcpu is sufficient and
-mbranch-protection need not be enabled. This ensures that the
unwinder is authenticated only if the PACBTI instructions are
available in the non-NOP space as it uses AUTG. Just generating
PAC/AUT instructions using -mbranch-protection will not enable
authentication on the unwinder.
Pre-approved with the requested changes here
<https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586555.html>.
gcc/ChangeLog:
* ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
new pseudo register class _UVRSC_PAC.
libgcc/ChangeLog:
* config/arm/pr-support.c (__gnu_unwind_execute): Decode
exception opcode (0xb4) for saving RA_AUTH_CODE and authenticate
with AUTG if found.
* config/arm/unwind-arm.c (struct pseudo_regs): New.
(phase1_vrs): Introduce new field to store pseudo-reg state.
(phase2_vrs): Likewise.
(_Unwind_VRS_Get): Load pseudo register state from virtual reg set.
(_Unwind_VRS_Set): Store pseudo register state to virtual reg set.
(_Unwind_VRS_Pop): Load pseudo register value from stack into VRS.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
Co-Authored-By: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
This patch implements target feature macros when PACBTI is enabled
through the -march option or -mbranch-protection. The target feature
macros __ARM_FEATURE_PAC_DEFAULT and __ARM_FEATURE_BTI_DEFAULT are
specified in ARM ACLE
<https://developer.arm.com/documentation/101028/0012/5--Feature-test-macros?lang=en>
__ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI are specified in the
pull-request <https://github.com/ARM-software/acle/pull/55>.
Approved here
<https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586334.html>.
gcc/
* config/arm/arm-c.cc (arm_cpu_builtins): Define
__ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
__ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_mbranch_protection_ok): New function.
* gcc.target/arm/acle/pacbti-m-predef-2.c: New test.
* gcc.target/arm/acle/pacbti-m-predef-4.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-5.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-8.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-9.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-10.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-11.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-12.c: Likewise.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
Add -mbranch-protection option. This option enables the
code-generation of pointer signing and authentication instructions in
function prologues and epilogues.
gcc/ChangeLog:
* config/arm/arm.cc (arm_configure_build_target): Parse and validate
-mbranch-protection option and initialize appropriate data structures.
* config/arm/arm.opt (-mbranch-protection): New option.
* doc/invoke.texi (Arm Options): Document it.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
Co-Authored-By: Richard Earnshaw <Richard.Earnshaw@arm.com>
This patch adds the -march feature +pacbti to Armv8.1-M Mainline.
This feature enables pointer signing and authentication instructions
on M-class architectures.
Pre-approved here
<https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586144.html>.
gcc/Changelog:
* config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
* config/arm/arm-cpus.in (pacbti): New feature.
* doc/invoke.texi (Arm Options): Document it.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
Hi all,
This change refactors all the mbranch-protection option parsing code and
types to make it common to both AArch32 and AArch64 backends.
This change also pulls in some supporting types from AArch64 to make
it common (aarch_parse_opt_result).
The significant changes in this patch are the movement of all branch
protection parsing routines from aarch64.c to aarch-common.c and
supporting data types and static data structures.
This patch also pre-declares variables and types required in the
aarch32 back-end for moved variables for function sign scope and key
to prepare for the impending series of patches that support parsing
the feature mbranch-protection in the aarch32 back-end.
gcc/ChangeLog:
* common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
(all_architectures): Fix comment.
(aarch64_parse_extension): Rename return type, enum value names.
* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
Also rename corresponding enum values.
* config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
out aarch64_function_type and move it to common code as
aarch_function_type in aarch-common.h.
* config/aarch64/aarch64-protos.h: Include common types header,
move out types aarch64_parse_opt_result and aarch64_key_type to
aarch-common.h
* config/aarch64/aarch64.cc: Move mbranch-protection parsing types
and functions out into aarch-common.h and aarch-common.cc. Fix up
all the name changes resulting from the move.
* config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
and enum value.
* config/aarch64/aarch64.opt: Include aarch-common.h to import
type move. Fix up name changes from factoring out common code and
data.
* config/arm/aarch-common-protos.h: Export factored out routines to both
backends.
* config/arm/aarch-common.cc: Include newly factored out types.
Move all mbranch-protection code and data structures from
aarch64.cc.
* config/arm/aarch-common.h: New header that declares types shared
between aarch32 and aarch64 backends.
* config/arm/arm-protos.h: Declare types and variables that are
made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
aarch_ra_sign_scope and aarch_enable_bti.
* config/arm/arm.opt (config/arm/aarch-common.h): Include header.
(aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
* config/arm/arm.cc: Add missing includes.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
The previous change to avoid a duplicate multi directory
caused the m2/m2{cor,iso,log,min,pim} installs to happen
relative to the main library directory when not using
--enable-version-specific-runtime-libs which doesn't match
the drivers expectation where to find them. The following
fixes the original issue by simply dropping the duplicate
multi directory since the one in the $(inst_libdir) variable
now works.
Tested by building and installing with and without
--enable-version-specific-runtime-libs and compiling and
linking a modula-2 testcase successfully with the installed
compilers.
PR modula2/108144
libgm2/
* libm2cor/Makefile.am: Revert previous change, instead
drop the redundant $(MULTIDIR).
* libm2iso/Makefile.am: Likewise.
* libm2log/Makefile.am: Likewise.
* libm2min/Makefile.am: Likewise.
* libm2pim/Makefile.am: Likewise.
* libm2cor/Makefile.in: Regenerate.
* libm2iso/Makefile.in: Likewise.
* libm2log/Makefile.in: Likewise.
* libm2min/Makefile.in: Likewise.
* libm2pim/Makefile.in: Likewise.
Before, newlib 3.2 was required for amdgcn and 3.1 for nvptx.
Now recommended is 4.3.0 which was just released on 2023-01-20.
While currently the old versions would work fine, upcoming GCC
changes depend on a newer newlib. Thus, the minimal version is
bumped instead of just recommending the new version.
For GCN, the bump is in preparation for permitting non-threadlocal
stack variables and vectorized math functions - both scheduled for
GCC 13 and added to newlib in 4.3.0.
For nvptx, this includes an emulated clock (commit 6bb96d13a),
a calloc fix (5fca4e0f1) and changes to permit libgfortran to be
compiled with I/O support instead of only in minimal mode.
(Patch approved for GCC 13 but pending on a nvtpx patch,
which for which review is pending.)
gcc/ChangeLog:
* doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
When we have a static declaration without definition we diagnose
that and turn it into an extern declaration. That can alter
the outcome of maybe_special_function_p here and there's really
no point in doing that, so don't.
PR tree-optimization/108449
* cgraphunit.cc (check_global_declaration): Do not turn
undefined statics into externs.
* gcc.dg/pr108449.c: New testcase.
The following adjusts libgm2 to properly use the multilib build
infrastructure, thereby fixing the install with
--enable-version-specific-runtime-libs
In particular config-ml.pl needs to be applied to generated Makefiles
as documented in the manual and we have to avoid clobbering the
variables via make arguments. The explicit install rules used different
ways to construct the multilib dir which isn't necessary and breaks
when MUTLIDIR is now finally set correctly. Instead use
$(toolexeclibdir).
This results in some dead variables in the Makefile.am (and there were
some before), I refrained from doing even more changes here.
Verified with an install with and without --enable-version-specific-runtime-libs
and checking the result.
PR modula2/108144
libgm2/
* configure.ac: Apply config-ml.pl to the generated Makefiles.
Set multilib_arg, use AM_PROG_LIBTOOL.
* configure: Regenerate.
* Makefile.am (AM_MAKEFLAGS): Do not override MULTI* flags.
* Makefile.in: Regenerate.
* libm2cor/Makefile.am: Install to $(toolexeclibdir)$(M2LIBDIR)
rather than $(inst_libdir)/$(MULTIDIR)$(M2LIBDIR).
* libm2iso/Makefile.am: Likewise.
* libm2log/Makefile.am: Likewise.
* libm2min/Makefile.am: Likewise.
* libm2pim/Makefile.am: Likewise.
* libm2cor/Makefile.in: Regenerate.
* libm2iso/Makefile.in: Likewise.
* libm2log/Makefile.in: Likewise.
* libm2min/Makefile.in: Likewise.
* libm2pim/Makefile.in: Likewise.
This PR points out a case where we are not extending the lifetime of a
temporary when the subobject is denoted by a pointer-to-member operation.
These rules were clarified in C++20 by CWG1299.
There are other cases that also need to be handled under CWG1299, but are
not fixed by this patch.
PR c++/53288
DR 1299
gcc/cp/ChangeLog:
* call.cc (extend_ref_init_temps_1): Handle ptrmem expression.
gcc/testsuite/ChangeLog:
* g++.dg/init/lifetime4.C: New test.
The original implementation for Modula-2 search paths allows things like
'-I/path/a:/path/b'. Such paths are not compatible with the rest of the
compiler (in particular, the preprocessor, which Modula-2 uses). In
preparation for removing that idiom, this patch rewrites the cases in the
testsuite and removes string processing where possible from lists of paths.
TODO: There are some apparent discrepancies and/or extraneous insertions
of partial include paths (especially in gm2_init_log, gm2_init_iso and
gm2_init_pim) - to be handled in some future patch.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
gcc/testsuite/ChangeLog:
* gm2/case/pass/case-pass.exp: Update for removal of concatenated
paths.
* gm2/complex/pass/complex-pass.exp: Likewise.
* gm2/coroutines/pim/run/pass/coroutines-pim-run-pass.exp: Likewise.
* gm2/iso/analysis/fail/iso-analysis-fail.exp: Likewise.
* gm2/iso/check/fail/iso-check-fail.exp: Likewise.
* gm2/iso/fail/iso-fail.exp: Likewise.
* gm2/iso/pass/iso-pass.exp: Likewise.
* gm2/isolib/run/pass/isolib-run-pass.exp: Likewise.
* gm2/pim/fail/pim-fail.exp: Likewise.
* gm2/pim/pass/pim-pass.exp: Likewise.
* gm2/pimlib/logitech/run/pass/pimlib-logitech-run-pass.exp: Likewise.
* gm2/pimlib/pass/pimlib-pass.exp: Likewise.
* gm2/pimlib/run/pass/pimlib-run-pass.exp: Likewise.
* gm2/projects/iso/run/pass/halma/projects-iso-run-pass-halma.exp: Likewise.
* gm2/projects/iso/run/pass/hello/projects-iso-run-pass-hello.exp: Likewise.
* gm2/projects/log/run/pass/hello/projects-log-run-pass-hello.exp: Likewise.
* gm2/projects/pim/run/pass/hello/projects-pim-run-pass-hello.exp: Likewise.
* gm2/recover/pass/recover-pass.exp: Likewise.
* gm2/switches/makeall/fail/switches-makeall-fail.exp: Likewise.
* gm2/switches/makeall/pass/switches-makeall-pass.exp: Likewise.
* gm2/switches/none/run/pass/gm2-none.exp: Likewise.
* gm2/switches/pim2/run/pass/switches-pim2-run-pass.exp: Likewise.
* gm2/ulmlib/pass/ulmlib-pass.exp: Likewise.
* gm2/ulmlib/std/pass/ulmlib-std-pass.exp: Likewise.
* gm2/ulmlib/sys/pass/ulmlib-sys-pass.exp: Likewise.
* lib/gm2.exp: Make the paths list a mandatory entry for each gm2_init_xxx
function. Remove the use of concatenated include and library paths.
Remove string processing where possible.
The recent gcc.dg/tree-ssa/clz-char.c test case failed for PRU target,
exposing a wrong code generation bug in the PRU backend. The "clz"
pattern did not produce correct output for QI and HI input operand
modes. SI mode is ok.
The "clz" pattern is expanded to an LMBD instruction to get the
left-most bit position having value "1". In turn, to get the correct
"clz" value, that bit position must be subtracted from the MSB bit
position of the input operand. The old behaviour of hard-coding 31
for MSB bit position is wrong.
The LMBD instruction returns 32 if input operand is zero, irrespective
of its register mode. This maps nicely for SI mode, where the "clz"
pattern outputs -1. It also leads to peculiar (but valid!) output
values from the "clz" pattern for QI and HI zero-valued inputs.
gcc/ChangeLog:
* config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
and HI input modes.
* config/pru/pru.md (clz): Fix generated code for QI and HI
input modes.
gcc/testsuite/ChangeLog:
* gcc.target/pru/clz-hi-2.c: New test.
* gcc.target/pru/clz-hi.c: New test.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
For several Darwin linker versions, the link paths are first traversed
looking for shared libraries, and then again looking for archives.
We want the paths to be searched for both shared and archives in order
so that we will find the non-shared libffi in the testsuite (otherwise
the installed version in the system will be found instead).
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
libffi/ChangeLog:
* testsuite/lib/libffi.exp: Search for both shared and archive
in each path in turn.
The macOS 13 SDK has unguarded Apple Blocks use in objc/runtime.h which
causes most of the objective-c tests to fail.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
fixincludes/ChangeLog:
* fixincl.x: Regenerate.
* inclhack.def (darwin_objc_runtime_1): New hack.
* tests/base/objc/runtime.h: New file.
The SDK for MacOS13 includes Apple-specific deprecations of some functions that
are not deprecated in Posix, C or C++ and widely used in GCC.
The fix makes the deprecation conditional on __APPLE_LOCAL_DEPRECATIONS so that
end users may still observe them but they are hidden from normal compilations.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
PR target/107568
fixincludes/ChangeLog:
* fixincl.x: Regenerate.
* inclhack.def: Add a fix for MacOS13 SDK function deprecations
in stdio.h.
* tests/base/stdio.h (__deprecated_msg): New test.
R-108136 modula-2 meets cppcheck part 2
This patch addresses the style warnings mentioned in the PR.
The array high style fixes to mc/keyc.mod and
gm2-libs/M2Dependent.mod provoke a rebuild of pge and mc.
gcc/m2/ChangeLog:
* gm2-libs/Args.mod (GetArg): Check index before
accessing array.
* gm2-libs/M2Dependent.mod (toCString): Check index
before accessing array.
* mc-boot/GArgs.c: Rebuilt.
* mc-boot/GM2Dependent.c: Rebuilt.
* mc-boot/Gkeyc.c: Rebuilt.
* mc/keyc.mod (seenUIntMin): Initialize once.
(seenUIntMax): Initialize once.
(checkLimits): Only test seenUIntMin and seenUIntMax
once.
* pge-boot/GArgs.c: Rebuilt.
* pge-boot/GM2Dependent.c: Rebuilt.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
Change variables holding PC values from uint64_t to uintptr_t.
Patch by Björn Schäpers.
* dwarf.c (struct function_addrs): Change low and high fields to
uintptr_t.
(struct unit_addrs): Likewise.
(resolve_addr_index): Change address parameter to uintptr_t*.
(add_unit_addr): Change lowpc and highpc parameters to uintptr_t.
(add_function_range): Likewise.
(struct pcrange): Change lowpc and highpc fields to uintptr_t.
(add_low_high_range): Change add_range lowpc and highpc parameters
to uintptr_t.
(add_ranges_from_ranges): Likewise.
(add_ranges_from_rnglists): Likewise.
(add_low_high_range): Chnage lowpc and highpc variables to
uintpr_t.
(add_ranges_from_rnglists): Change some local variables to
uintptr_t.
(add_ranges_from_ranges): Change base parameter to uintptr_t.
(add_ranges_from_rnglists): Likewise.
(read_function_entry): Likewise.
(resolve_addr_index): Add explicit casts to uintptr_t.
(update_pcrange): Likewise.
(add_ranges_from_ranges): Likewise.
(add_ranges_from_rnglists): Likewise.
(read_function_entry): Likewise.
The 64-bit variant of PMULL{2} and AES instructions are available if FEAT_AES
is implemented according to the Arm ARM [1]. Similarly FEAT_SHA1 and
FEAT_SHA256 enable the use of SHA1 and SHA256 instruction variants.
This patch fixes arm_neon.h to correctly reflect the feature availability based
on '+aes' and '+sha2' as opposed to the ambiguous catch-all '+crypto'.
[1] Section D17.2.61, C7.2.215
2022-01-11 Tejas Belagod <tejas.belagod@arm.com>
gcc/ChangeLog:
* config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
(vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/acle/pmull64.c: New.
* gcc.target/aarch64/aes-fuse-1.c: Replace '+crypto' with corresponding
feature flag based on the intrinsic.
* gcc.target/aarch64/aes-fuse-2.c: Likewise.
* gcc.target/aarch64/aes_1.c: Likewise.
* gcc.target/aarch64/aes_2.c: Likewise.
* gcc.target/aarch64/aes_xor_combine.c: Likewise.
* gcc.target/aarch64/sha1_1.c: Likewise.
* gcc.target/aarch64/sha256_1.c: Likewise.
* gcc.target/aarch64/target_attr_crypto_ice_1.c: Likewise.
tree-ssa-loop-niter.cc (build_cltz_expr) gets unused variable mode
warning on some architectures where C[LT]Z_DEFINED_VALUE_AT_ZERO
macro(s) don't use the first argument (which includes the
defaults.h definitions of:
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) 0
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) 0
Other uses of this macro avoid this problem by avoiding temporaries
which are only used as argument to those macros, the following patch
does it the same way for consistency. Plus some formatting fixes
while at it.
2023-01-20 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/108457
* tree-ssa-loop-niter.cc (build_cltz_expr): Use
SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
argument instead of a temporary. Formatting fixes.
As the following testcases shows, when adding static operator[]
support I've missed that the 2 build_min_non_dep_op_overload functions
need to be adjusted. The first one we only use for the single index
case, but as cp_tree_code_length (ARRAY_REF) is 2, we were running
into an assertion there which compared nargs and expected_nargs.
For ARRAY_REF, the operator[] is either a non-static member or newly
static member, never out of class and for the static member case
if user uses single index the operator[] needs to have a single
argument as well, but the function is called with 2 - the object
it is invoked on and the index. We need to evaluate side-effects
of the object and use just a single argument in the call - the index.
The other build_min_non_dep_op_overload overload has been added
solely for ARRAY_REF - CALL_EXPR is the other operator that accepts
variable number of operands but that one goes through different
routines. There we asserted it is a METHOD_TYPE, so again
we shouldn't assert that but handle the case when it is not one
by making sure object's side-effects are evaluated if needed and
passing all the index arguments to the static operator[].
2023-01-19 Jakub Jelinek <jakub@redhat.com>
PR c++/108437
* cp-tree.h (keep_unused_object_arg): Declare.
* call.cc (keep_unused_object_arg): No longer static.
* tree.cc (build_min_non_dep_op_overload): Handle ARRAY_REF
with overload being static member function.
* g++.dg/cpp23/subscript12.C: New test.
* g++.dg/cpp23/subscript13.C: New test.
For anonymous union members we create artificial VAR_DECLs which
have DECL_VALUE_EXPR for the actual COMPONENT_REF. That works
just fine inside of functions (including global dynamic constructors),
because during gimplification such VAR_DECLs are gimplified as
their DECL_VALUE_EXPR. This is also done during regimplification.
But references to these artificial vars in DECL_INITIAL expressions
aren't ever replaced by the DECL_VALUE_EXPRs, so we end up either
with link failures like on the testcase below, or worse ICEs with
LTO.
The following patch fixes those during cp_fully_fold_init where we
already walk all the trees (!data->genericize means that
function rather than cp_fold_function).
2023-01-19 Jakub Jelinek <jakub@redhat.com>
PR c++/53932
* cp-gimplify.cc (cp_fold_r): During cp_fully_fold_init replace
DECL_ANON_UNION_VAR_P VAR_DECLs with their corresponding
DECL_VALUE_EXPR.
* g++.dg/init/pr53932.C: New test.
While looking at the PR, I've noticed one row in rr_union_table
is wrong. relation_union should be commutative, but due to that
bug is not. The following patch adds a self-test for that
property (fails without the first hunk) and fixes that line.
The actual floating point relation problem isn't fixed by this patch
though.
2023-01-19 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/108447
* value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
(relation_tests): Add self-tests for relation_{intersect,union}
commutativity.
* selftest.h (relation_tests): Declare.
* function-tests.cc (test_ranges): Call it.
Check invalid third argument to __builtin_ia32_prefetch when expaning
__builtin_ia32_prefetch to avoid ICE later.
gcc/
PR target/108436
* config/i386/i386-expand.cc (ix86_expand_builtin): Check
invalid third argument to __builtin_ia32_prefetch.
gcc/testsuite/
* gcc.target/i386/pr108436.c: New test.
expand_omp_for_init_counts was using for the case where collapse(2)
inner loop has init expression dependent on non-constant multiple of
the outer iterator and the condition upper bound expression doesn't
depend on the outer iterator fold_unary (NEGATE_EXPR, ...). This
will just return NULL if it can't be folded, we need fold_build1
instead.
2023-01-19 Jakub Jelinek <jakub@redhat.com>
PR middle-end/108459
* omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
than fold_unary for NEGATE_EXPR.
* testsuite/libgomp.c/pr108459.c: New test.
