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208206 commits

Author SHA1 Message Date
Jakub Jelinek
df1cd90e32 gimple-ssa-warn-restrict: Only use type range from NOP_EXPR for non-narrowing conversions [PR113463]
builtin_memref::extend_offset_range when it sees a NOP_EXPR from
INTEGRAL_TYPE (to INTEGRAL_TYPE of sizetype/ptrdifftype precision
given the callers) uses wi::to_offset on TYPE_{MIN,MAX}_VALUE
of the rhs1 type.  This ICEs with large BITINT_TYPEs - to_offset
is only supported for precisions up to the offset_int precision
- but it even doesn't make any sense to do such thing for narrowing
conversions, their range means the whole sizetype/ptrdifftype range
and so the normal handling done later on (largest sized supported object)
is the way to go in that case.

So, the following patch just restrict this to non-narrowing conversions.

2024-01-19  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113463
	* gimple-ssa-warn-restrict.cc (builtin_memref::extend_offset_range):
	Only look through NOP_EXPRs if rhs1 doesn't have wider type than
	lhs.

	* gcc.dg/bitint-74.c: New test.
2024-01-19 10:00:51 +01:00
Jakub Jelinek
dcd5601c2b sccvn: Don't use SCALAR_INT_TYPE_MODE on BLKmode BITINT_TYPEs [PR113459]
sccvn uses GET_MODE_SIZE (SCALAR_INT_TYPE_MODE (type)) for INTEGER_TYPEs,
most likely because that is what native_{interpret,encode}_int used.
This obviously doesn't work for larger BITINT_TYPEs which have BLKmode
and the above ICEs on those.  native_{interpret,encode}_int checks whether
the BITINT_TYPE is medium/large/huge (i.e. an array of 2+ ABI limbs)
and uses TYPE_SIZE_UNIT for that case, otherwise SCALAR_INT_TYPE_MODE like
for the INTEGER_TYPE case.

The following patch instead just uses SCALAR_INT_TYPE_MODE for non-BLKmode
TYPE_MODE and TYPE_SIZE_UNIT otherwise.

2024-01-19  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113459
	* tree-ssa-sccvn.cc (vn_walk_cb_data::push_partial_def): Use
	TREE_INT_CST_LOW of TYPE_SIZE_UNIT rather than GET_MODE_SIZE
	of SCALAR_INT_TYPE_MODE if type has BLKmode.
	(vn_reference_lookup_3): Likewise.  Formatting fix.

	* gcc.dg/bitint-73.c: New test.
2024-01-19 10:00:16 +01:00
Jakub Jelinek
56778b69ce expansion: Fix ICEs with BLKmode VIEW_CONVERT_EXPR around non-BLKmode VAR_DECLs
On aarch64 the backend decides to use non-BLKmode for some arrays
like unsigned long[4] - OImode in that case, but the corresponding
BITINT_TYPEs have BLKmode (like structures containing that many limb
elements).
This later causes ICEs durring expansion when expanding VIEW_CONVERT_EXPR
from non-BLKmode VAR_DECL to BLKmode BITINT_TYPE.

The following fix contains two parts, the discover_nonconstant_array_refs_r
is make sure we force such variables into memory and the expand_expr_real_1
change makes sure we don't try to extract a bitfield or something similar
which doesn't really work for BLKmode - as op0 is a MEM, all we need is
the op0 = adjust_address (op0, mode, 0); at the end to change the MEM's mode
to BLKmode.

2024-01-19  Jakub Jelinek  <jakub@redhat.com>
	    Richard Biener  <rguenther@suse.de>

	* cfgexpand.cc (discover_nonconstant_array_refs_r): Force non-BLKmode
	VAR_DECLs referenced in BLKmode VIEW_CONVERT_EXPRs into memory.
	* expr.cc (expand_expr_real_1) <case VIEW_CONVERT_EXPR>: Do nothing
	but adjust_address also for BLKmode mode and MEM op0.
2024-01-19 09:31:42 +01:00
Palmer Dabbelt
730a801f95 RISC-V: Add the Zihpm and Zicntr extensions
These extensions were recently frozen [1].  As per Andrew's post [2]
we're meant to ignore these in software, this just adds them to the list
of allowed extensions and otherwise ignores them.  I added these under
SPEC_CLASS_NONE even though the PDF lists them as 20190614 because it
seems pointless to add another spec class just to accept two extensions
we then ignore.

1: https://groups.google.com/a/groups.riscv.org/g/isa-dev/c/HZGoqP1eyps/m/GTNKRLJoAQAJ
2: https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/QKjQhChrq9Q/m/7gqdkctgAgAJ

gcc/ChangeLog

	* common/config/riscv/riscv-common.cc: Add Zihpm and Zicnttr
	extensions.
2024-01-19 16:02:51 +08:00
Kito Cheng
5a22bb250d RISC-V: Document the syntax of -march
gcc/ChangeLog

	* doc/invoke.texi (RISC-V Options): Document the syntax of -march.
2024-01-19 15:28:25 +08:00
Kito Cheng
7fd1142195 RISC-V: Update testsuite due to -march string relaxation
We has relaxed -march string, it no longer require canonical order, so
we need update some of those testcase.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/arch-23.c: Update test.
	* gcc.target/riscv/arch-27.c: Ditto.
	* gcc.target/riscv/arch-28.c: Ditto.
	* gcc.target/riscv/attribute-10.c: Ditto.
2024-01-19 15:19:40 +08:00
Kito Cheng
e752a1ee00 RISC-V: Remove unused function in riscv_subset_list [NFC]
gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::parse_std_ext): Remove.
	(riscv_subset_list::parse_multiletter_ext): Remove.
	* config/riscv/riscv-subset.h
	(riscv_subset_list::parse_std_ext): Remove.
	(riscv_subset_list::parse_multiletter_ext): Remove.
2024-01-19 15:19:39 +08:00
Kito Cheng
006ad3e7f7 RISC-V: Relax the -march string for accept any order
-march was require canonical order before, however it's not easy for
most user when we have so many extension, so this patch is relax the
constraint, -march accept the ISA string in any order, it only has few
requirement:

1. Must start with rv[32|64][e|i|g].
2. Multi-letter and single letter extension must be separated by
   at least one underscore(`_`).

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::parse_single_std_ext): New parameter.
	(riscv_subset_list::parse_single_multiletter_ext): Ditto.
	(riscv_subset_list::parse_single_ext): Ditto.
	(riscv_subset_list::parse): Relax the order for the input of ISA
	string.
	* config/riscv/riscv-subset.h
	(riscv_subset_list::parse_single_std_ext): New parameter.
	(riscv_subset_list::parse_single_multiletter_ext): Ditto.
	(riscv_subset_list::parse_single_ext): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/arch-33.c: New.
	* gcc.target/riscv/arch-34.c: New.
2024-01-19 15:19:39 +08:00
Kito Cheng
4e8fef35f7 RISC-V: Extract part parsing base ISA logic into a standalone function [NFC]
Minor refactor, preparation for further change.

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::parse_base_ext): New.
	(riscv_subset_list::parse): Extract part of logic into
	riscv_subset_list::parse_base_ext.
	* config/riscv/riscv-subset.h (riscv_subset_list::parse_base_ext):
	New.
2024-01-19 15:19:39 +08:00
Ian Lance Taylor
7e949ffaaf gcc/testsuite/go.test: update for lowering pass move
The change to move the  lowering pass after the check types pass
changed some error messages.  Update the testsuite accordingly.

Fixes PR go/113447
2024-01-18 20:49:00 -08:00
liuhongt
26c6613040 Adjust testcase gcc.target/i386/part-vect-copysignhf.c.
After vect_early_break is supported, more vectorization is enabled(3
COPYSIGN), so adjust testcase for that.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/part-vect-copysignhf.c: Remove
	-ftree-vectorize from dg-options.
2024-01-19 10:45:49 +08:00
liuhongt
1c51d0109a Fix testcase failure on many platforms which don't support vect_int_max.
After r14-7124-g6686e16fda4190, the testcase can be optimized to
MAX_EXPR if the backends support that. So I adjust the testcase to
scan for MAX_EXPR, but it failed many platforms which don't support
that.
As pinski mentioned, target vect_no_int_min_max is only available
under vect directory, so for simplicity, I adjust the testcase to scan
either MAX_EXPR or original VEC_COND_EXPR.

gcc/testsuite/ChangeLog:

	PR testsuite/113437
	* gcc.dg/tree-ssa/pr95906.c: Scan either MAX_EXPR or
	VEC_COND_EXPR.
2024-01-19 10:45:47 +08:00
Kito Cheng
565935f93a RISC-V: Tweak the wording for the sorry message
Use "does not" rather than "cannot", because it's implementation issue.

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_override_options_internal): Tweak
	sorry message.
2024-01-19 10:40:53 +08:00
Kuan-Lin Chen
173852ab68 RISC-V: Raname UNSPEC_CLMUL in vector-crypto.md.
UNSPEC_CLMUL is defined to define_c_enum in riscv.md, so
it shouldn't be redefined to define_int_iterator again.

gcc/ChangeLog:

	* config/riscv/vector-crypto.md (UNSPEC_CLMUL): Rename to
	UNSPEC_CLMUL_VC.
2024-01-19 10:40:44 +08:00
Sandra Loosemore
ed28a83505 More precise documentation for cleanup attribute [PR110029]
gcc/ChangeLog
	PR c/110029
	* doc/extend.texi (Common Variable Attributes): Explain what
	happens when multiple variables with cleanups are in the same scope.
2024-01-19 02:10:30 +00:00
GCC Administrator
bb0f96abb1 Daily bump. 2024-01-19 00:18:21 +00:00
Sandra Loosemore
9b6b7d6155 Improve documentation of noinline and noipa attributes [PR108470]
gcc/ChangeLog
	PR ipa/108470
	* doc/extend.texi (Common Function Attributes): Document that
	noinline also disables some interprocedural optimizations and
	improve flow to the part about using inline asm instead to
	disable calls from being optimized away completely.  Remove the
	sentence that says noipa is mainly for internal compiler testing.
2024-01-18 23:26:42 +00:00
John David Anglin
0c7c65c4c3 hppa: Always enable PIE on 64-bit target
2024-01-18  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

	PR tree-optimization/69807
	* config/pa/pa.cc (pa_option_override): Set flag_pie on TARGET_64BIT.

gcc/testsuite/ChangeLog:

	* gcc.dg/pic-2.c: Skip on hppa*64*-*-*.
2024-01-18 22:46:19 +00:00
Brian Inglis
b6c4fcda7f Remove remnant of removed Cygwin options from invoke.texi [PR108521]
The -mcygwin option for x86 Windows was removed in 2010 by commit
3edeb30d04, but this reference was
overlooked.

gcc/ChangeLog
	PR target/108521
	* doc/invoke.texi (Option Summary): Remove -mcygwin and -mno-cygwin
	from x86 Windows Options.
2024-01-18 19:39:28 +00:00
Sandra Loosemore
dbda6cd583 Restore documentation for const/volatile functions [PR107942]
In r5-7698-g8648c55f3b703a I accidentally removed the documentation of
GCC's special interpretation of const/volatile qualifiers on functions
from the function attributes section, thinking this was just a
bit-rotten leftover from old versions of GCC.  PR107942 points out
that this functionality is still present even though the docs are now gone.

I decided this material didn't really belong in the function
attributes discussion, but a new subsection in the general list of GCC
extensions to the C language.  And I agree with the comment in the
issue that we shouldn't really recommend this usage any more.

gcc/ChangeLog
	PR c/107942
	* doc/extend.texi (C Extensions): Add new section to menu.
	(Function Attributes):  Move dangling index entries to....
	(Const and Volatile Functions): New section.
2024-01-18 18:40:07 +00:00
David Malcolm
d5604febcf analyzer: fix ICE on strlen ((char *)&VECTOR_CST) [PR111361]
gcc/analyzer/ChangeLog:
	PR analyzer/111361
	* region-model.cc (svalue_byte_range_has_null_terminator_1): The
	initial byte of an all-zeroes SVAL is a zero byte.  Remove
	gcc_unreachable from SK_CONSTANT for constants that aren't
	STRING_CST or INTEGER_CST.

gcc/testsuite/ChangeLog:
	PR analyzer/111361
	* c-c++-common/analyzer/strlen-pr111361.c: New test.
	* c-c++-common/analyzer/strncpy-1.c (test_zero_fill): Remove fixed
	xfail.
	* c-c++-common/analyzer/strncpy-pr111361.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-01-18 12:11:57 -05:00
David Malcolm
84096e665c analyzer: fix offsets in has_null_terminator [PR112811]
PR analyzer/112811 reports an ICE attempting to determine whether a
string is null-terminated.

The root cause is confusion in the code about whether byte offsets are
relative to the start of the base region, or relative to the bound
fragment within the the region.

This patch rewrites the code to enforce a clearer separation between
the kinds of offset, fixing the ICE, and adds logging to help track
down future issues in this area of the code.

gcc/analyzer/ChangeLog:
	PR analyzer/112811
	* region-model.cc (fragment::dump_to_pp): New.
	(fragment::has_null_terminator): Convert to...
	(svalue_byte_range_has_null_terminator_1): ...this new function,
	updating to use a byte_range relative to the start of the svalue.
	(svalue_byte_range_has_null_terminator): New.
	(fragment::string_cst_has_null_terminator): Convert to...
	(string_cst_has_null_terminator): ...this, updating to use a
	byte_range relative to the start of the svalue.
	(iterable_cluster::dump_to_pp): New.
	(region_model::scan_for_null_terminator): Add logging, moving body
	to...
	(region_model::scan_for_null_terminator_1): ...this new function,
	adding more logging, and updating to use
	svalue_byte_range_has_null_terminator.
	* region-model.h (region_model::scan_for_null_terminator_1): New
	decl.

gcc/testsuite/ChangeLog:
	PR analyzer/112811
	* c-c++-common/analyzer/strlen-pr112811.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-01-18 12:11:57 -05:00
David Malcolm
e254d1224d Fix ICE in -fdiagnostics-generate-patch [PR112684]
gcc/ChangeLog:
	PR middle-end/112684
	* toplev.cc (toplev::main): Don't ICE in
	-fdiagnostics-generate-patch when exiting after options,
	since no edit context will have been created.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-01-18 12:11:57 -05:00
Patrick Palka
8cddf6f833 libstdc++/pair: Guard P2321R2 changes with __glibcxx_ranges_zip
Similar to the previous change for <tuple>, but since stl_pair.h is an
internal header we need to use the corresponding internal macro instead.

libstdc++-v3/ChangeLog:

	* include/bits/stl_pair.h [__cplusplus > 202002L]:
	Guard P2321R2 changes with __glibcxx_ranges_zip instead.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
2024-01-18 11:21:34 -05:00
Patrick Palka
ae8581ea5c libstdc++/tuple: Guard P2321R2 changes with __cpp_lib_ranges_zip
Guard <tuple> additions from P2321R2 zip with __cpp_lib_ranges_zip
instead of __cplusplus > 202020L.

libstdc++-v3/ChangeLog:

	* include/std/tuple [__cplusplus > 202002L]: Guard P2321R2
	changes with __cpp_lib_ranges_zip instead.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
2024-01-18 11:21:16 -05:00
Patrick Palka
3d3145e9e1 libstdc++/debug: Fix constexpr _Safe_iterator in C++20 mode [PR109536]
Some _Safe_iterator member functions define a variable of non-literal
type __gnu_cxx::__scoped_lock, which automatically disqualifies them from
being constexpr in C++20 mode even if that code path is never constant
evaluated.  This restriction was lifted by P2242R3 for C++23, but we
need to work around it in C++20 mode.  To that end this patch defines
a pair of macros that encapsulate the lambda-based workaround mentioned
in that paper and uses it to make these functions valid C++20 constexpr
functions.  The augmented std::vector test element_access/constexpr.cc
now successfully compiles in C++20 mode with -D_GLIBCXX_DEBUG (and it
should test all member functions modified by this patch).

	PR libstdc++/109536

libstdc++-v3/ChangeLog:

	* include/debug/safe_base.h (_Safe_sequence_base::_M_swap):
	Remove _GLIBCXX20_CONSTEXPR from non-inline member function.
	* include/debug/safe_iterator.h
	(_GLIBCXX20_CONSTEXPR_NON_LITERAL_SCOPE_BEGIN): Define.
	(_GLIBCXX20_CONSTEXPR_NON_LITERAL_SCOPE_END): Define.
	(_Safe_iterator::operator=): Use them around the code path that
	defines a variable of type __gnu_cxx::__scoped_lock.
	(_Safe_iterator::operator++): Likewise.
	(_Safe_iterator::operator--): Likewise.
	(_Safe_iterator::operator+=): Likewise.
	(_Safe_iterator::operator-=): Likewise.
	* testsuite/23_containers/vector/element_access/constexpr.cc
	(test_iterators): Test more iterator operations.
	* testsuite/23_containers/vector/bool/element_access/constexpr.cc
	(test_iterators): Likewise.
	* testsuite/std/ranges/adaptors/all.cc (test08) [_GLIBCXX_DEBUG]:
	Remove.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
2024-01-18 10:36:07 -05:00
H.J. Lu
48c8d26d77 hwasan: Always set target_hwasan_flags
Fix the "make check" error:

Running .../gcc/testsuite/gcc.dg/hwasan/hwasan.exp ...
ERROR: tcl error sourcing .../gcc/testsuite/gcc.dg/hwasan/hwasan.exp.
ERROR: tcl error code TCL LOOKUP VARNAME target_hwasan_flags
ERROR: can't read "target_hwasan_flags": no such variable
...

on non-x86-64 targets.

	* lib/hwasan-dg.exp (hwasan_init): Always set target_hwasan_flags.
2024-01-18 07:14:16 -08:00
Richard Biener
d190a5553a Another memory leak in vectorizable_store
Similar to the last one.

	* tree-vect-stmts.cc (vectorizable_store): Do not pre-allocate
	operands vector.
2024-01-18 16:07:34 +01:00
Iain Sandoe
569ebd6bdd Darwin, configure: Handle a missing substitution.
The configure substitution for enable_darwin_at_rpath has been
omitted, which leads to a failure to set ENABLE_DARWIN_AT_RPATH in
the testsuite site.exp (which leads to failure to add -B options
in some cases, breaking uninstalled testing there).

Since we already have substitutions for ENABLE_DARWIN_AT_RPATH_TRUE
we can use that instead, which is what this patch does.

gcc/ChangeLog:

	* Makefile.in: Emit ENABLE_DARWIN_AT_RPATH into site.exp
	when ENABLE_DARWIN_AT_RPATH_TRUE is not '#'.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-01-18 15:03:26 +00:00
Jun Sha (Joshua)
9e1b554cc7 RISC-V: Rewrite some instructions using ASM targethook
There are some xtheadvector instructions that differ from RVV1.0
apart from simply adding "th." prefix. For example, RVV1.0
load/store instructions will have SEW while xtheadvector not;
RVV1.0 will have "o" for indexed-ordered store instructions while
xtheadvecotr not; xtheadvector and RVV1.0 have different
vnsrl/vnsra/vfncvt suffix (vv/vx/vi vs wv/wx/wi).

To address this issue without duplicating patterns, we use ASM
targethook to rewrite the whole string of the instructions. We
identify different instructions from the corresponding attribute.

gcc/ChangeLog:

	* config/riscv/thead.cc
	(th_asm_output_opcode): Rewrite some instructions.

Co-authored-by: Jin Ma <jinma@linux.alibaba.com>
Co-authored-by: Xianmiao Qu <cooper.qu@linux.alibaba.com>
Co-authored-by: Christoph Müllner <christoph.muellner@vrull.eu>
2024-01-18 15:40:07 +01:00
Jun Sha (Joshua)
cdf4729f08 RISC-V: Fix register overlap issue for some xtheadvector instructions
For th.vmadc/th.vmsbc as well as narrowing arithmetic instructions
and floating-point compare instructions, an illegal instruction
exception will be raised if the destination vector register overlaps
a source vector register group.

To handle this issue, we add an attribute "spec_restriction" to disable
some alternatives for xtheadvector.

gcc/ChangeLog:

	* config/riscv/riscv.md (none,thv,rvv): New attribute.
	(no,yes): Add an attribute to disable alternative
	for xtheadvector or RVV1.0.
	* config/riscv/vector.md:
	Disable alternatives that destination register overlaps
	source register group for xtheadvector.

Co-authored-by: Jin Ma <jinma@linux.alibaba.com>
Co-authored-by: Xianmiao Qu <cooper.qu@linux.alibaba.com>
Co-authored-by: Christoph Müllner <christoph.muellner@vrull.eu>
2024-01-18 15:39:52 +01:00
Jun Sha (Joshua)
0a41c3e49a RISC-V: Add support for xtheadvector-specific intrinsics.
This patch only involves the generation of xtheadvector
special load/store instructions and vext instructions.

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc
	(class th_loadstore_width): Define new builtin bases.
	(class th_extract): Define new builtin bases.
	(BASE): Define new builtin bases.
	* config/riscv/riscv-vector-builtins-bases.h:
	Define new builtin class.
	* config/riscv/riscv-vector-builtins-shapes.cc
	(struct th_loadstore_width_def): Define new builtin shapes.
	(struct th_indexed_loadstore_width_def):
	Define new builtin shapes.
	(struct th_extract_def): Define new builtin shapes.
	(SHAPE): Define new builtin shapes.
	* config/riscv/riscv-vector-builtins-shapes.h:
	Define new builtin shapes.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION):
	Redefine DEF_RVV_FUNCTION for XTheadVector special intrinsics.
	* config/riscv/riscv-vector-builtins.h
	(enum required_ext): Add new XTheadVector member.
	(struct function_group_info): Likewise.
	* config/riscv/t-riscv:
	Add thead-vector-builtins-functions.def
	* config/riscv/thead-vector.md
	(@pred_mov_width<vlmem_op_attr><mode>): Add new patterns.
	(*pred_mov_width<vlmem_op_attr><mode>): Likewise.
	(@pred_store_width<vlmem_op_attr><mode>): Likewise.
	(@pred_strided_load_width<vlmem_op_attr><mode>): Likewise.
	(@pred_strided_store_width<vlmem_op_attr><mode>): Likewise.
	(@pred_indexed_load_width<vlmem_op_attr><mode>): Likewise.
	(@pred_th_extract<mode>): Likewise.
	(*pred_th_extract<mode>): Likewise.
	* config/riscv/thead-vector-builtins-functions.def: New file.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/xtheadvector/vlb-vsb.c: New test.
	* gcc.target/riscv/rvv/xtheadvector/vlbu-vsb.c: New test.
	* gcc.target/riscv/rvv/xtheadvector/vlh-vsh.c: New test.
	* gcc.target/riscv/rvv/xtheadvector/vlhu-vsh.c: New test.
	* gcc.target/riscv/rvv/xtheadvector/vlw-vsw.c: New test.
	* gcc.target/riscv/rvv/xtheadvector/vlwu-vsw.c: New test.

Co-authored-by: Jin Ma <jinma@linux.alibaba.com>
Co-authored-by: Xianmiao Qu <cooper.qu@linux.alibaba.com>
Co-authored-by: Christoph Müllner <christoph.muellner@vrull.eu>
2024-01-18 15:38:45 +01:00
Jun Sha (Joshua)
2d7205eb2c RISC-V: Handle differences between XTheadvector and Vector
This patch is to handle the differences in instruction generation
between Vector and XTheadVector. In this version, we only support
partial xtheadvector instructions that leverage directly from current
RVV1.0 with simple adding "th." prefix. For different name xtheadvector
instructions but share same patterns as RVV1.0 instructions, we will
use ASM targethook to rewrite the whole string of the instructions in
the following patches.

For some vector patterns that cannot be avoided, we use
"!TARGET_XTHEADVECTOR" to disable them in vector.md in order
not to generate instructions that xtheadvector does not support,
like vmv1r.

gcc/ChangeLog:

	* config.gcc:  Add files for XTheadVector intrinsics.
	* config/riscv/autovec.md: Guard XTheadVector.
	* config/riscv/predicates.md: Disable immediate vl
	for XTheadVector.
	* config/riscv/riscv-c.cc (riscv_pragma_intrinsic):
	Add pragma for XTheadVector.
	* config/riscv/riscv-string.cc (riscv_expand_block_move):
	Guard XTheadVector.
	* config/riscv/riscv-v.cc (vls_mode_valid_p):
	Avoid autovec.
	* config/riscv/riscv-vector-builtins-bases.cc:
	Do not normalize vsetvl instructions for XTheadVector.
	* config/riscv/riscv-vector-builtins-shapes.cc (check_type):
	New check type function.
	(build_one): Adjust for XTheadVector.
	* config/riscv/riscv-vector-switch.def (ENTRY):
	Disable fractional mode for the XTheadVector extension.
	(TUPLE_ENTRY): Likewise.
	* config/riscv/riscv.cc (riscv_v_adjust_bytesize):
	Guard XTheadVector.
	(riscv_preferred_simd_mode): Likewsie.
	(riscv_autovectorize_vector_modes): Likewise.
	(riscv_vector_mode_supported_any_target_p): Likewise.
	(TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
	* config/riscv/thead.cc (th_asm_output_opcode):
	Rewrite vsetvl instructions.
	* config/riscv/vector.md:
	Include thead-vector.md and change fractional LMUL
	into 1 for vbool.
	* config/riscv/riscv_th_vector.h: New file.
	* config/riscv/thead-vector.md: New file.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/pragma-1.c: Add XTheadVector.
	* gcc.target/riscv/rvv/base/abi-1.c: Exclude XTheadVector.
	* lib/target-supports.exp: Add target for XTheadVector.

Co-authored-by: Jin Ma <jinma@linux.alibaba.com>
Co-authored-by: Xianmiao Qu <cooper.qu@linux.alibaba.com>
Co-authored-by: Christoph Müllner <christoph.muellner@vrull.eu>
2024-01-18 15:38:35 +01:00
Jun Sha (Joshua)
9a55cc625c RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
This patch adds th. prefix to all XTheadVector instructions by
implementing new assembly output functions. We only check the
prefix is 'v', so that no extra attribute is needed.

gcc/ChangeLog:

	* config/riscv/riscv-protos.h (riscv_asm_output_opcode):
	Add new function to add assembler insn code prefix/suffix.
	(th_asm_output_opcode):
	Add Thead function to add assembler insn code prefix/suffix.
	* config/riscv/riscv.cc (riscv_asm_output_opcode):
	Implement function to add assembler insn code prefix/suffix.
	* config/riscv/riscv.h (ASM_OUTPUT_OPCODE):
	Add new function to add assembler insn code prefix/suffix.
	* config/riscv/thead.cc (th_asm_output_opcode):
	Implement Thead function to add assembler insn code
	prefix/suffix.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/xtheadvector/prefix.c: New test.

Co-authored-by: Jin Ma <jinma@linux.alibaba.com>
Co-authored-by: Xianmiao Qu <cooper.qu@linux.alibaba.com>
Co-authored-by: Christoph Müllner <christoph.muellner@vrull.eu>
2024-01-18 15:32:49 +01:00
Jun Sha (Joshua)
d05b526511 RISC-V: Introduce XTheadVector as a subset of V1.0.0
This patch is to introduce basic XTheadVector support
(march string parsing and a test for __riscv_xtheadvector)
according to https://github.com/T-head-Semi/thead-extension-spec/

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::parse): Add new vendor extension.
	* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
	Add test marco.
	* config/riscv/riscv.opt:  Add new mask.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-__riscv_th_v_intrinsic.c: New test.
	* gcc.target/riscv/rvv/xtheadvector.c: New test.

Co-authored-by: Jin Ma <jinma@linux.alibaba.com>
Co-authored-by: Xianmiao Qu <cooper.qu@linux.alibaba.com>
Co-authored-by: Christoph Müllner <christoph.muellner@vrull.eu>
2024-01-18 15:32:49 +01:00
Iain Sandoe
60f58d0630 Objective-C/C++: Ensure sufficient setup for the preprocessor.
The tokenizer makes use of functions that determine if identifiers
are interface or class names, and those functions need a hash map
to be set up.

This ensures that these are initialized before pre-process-only
jobs are run.

gcc/objc/ChangeLog:

	* objc-act.cc (objc_init): Initialize interface and class
	name hash maps before the preprocessor uses them.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-01-18 14:27:54 +00:00
Iain Sandoe
49478485f2 Darwin: Suppress adding embedded rpaths for earlier OS versions.
When we have @rpath support by virtue of the OS version we're hosting on
we still need to omit those rpath entries when targeting < 10.5 (or the
linker will complain).  To do this we (maybe ab-)use a property of the
spec function expansion that a non-null return value can be used as the
true input to a second spec (whereas, unfortunately, we cannot pass specs
to the version function at present).

gcc/ChangeLog:

	* config/darwin.h (DARWIN_RPATH_SPEC): Arrange for the %P spec
	to be conditional on macosx-version-min.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-01-18 14:22:16 +00:00
Iain Sandoe
8d26636f0d Darwin: Fix a typo in Objective-C meta-data.
We have a typo in the metadata for assigning NSStrings to a specific
section for the V1 (32b) ABI.  When that is fixed we should never see
the case where the section needs to be deduced from the properties of
the DECLs.

gcc/ChangeLog:

	* config/darwin.cc (darwin_objc1_section): Use the correct
	meta-data version for constant strings.
	(machopic_select_section): Assert if we fail to handle CFString
	sections as Obejctive-C meta-data or drectly.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-01-18 14:15:55 +00:00
Marek Polacek
9840e0be78 c++: ICE when xobj is not the first parm [PR113389]
In grokdeclarator/cdk_function the comment says that the find_xobj_parm
lambda clears TREE_PURPOSE so that we can correctly detect an xobj that
is not the first parameter.  That's all good, but we should also clear
the TREE_PURPOSE once we've given the error, otherwise we crash later in
check_default_argument because the 'this' TREE_PURPOSE lacks a type.

	PR c++/113389

gcc/cp/ChangeLog:

	* decl.cc (grokdeclarator) <case cdk_function>: Set TREE_PURPOSE to
	NULL_TREE when emitting an error.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp23/explicit-obj-diagnostics10.C: New test.
2024-01-18 09:11:57 -05:00
Iain Sandoe
1d82a2d933 lto, Darwin: Fix offload section names.
Currently, these section names have wrong syntax for Mach-O.
Although they were added some time ago; recently added tests are
now emitting them leading to new fails on Darwin.

This adds a Mach-O variant for each.

gcc/ChangeLog:

	* lto-section-names.h (OFFLOAD_SECTION_NAME_PREFIX,
	OFFLOAD_VAR_TABLE_SECTION_NAME, OFFLOAD_FUNC_TABLE_SECTION_NAME,
	OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): Provide Mach-O syntax
	versions when the object format is Mach-O.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-01-18 14:02:19 +00:00
Iain Sandoe
efe4ea2754 testsuite, jit, Darwin: Add libSystem to a test.
test-ggc-bugfix.c fails early on Darwin versions using a linker that
complains if libSystem is not present on user-land link lines.

Add this to fix that specific issue.

gcc/testsuite/ChangeLog:

	* jit.dg/test-ggc-bugfix.c: Add libSystem for Darwin.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-01-18 14:01:45 +00:00
Iain Sandoe
283e3a974b testsuite, jit, Darwin: Handle Mach-O in assembler tests.
Several of the jit tests check for assembler-specific output
which differs on Mach-O from ELF.

This patch uses the facility to make the scans target-dependent
and adds handling for darwin.

gcc/testsuite/ChangeLog:

	* jit.dg/test-always_inline-attribute.c: Handle Darwin in
	jit-verify-assembler-output.
	* jit.dg/test-noinline-attribute.c: Likewise.
	* jit.dg/test-setting-alignment.c: Likewise.
	* jit.dg/test-used-attribute.c: Likewise.
	* jit.dg/test-variable-attribute.c: Likewise.
	* jit.dg/test-weak-attribute.c: Likewise.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-01-18 14:01:21 +00:00
Iain Sandoe
e0e3ef18a0 testsuite, jit: Allow for target-specific assembler scans.
If we want to support multiple object formats and to allow for
scan-assembler tests, we need to make it possible to adjust the
tests on a per-target basis.

This adds similar mechamisms to jit-verify-assembler-output{,-not}
to those used for the general scan-assembler dg directives.

As an aside; it would, perhaps, be possible to integrate this more
with scanasm.exp (which would also give access to function body
scanning) but I did not attempt that for this patch.

After this, we can accept things like:
... { jit-verify-assembler-output-not "......" { target { ! *-*-darwin* } } } }
or
... { jit-verify-assembler-output "......" { target *-*-darwin* } } }

gcc/testsuite/ChangeLog:

	* jit.dg/jit.exp: Accept target clauses in jit-verify-assembler
	handling.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-01-18 14:00:58 +00:00
Iain Sandoe
2b0abfd3f8 testsuite, jit: Handle whitespace in test-link-section-assembler.c.
Darwin has a different .section directive that has more fields and
uses different whitespace.  Amend the whitespace in the scan-asm to
be more flexible.

gcc/testsuite/ChangeLog:

	* jit.dg/test-link-section-assembler.c: Accept any whitespace
	between the .section directive and its arguments.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-01-18 14:00:36 +00:00
Iain Sandoe
ea9df9085a testsuite, jit: test-alias-attribute.c requires alias support.
Add a dg-require-alias to cover this.

gcc/testsuite/ChangeLog:

	* jit.dg/test-alias-attribute.c: Require target alias
	support.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-01-18 14:00:11 +00:00
Iain Sandoe
aecc0d4ba7 Darwin: Fix constant CFString code-gen [PR105522].
Although this only fires for one of the Darwin sub-ports, it is latent
elsewhere, it is also a regression c.f. the Darwin system compiler.

In the code we imported from an earlier branch, CFString objects (which
are constant aggregates) are constructed as CONST_DECLs.  Although our
current documentation suggests that these are reserved for enumeration
values, in fact they are used elsewhere in the compiler for constants.
This includes Objective-C where they are used to form NSString constants.

In the particular case, we take the address of the constant and that
triggers varasm.cc:decode_addr_constant, which does not currently support
CONST_DECL.

If there is a general intent to allow/encourage wider use of CONST_DECL,
then we should fix decode_addr_constant to look through these and evaluate
the initializer (a two-line patch, but I'm not suggesting it for stage-4).

We also need to update the GCC internals documentation to allow for the
additional uses.

This patch is Darwin-local and fixes the problem by making the CFString
constants into regular variable but TREE_CONSTANT+TREE_READONLY. I plan
to back-port this to the open branches once it has baked a while on trunk.

Since, for Darwin, the Objective-C default is to construct constant
NSString objects as CFStrings; this will also cover the majority of cases
there (this patch does not make any changes to Objective-C NSStrings).

	PR target/105522

gcc/ChangeLog:

	* config/darwin.cc (machopic_select_section): Handle C and C++
	CFStrings.
	(darwin_rename_builtins): Move this out of the CFString code.
	(darwin_libc_has_function): Likewise.
	(darwin_build_constant_cfstring): Create an anonymous var to
	hold each CFString.
	* config/darwin.h (ASM_OUTPUT_LABELREF): Handle constant
	CFstrings.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-01-18 13:54:17 +00:00
Maxim Kuvyrkov
a6bf09f65a Fix compare-debug bootstrap failure [PR113445]
... caused by scheduler fix for PR96388 and PR111554.

This patch adjusts decision sched-deps.cc:find_inc() to use
length of dependency lists sans any DEBUG_INSN instructions.

gcc/ChangeLog

2024-01-18  Maxim Kuvyrkov  <maxim.kuvyrkov@linaro.org>

	PR bootstrap/113445
	* haifa-sched.cc (dep_list_size): Make global.
	* sched-deps.cc (find_inc): Use instead of sd_lists_size().
	* sched-int.h (dep_list_size): Declare.

gcc/testsuite/ChangeLog

2024-01-18  Jakub Jelinek  <jakub@redhat.com>

	PR bootstrap/113445
	* gcc.dg/pr113445.c: New test.
2024-01-18 14:45:27 +01:00
Martin Jambor
6764043e88
sra: Disqualify bases of operands of asm gotos
PR 110422 shows that SRA can ICE assuming there is a single edge
outgoing from a block terminated with an asm goto.  We need that for
BB-terminating statements so that any adjustments they make to the
aggregates can be copied over to their replacements.  Because we can't
have that after ASM gotos, we need to punt.

gcc/ChangeLog:

2024-01-17  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/110422
	* tree-sra.cc (scan_function): Disqualify bases of operands of asm
	gotos.

gcc/testsuite/ChangeLog:

2024-01-17  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/110422
	* gcc.dg/torture/pr110422.c: New test.
2024-01-18 14:25:30 +01:00
Richard Biener
895a213826 tree-optimization/113475 - fix memory leak in phi_analyzer
phi_analyzer leaks all phi_group objects it allocates.  The following
fixes this by maintaining a vector of allocated objects and release
them when destroying the phi_analyzer object.

	PR tree-optimization/113475
	* gimple-range-phi.h (phi_analyzer::m_phi_groups): New.
	* gimple-range-phi.cc (phi_analyzer::phi_analyzer): Initialize.
	(phi_analyzer::~phi_analyzer): Deallocate and free collected
	phi_grous.
	(phi_analyzer::process_phi): Record allocated phi_groups.
2024-01-18 14:13:03 +01:00
Richard Biener
5b421c2a5b Fix memory leak in vectorizable_store
The following fixes a memory leak in vectorizable_store which happens
because the functions populating gvec_oprnds[i] will call .create ()
on the incoming vector, leaking what we've previously allocated.

	* tree-vect-stmts.cc (vectorizable_store): Do not allocate
	storage for gvec_oprnds elements.
2024-01-18 14:13:03 +01:00