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206788 commits

Author SHA1 Message Date
Julian Brown
d7e9ae4fa9 OpenMP, NVPTX: memcpy[23]D bias correction
This patch works around behaviour of the 2D and 3D memcpy operations in
the CUDA driver runtime.  Particularly in Fortran, the "base pointer"
of an array (used for either source or destination of a host/device copy)
may lie outside of data that is actually stored on the device.  The fix
is to make sure that we use the first element of data to be transferred
instead, and adjust parameters accordingly.

2023-10-02  Julian Brown  <julian@codesourcery.com>

libgomp/
	* plugin/plugin-nvptx.c (GOMP_OFFLOAD_memcpy2d): Adjust parameters to
	avoid out-of-bounds array checks in CUDA runtime.
	(GOMP_OFFLOAD_memcpy3d): Likewise.
	* testsuite/libgomp.c-c++-common/memcpyxd-bias-1.c: New test.
2023-12-20 21:35:36 +00:00
Rimvydas Jasinskas
ba615557a4 Fortran: Use non conflicting file extensions for intermediates [PR81615]
gcc/ChangeLog:

	* doc/invoke.texi: Document the new file extensions

gcc/fortran/ChangeLog:

	PR fortran/81615
	* lang-specs.h (F951_CPP_OPTIONS): Do not hardcode ".f90" extension
	(F951_CPP_EXTENSION): Use .fi/.fii for fixed/free form sources
	* options.cc (form_from_filename): Handle the new extensions

Signed-off-by: Rimvydas Jasinskas <rimvydas.jas@gmail.com>
2023-12-20 20:22:54 +01:00
Richard Sandiford
08ab2293dc cse: Fix handling of fake vec_select sets [PR111702]
If cse sees:

  (set (reg R) (const_vector [A B ...]))

it creates fake sets of the form:

  (set R[0] A)
  (set R[1] B)
  ...

(with R[n] replaced by appropriate rtl) and then adds them to the tables
in the same way as for normal sets.  This allows a sequence like:

  (set (reg R2) A)
  ...(reg R2)...

to try to use R[0] instead of (reg R2).

But the pass was taking the analogy too far, and was trying to simplify
these fake sets based on costs.  That is, if there was an earlier:

  (set (reg T) A)

the pass would go to considerable effort trying to work out whether:

  (set R[0] A)

or:

  (set R[0] (reg T))

was more profitable.  This included running validate*_change on the sets,
which has no meaning given that the sets are not part of the insn.

In this example, the equivalence A == T is already known, and the
purpose of the fake sets is to add A == T == R[0].  We can do that
just as easily (or, as the PR shows, more easily) if we keep the
original form of the fake set, with A instead of T.

The problem in the PR occurred if we had:

(1) something that establishes an equivalence between a vector V1 of
    M-bit scalar integers and a hard register H

(2) something that establishes an equivalence between a vector V2 of
    N-bit scalar integers, where N<M and where V2 contains at least 2
    instances of V1[0]

(1) established an equivalence between V1[0] and H in M bits.
(2) then triggered a search for an equivalence of V1[0] in N bits.
This included:

      /* See if we have a CONST_INT that is already in a register in a
	 wider mode.  */

which (correctly) found that the low N bits of H contain the right value.
But because it came from a wider mode, this equivalence between N-bit H
and N-bit V1[0] was not yet in the hash table.  It therefore survived
the purge in:

      /* At this point, ELT, if nonzero, points to a class of expressions
         equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
	 and SRC_RELATED, if nonzero, each contain additional equivalent
	 expressions.  Prune these latter expressions by deleting expressions
	 already in the equivalence class.

And since more than 1 set found the same N-bit equivalence between
H and V1[0], the pass tried to add it more than once.

Things were already wrong at this stage, but an ICE was only triggered
later when trying to merge this N-bit equivalence with another one.

We could avoid the double registration by adding:

  for (elt = classp; elt; elt = elt->next_same_value)
    if (rtx_equal_p (elt->exp, x))
      return elt;

to insert_with_costs, or by making cse_insn check whether previous
sets have recorded the same equivalence.  The latter seems more
appealing from a compile-time perspective.  But in this case,
doing that would be adding yet more spurious work to the handling
of fake sets.

The handling of fake sets therefore seems like the more fundamental bug.

While there, the patch also makes sure that we don't apply REG_EQUAL
notes to these fake sets.  They only describe the "real" (first) set.

gcc/
	PR rtl-optimization/111702
	* cse.cc (set::mode): Move earlier.
	(set::src_in_memory, set::src_volatile): Convert to bitfields.
	(set::is_fake_set): New member variable.
	(add_to_set): Add an is_fake_set parameter.
	(find_sets_in_insn): Update calls accordingly.
	(cse_insn): Do not apply REG_EQUAL notes to fake sets.  Do not
	try to optimize them either, or validate changes to them.

gcc/testsuite/
	PR rtl-optimization/111702
	* gcc.dg/rtl/aarch64/pr111702.c: New test.
2023-12-20 19:07:35 +00:00
Kuan-Lin Chen
d07d0e9922 RISC-V: Support -mcmodel=large.
gcc/ChangeLog:
	* config/riscv/predicates.md (move_operand): Reject symbolic operands
	with a type SYMBOL_FORCE_TO_MEM.
	(call_insn_operand): Support for CM_Large.
	(pcrel_symbol_operand): New.
	* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Add builtin_define
	"__riscv_cmodel_large".
	* config/riscv/riscv-opts.h (riscv_code_model): Add CM_LARGE.
	* config/riscv/riscv-protos.h (riscv_symbol_type): Add
	SYMBOL_FORCE_TO_MEM.
	* config/riscv/riscv.cc (riscv_classify_symbol) Support CM_LARGE model.
	(riscv_symbol_insns) Add SYMBOL_FORCE_TO_MEM.
	(riscv_cannot_force_const_mem): Ditto.
	(riscv_split_symbol): Ditto.
	(riscv_force_address): Check pseudo reg available before force_reg.
	(riscv_size_ok_for_small_data_p): Disable in CM_LARGE model.
	(riscv_can_use_per_function_literal_pools_p): New.
	(riscv_elf_select_rtx_section): Handle per-function literal pools.
	(riscv_output_mi_thunk): Add riscv_in_thunk_func.
	(riscv_option_override): Support CM_LARGE model.
	(riscv_function_ok_for_sibcall): Disable sibcalls in CM_LARGE model.
	(riscv_in_thunk_func): New static.
	* config/riscv/riscv.md (unspec): Define UNSPEC_FORCE_FOR_MEM.
	(*large_load_address): New.
	* config/riscv/riscv.opt (code_model): New.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/large-model.c: New test.
2023-12-20 10:53:15 -07:00
Wang Pengcheng
eef65d60a8 [PATCH] RISC-V: Fix RISCV_FUSE_ZEXTWS fusion condition
The condition is RISCV_FUSE_ZEXTH, which is a mistake.

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix condition.
2023-12-20 10:34:13 -07:00
Jason Merrill
02c0b49798 c++: throwing dtor and empty try [PR113088]
maybe_splice_retval_cleanup assumed that the function body can't be empty if
there's a throwing cleanup, but when I added cleanups to try blocks in
r12-6333-gb10e031458d541 I didn't adjust that assumption.

	PR c++/113088
	PR c++/33799

gcc/cp/ChangeLog:

	* except.cc (maybe_splice_retval_cleanup): Handle an empty block.

gcc/testsuite/ChangeLog:

	* g++.dg/eh/return2.C: New test.
2023-12-20 12:31:07 -05:00
Jason Merrill
8dfc52a75d c++: xvalue array subscript [PR103185]
Normally we handle xvalue array subscripting with ARRAY_REF, but in this
case we weren't doing that because the operands were reversed.  Handle that
case better.

	PR c++/103185

gcc/cp/ChangeLog:

	* typeck.cc (cp_build_array_ref): Handle swapped operands.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp1z/array-prvalue2.C: New test.
	* g++.dg/cpp1z/eval-order3.C: Test swapped operands.
2023-12-20 12:30:13 -05:00
Andre Vieira
a3ff76278e veclower: improve selection of vector mode when lowering [PR 112787]
This patch addresses the issue reported in PR target/112787 by improving the
compute type selection.  We do this by not considering types with more elements
than the type we are lowering since we'd reject such types anyway.

gcc/ChangeLog:

	PR target/112787
	* tree-vect-generic.cc (type_for_widest_vector_mode): Change function to
	use original vector type and check widest vector mode has at most the
	same number of elements.
	(get_compute_type): Pass original vector type rather than the element
	type to type_for_widest_vector_mode and remove now obsolete check for
	the number of elements.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/pr112787.c: New test.
2023-12-20 16:44:34 +00:00
Florian Weimer
a48dd581bf c-family: Use -Wdiscarded-qualifiers for ignored qualifiers in __atomic_*
This matches other compiler diagnostics.  No test updates are needed
because c-c++-common/pr95378.c does not match a specific -W option.

Fixes commit d2384b7b24 ("c-family:
check qualifiers of arguments to __atomic built-ins (PR 95378)").

gcc/c-family/

	PR c/113050
	* c-common.cc (get_atomic_generic_size): Use
	OPT_Wdiscarded_qualifiers instead of
	OPT_Wincompatible_pointer_types.
2023-12-20 17:23:40 +01:00
Siddhesh Poyarekar
f9be3d8faa tree-object-size: Clean up unknown propagation
Narrow down scope of the unknowns bitmap so that it is only accessible
within the reexamination process.  This also removes any role of unknown
propagation from object_sizes_set, thus simplifying that code path a
bit.

gcc/ChangeLog:

	* tree-object-size.cc (object_size_info): Remove UNKNOWNS.
	Drop all references to it.
	(object_sizes_set): Move unknowns propagation code to...
	(gimplify_size_expressions): ... here.  Also free reexamine
	bitmap.
	(propagate_unknowns): New parameter UNKNOWNS.  Update callers.

Signed-off-by: Siddhesh Poyarekar <siddhesh@gotplt.org>
2023-12-20 09:32:08 -05:00
Thomas Schwinge
4d9d015cf4 No libstdc++ for GCN
Like commit d94fae044d "No libstdc++ for nvptx"
(2015) and elsewhere.

Based on commit 5f1bed2a7a (2023-12-16), there
are a ton of progressions (for test cases not actually depending on libstdc++
symbols, obviously):

                    === g++ Summary ===

    # of expected passes            [-178369-]{+189226+}
    # of unexpected failures        [-19880-]{+14089+}
    # of unexpected successes       14
    # of expected failures          [-1684-]{+1685+}
    # of unresolved testcases       [-9820-]{+4837+}
    # of unsupported tests          [-11971-]{+11968+}

..., and only two benign "regressions":

    [-UNSUPPORTED:-]{+FAIL:+} g++.dg/init/array54.C  -std=c++14 {+(test for excess errors)+}
    {+UNRESOLVED: g++.dg/init/array54.C  -std=c++14 compilation failed to produce executable+}
    [Etc.]

    [...]/g++.dg/init/array54.C:5:10: fatal error: atomic: No such file or directory

That's similar to a lof of other test cases intending to '#include' standard
C++/libstdc++ headers; to be addressed in due time.

    PASS: g++.old-deja/g++.pt/const2.C  -std=c++98  at line 5 (test for warnings, line )
    [-PASS:-]{+FAIL:+} g++.old-deja/g++.pt/const2.C  -std=c++98 (test for excess errors)
    [Etc.]

    ld: error: undefined symbol: A<int>::i
    >>> referenced by /tmp/ccqXWCSh.o:(p)

The 'error: undefined symbol' is expected here; maybe should simply in the test
case 'dg-prune-output "referenced by"'?  (This PASSed before, as the
'dg-message "i"' was satisfied by 'ld: error: unable to find library -lstdc++',
eh...)

	gcc/
	* config/gcn/gcn.h (LIBSTDCXX): Define to "gcc".
2023-12-20 15:08:39 +01:00
Richard Biener
a8f0278ade Improve DCE of dead parts of a permute chain
gcc.dg/vect/bb-slp-pr78205.c is reported to have regressed with
the PR113073 change and in the end it's due to the DCE performed
by vect_transform_slp_perm_load_1 being imperfect.  The following
enhances it to also cover the CTOR and VIEW_CONVERT operations that
might be involved.

	* tree-vect-slp.cc (vect_transform_slp_perm_load_1): Also handle
	CTOR and VIEW_CONVERT up to the load when performing chain DCE.
2023-12-20 14:43:36 +01:00
Xi Ruoyao
e61c510091
LoongArch: Clean up vec_init expander
Non functional change, clean up the code.

gcc/ChangeLog:

	* config/loongarch/loongarch.cc
	(loongarch_expand_vector_init_same): Remove "temp2" and reuse
	"temp" instead.
	(loongarch_expand_vector_init): Use gcc_unreachable () instead
	of gcc_assert (0), and fix the comment for it.
2023-12-20 20:01:51 +08:00
Xi Ruoyao
c7eefea622
LoongArch: Use force_reg instead of gen_reg_rtx + emit_move_insn in vec_init expander [PR113033]
Jakub says:

    Then that seems like a bug in the loongarch vec_init pattern(s).
    Those really don't have a predicate in any of the backends on the
    input operand, so they need to force_reg it if it is something it
    can't handle. I've looked e.g. at i386 vec_init and that is exactly
    what it does, see the various tests + force_reg calls in
    ix86_expand_vector_init*.

So replace gen_reg_rtx + emit_move_insn with force_reg to fix PR 113033.

gcc/ChangeLog:

	PR target/113033
	* config/loongarch/loongarch.cc
	(loongarch_expand_vector_init_same): Replace gen_reg_rtx +
	emit_move_insn with force_reg.
	(loongarch_expand_vector_init): Likewise.

gcc/testsuite/ChangeLog:

	PR target/113033
	* gcc.target/loongarch/pr113033.c: New test.
2023-12-20 20:01:51 +08:00
Xi Ruoyao
c5651e9bc0
LoongArch: Fix FP vector comparsons [PR113034]
We had the following mappings between <x>vfcmp submenmonics and RTX
codes:

    (define_code_attr fcc
      [(unordered "cun")
       (ordered   "cor")
       (eq       "ceq")
       (ne       "cne")
       (uneq      "cueq")
       (unle      "cule")
       (unlt      "cult")
       (le       "cle")
       (lt       "clt")])

This is inconsistent with scalar code:

    (define_code_attr fcond [(unordered "cun")
                             (uneq "cueq")
                             (unlt "cult")
                             (unle "cule")
                             (eq "ceq")
                             (lt "slt")
                             (le "sle")
                             (ordered "cor")
                             (ltgt "sne")
                             (ne "cune")
                             (ge "sge")
                             (gt "sgt")
                             (unge "cuge")
                             (ungt "cugt")])

For every RTX code for which the LSX/LASX code is different from the
scalar code, the scalar code is correct and the LSX/LASX code is wrong.
Most seriously, the RTX code NE should be mapped to "cneq", not "cne".
Rewrite <x>vfcmp define_insns in simd.md using the same mapping as
scalar fcmp.

Note that GAS does not support [x]vfcmp.{c/s}[u]{ge/gt} (pseudo)
instruction (although fcmp.{c/s}[u]{ge/gt} is supported), so we need to
switch the order of inputs and use [x]vfcmp.{c/s}[u]{le/lt} instead.

The <x>vfcmp.{sult/sule/clt/cle}.{s/d} instructions do not have a single
RTX code, but they can be modeled as an inversed RTX code following a
"not" operation.  Doing so allows the compiler to optimized vectorized
__builtin_isless etc. to a single instruction.  This optimization should
be added for scalar code too and I'll do it later.

Tests are added for mapping between C code, IEC 60559 operations, and
vfcmp instructions.

[1]:https://gcc.gnu.org/pipermail/gcc-patches/2023-December/640713.html

gcc/ChangeLog:

	PR target/113034
	* config/loongarch/lasx.md (UNSPEC_LASX_XVFCMP_*): Remove.
	(lasx_xvfcmp_caf_<flasxfmt>): Remove.
	(lasx_xvfcmp_cune_<FLASX:flasxfmt>): Remove.
	(FSC256_UNS): Remove.
	(fsc256): Remove.
	(lasx_xvfcmp_<vfcond:fcc>_<FLASX:flasxfmt>): Remove.
	(lasx_xvfcmp_<fsc256>_<FLASX:flasxfmt>): Remove.
	* config/loongarch/lsx.md (UNSPEC_LSX_XVFCMP_*): Remove.
	(lsx_vfcmp_caf_<flsxfmt>): Remove.
	(lsx_vfcmp_cune_<FLSX:flsxfmt>): Remove.
	(vfcond): Remove.
	(fcc): Remove.
	(FSC_UNS): Remove.
	(fsc): Remove.
	(lsx_vfcmp_<vfcond:fcc>_<FLSX:flsxfmt>): Remove.
	(lsx_vfcmp_<fsc>_<FLSX:flsxfmt>): Remove.
	* config/loongarch/simd.md
	(fcond_simd): New define_code_iterator.
	(<simd_isa>_<x>vfcmp_<fcond:fcond_simd>_<simdfmt>):
	New define_insn.
	(fcond_simd_rev): New define_code_iterator.
	(fcond_rev_asm): New define_code_attr.
	(<simd_isa>_<x>vfcmp_<fcond:fcond_simd_rev>_<simdfmt>):
	New define_insn.
	(fcond_inv): New define_code_iterator.
	(fcond_inv_rev): New define_code_iterator.
	(fcond_inv_rev_asm): New define_code_attr.
	(<simd_isa>_<x>vfcmp_<fcond_inv>_<simdfmt>): New define_insn.
	(<simd_isa>_<x>vfcmp_<fcond_inv:fcond_inv_rev>_<simdfmt>):
	New define_insn.
	(UNSPEC_SIMD_FCMP_CAF, UNSPEC_SIMD_FCMP_SAF,
	UNSPEC_SIMD_FCMP_SEQ, UNSPEC_SIMD_FCMP_SUN,
	UNSPEC_SIMD_FCMP_SUEQ, UNSPEC_SIMD_FCMP_CNE,
	UNSPEC_SIMD_FCMP_SOR, UNSPEC_SIMD_FCMP_SUNE): New unspecs.
	(SIMD_FCMP): New define_int_iterator.
	(fcond_unspec): New define_int_attr.
	(<simd_isa>_<x>vfcmp_<fcond_unspec>_<simdfmt>): New define_insn.
	* config/loongarch/loongarch.cc (loongarch_expand_lsx_cmp):
	Remove unneeded special cases.

gcc/testsuite/ChangeLog:

	PR target/113034
	* gcc.target/loongarch/vfcmp-f.c: New test.
	* gcc.target/loongarch/vfcmp-d.c: New test.
	* gcc.target/loongarch/xvfcmp-f.c: New test.
	* gcc.target/loongarch/xvfcmp-d.c: New test.
	* gcc.target/loongarch/vector/lasx/lasx-vcond-2.c: Scan for cune
	instead of cne.
	* gcc.target/loongarch/vector/lsx/lsx-vcond-2.c: Likewise.
2023-12-20 20:01:51 +08:00
demin.han
3dd6f73a23 RISC-V: Fix calculation of max live vregs
For the stmt _1 = _2 + _3, assume that _2 or _3 not used after this stmt.
_1 can use same register with _2 or _3 if without early clobber.
Two registers are needed, but current calculation is three.

This patch preserves point 0 for bb entry and excludes its def when
calculates live regs of certain point.

Signed-off-by: demin.han <demin.han@starfivetech.com>

gcc/ChangeLog:

	* config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix
	max live vregs calc
	(preferred_new_lmul_p): Ditto

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c: Moved to...
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-10.c: ...here.
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-4.c: Moved to...
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-11.c: ...here.
Signed-off-by: demin.han <demin.han@starfivetech.com>
2023-12-20 19:19:47 +08:00
Jakub Jelinek
96e0b51371 i386: Make most MD builtins nothrow, leaf [PR112962]
The following patch makes most of x86 MD builtins nothrow,leaf
(like most middle-end builtins are).  For -fnon-call-exceptions it
doesn't nothrow, better might be to still add it if the builtins
don't read or write memory and can't raise floating point exceptions,
but we don't have such information readily available, so the patch
uses just !flag_non_call_exceptions for now.
Not sure if we shouldn't have some exceptions for the leaf attribute,
e.g. wonder about EMMS/FEMMS and the various xsave/xrstor etc. builtins,
pedantically none of those builtins do anything that leaf functions
are forbidden to do (having callbacks, calling functions from current TU,
longjump into the current TU), but sometimes non-leaf is also used on
really complex functions to prevent some unwanted optimizations.
That said, haven't run into any problems as is with the patch.

2023-12-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/112962
	* config/i386/i386-builtins.cc (ix86_builtins): Increase by one
	element.
	(def_builtin): If not -fnon-call-exceptions, set TREE_NOTHROW on
	the builtin FUNCTION_DECL.  Add leaf attribute to DECL_ATTRIBUTES.
	(ix86_add_new_builtins): Likewise.
2023-12-20 12:01:57 +01:00
Jakub Jelinek
be9e8de628 lower-bitint: Fix up handling of nested casts in mergeable stmt handling [PR112941]
The following patch fixes 2 issues in handling of casts for mergeable
stmts.
The first hunk fixes the case when we have two nested casts (typically
after optimization that is zero-extension of a sign-extension because
everything else should have been folded into a single cast).  If
the lowering of the outer cast needs to make the code conditional
(e.g.
  for (...)
    {
      if (idx <= 32)
        {
          if (idx < 32)
            { ... handle_operand (idx); ... }
          else
            { ... handle_operand (32); ... }
        }
      ...
    }
) and the lowering of the inner one as well, right now it creates invalid
SSA form, because even for the inner cast we need a PHI on the loop
and the PHI argument from the latch edge is a SSA_NAME initialized in
the conditionally executed bb.  The hunk fixes that by detecting such
a case and adding further PHI nodes at the end of the ifs such that
the right value propagates to the next loop iteration.  We can use
0 arguments for the other edges because the inner operand handling
is only done for the first set of iterations and then the other ifs take
over.

The rest fixes a case of again invalid SSA form, when for a sign extension
we need to use the 0 or -1 value initialized by earlier iteration in
a constant idx case, the code was using the value of the loop PHI argument
from latch edge rather than result; that is correct for cases expanded
in straight line code after the loop, but not inside of the loop for the
cases of handle_cast conditionals, there we should use PHI result.  This
is done in the second hunk and supported by the remaining hunks, where
it clears m_bb to tell the code we aren't in the loop anymore.

Note, this patch doesn't deal with similar problems during multiplication,
division, floating casts etc. where we just emit a library call.  I'll
need to make sure in that case we don't merge more than one cast per
operand.

2023-12-20  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/112941
	* gimple-lower-bitint.cc (bitint_large_huge::handle_cast): If
	save_cast_conditional, instead of adding assignment of t4 to
	m_data[save_data_cnt + 1] before m_gsi, add phi nodes such that
	t4 propagates to m_bb loop.  For constant idx, use
	m_data[save_data_cnt] rather than m_data[save_data_cnt + 1] if inside
	of the m_bb loop.
	(bitint_large_huge::lower_mergeable_stmt): Clear m_bb when no longer
	expanding inside of that loop.
	(bitint_large_huge::lower_comparison_stmt): Likewise.
	(bitint_large_huge::lower_addsub_overflow): Likewise.
	(bitint_large_huge::lower_mul_overflow): Likewise.
	(bitint_large_huge::lower_bit_query): Likewise.

	* gcc.dg/bitint-55.c: New test.
2023-12-20 11:32:52 +01:00
Jakub Jelinek
e7dd72aefe c: Split -Wcalloc-transposed-args warning from -Walloc-size, -Walloc-size fixes
The following patch changes -Walloc-size warning to no longer warn
about int *p = calloc (1, sizeof (int));, because as discussed earlier,
the size is IMNSHO sufficient in that case, for alloc_size with 2
arguments warns if the product of the 2 arguments is insufficiently small.

Also, it warns also for explicit casts of malloc/calloc etc. calls
rather than just implicit, so not just
  int *p = malloc (1);
but also
  int *p = (int *) malloc (1);

It also fixes some ICEs where the code didn't verify the alloc_size
arguments properly (Walloc-size-5.c testcase ICEs with vanilla trunk).

And lastly, it introduces a coding style warning, -Wcalloc-transposed-args
to warn for calloc (sizeof (struct S), 1) and similar calls (regardless
of what they are cast to, warning whenever first argument is sizeof and
the second is not).

2023-12-20  Jakub Jelinek  <jakub@redhat.com>

gcc/
	* doc/invoke.texi (-Walloc-size): Add to the list of
	warning options, remove unnecessary line-break.
	(-Wcalloc-transposed-args): Document new warning.
gcc/c-family/
	* c.opt (Wcalloc-transposed-args): New warning.
	* c-common.h (warn_for_calloc, warn_for_alloc_size): Declare.
	* c-warn.cc (warn_for_calloc, warn_for_alloc_size): New functions.
gcc/c/
	* c-parser.cc (c_parser_postfix_expression_after_primary): Grow
	sizeof_arg and sizeof_arg_loc arrays to 6 elements.  Call
	warn_for_calloc if warn_calloc_transposed_args for functions with
	alloc_size type attribute with 2 arguments.
	(c_parser_expr_list): Use 6 instead of 3.
	* c-typeck.cc (build_c_cast): Call warn_for_alloc_size for casts
	of calls to functions with alloc_size type attribute.
	(convert_for_assignment): Likewise.
gcc/testsuite/
	* gcc.dg/Walloc-size-4.c: New test.
	* gcc.dg/Walloc-size-5.c: New test.
	* gcc.dg/Wcalloc-transposed-args-1.c: New test.
2023-12-20 11:31:18 +01:00
Alex Coplan
f5213759a7 aarch64: Validate register operands early in ldp fusion pass [PR113062]
We were missing validation of the candidate register operands in the
ldp/stp pass.  I was relying on recog rejecting such cases when we
formed the final pair insn, but the testcase shows that with
-fharden-conditionals we attempt to combine two insns with asm_operands,
both containing mem rtxes.  This then trips the assert:

gcc_assert (change->new_uses.is_valid ());

in the stp case as we aren't expecting to have (distinct) uses of mem in
the candidate stores.

While doing this I noticed that it seems more natural to have the
initial definition of mem_size closer to its first use in track_access,
so I moved that down.

gcc/ChangeLog:

	PR target/113062
	* config/aarch64/aarch64-ldp-fusion.cc
	(ldp_bb_info::track_access): Punt on accesses with invalid
	register operands, move definition of mem_size closer to its
	first use.

gcc/testsuite/ChangeLog:

	PR target/113062
	* gcc.dg/pr113062.c: New test.
2023-12-20 09:40:57 +00:00
Pan Li
bfdadcb299 RISC-V: Bugfix for the const vector in single steps
This patch would like to fix the below execution failure when build with
"-march=rv64gcv_zvl512b -mabi=lp64d -mcmodel=medlow --param=riscv-autovec-lmul=m8 -ftree-vectorize -fno-vect-cost-model -O3"

FAIL: gcc.dg/vect/pr92420.c -flto -ffat-lto-objects execution test

The will be one single step const vector like { -4, 4, -3, 5, -2, 6, -1, 7, ...}.
For such const vector generation with single step, we will generate vid
+ diff here. For example as below, given npatterns = 4.

v1= {3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8... }
v2 (diff) = {3 - 0, 2 - 1, 1 - 2, 0 - 3, 7 - 4, 6 - 5, 5 - 6, 4 - 7...}
          = {3, 1, -1, 3, 3, 1, -1, 3 ...}
v1 = vd + vid.

Unfortunately, that cannot work well for { -4, 4, -3, 5, -2, 6, -1, 7, ...}
because it has one implicit requirement for the diff. Aka, the diff
sequence in npattern are repeated. For example the v2 (diff) as above.

The diff between { -4, 4, -3, 5, -2, 6, -1, 7, ...} and vid are not
npattern size repeated and then we have wrong code here. We implement
one new code gen the sequence like { -4, 4, -3, 5, -2, 6, -1, 7, ...}.

The below tests are passed for this patch.

* The RV64 regression test with rv64gcv configuration.
* The run test gcc.dg/vect/pr92420.c for below configurations.

riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8
riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m1/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8
riscv-sim/-march=rv64gcv_zvl512b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=fixed-vlmax

gcc/ChangeLog:

	* config/riscv/riscv-v.cc (rvv_builder::npatterns_vid_diff_repeated_p):
	New function to predicate the diff to vid is repeated or not.
	(expand_const_vector): Add restriction
	for the vid-diff code gen and implement general one.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/bug-7.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
2023-12-20 17:37:45 +08:00
Juzhe-Zhong
1190de7ef8 RISC-V: Fix ICE of moving SUBREG of vector mode to DImode scalar register on RV32 system.
This patch fixes following ICE on full coverage testing of RV32.

Running target riscv-sim/-march=rv32gc_zve32f/-mabi=ilp32d/-mcmodel=medlow/--param=riscv-autovec-lmul=dynamic
FAIL: gcc.c-torture/compile/930120-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
Running target riscv-sim/-march=rv32gc_zve32f/-mabi=ilp32d/-mcmodel=medlow/--param=riscv-autovec-lmul=dynamic/--param=riscv-autovec-preference=fixed-vlmax
FAIL: gcc.c-torture/compile/930120-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
Running target riscv-sim/-march=rv32gc_zve32f/-mabi=ilp32d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2
FAIL: gcc.c-torture/compile/930120-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/pr89369.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/pr89369.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
Running target riscv-sim/-march=rv32gc_zve32f/-mabi=ilp32d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2/--param=riscv-autovec-preference=fixed-vlmax
FAIL: gcc.c-torture/compile/930120-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/pr89369.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/pr89369.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
Running target riscv-sim/-march=rv32gc_zve32f/-mabi=ilp32d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4
FAIL: gcc.c-torture/compile/930120-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
Running target riscv-sim/-march=rv32gc_zve32f/-mabi=ilp32d/-mcmodel=medlow/--param=riscv-autovec-lmul=m4/--param=riscv-autovec-preference=fixed-vlmax
FAIL: gcc.c-torture/compile/930120-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
Running target riscv-sim/-march=rv32gc_zve32f/-mabi=ilp32d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8
FAIL: gcc.c-torture/compile/930120-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
Running target riscv-sim/-march=rv32gc_zve32f/-mabi=ilp32d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=fixed-vlmax
FAIL: gcc.c-torture/compile/930120-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/930120-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/compile/pr42196-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/bswap-1.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
Running target riscv-sim/-march=rv32gc_zve32f/-mabi=ilp32d/-mcmodel=medlow/--param=riscv-autovec-preference=fixed-vlmax
FAIL: gcc.c-torture/execute/20050316-2.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-2.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O1  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O2  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -O3 -g  (internal compiler error: in emit_move_insn, at expr.cc:4606)
FAIL: gcc.c-torture/execute/20050316-3.c   -Os  (internal compiler error: in emit_move_insn, at expr.cc:4606)

These ICEs happens on:

Move (subreg:DI (reg:RVVM2SI 141) 0) to (reg/v:DI 135 [ u ]) on RV32 system.

Before this patch:

bug.c:24:11: internal compiler error: in emit_move_insn, at expr.cc:4607
   24 |       r = bar (u);
      |           ^~~~~~~
0x12bd034 emit_move_insn(rtx_def*, rtx_def*)
        ../../../../gcc/gcc/expr.cc:4606
0x1c98001 riscv_legitimize_move(machine_mode, rtx_def*, rtx_def*)
        ../../../../gcc/gcc/config/riscv/riscv.cc:2703
0x24ed627 gen_movdi(rtx_def*, rtx_def*)
        ../../../../gcc/gcc/config/riscv/riscv.md:2105
0x10dca22 rtx_insn* insn_gen_fn::operator()<rtx_def*, rtx_def*>(rtx_def*, rtx_def*) const
        ../../../../gcc/gcc/recog.h:441
0x12bcb01 emit_move_insn_1(rtx_def*, rtx_def*)
        ../../../../gcc/gcc/expr.cc:4551
0x12bd91a emit_move_insn(rtx_def*, rtx_def*)
        ../../../../gcc/gcc/expr.cc:4721
0x128e077 store_bit_field_1
        ../../../../gcc/gcc/expmed.cc:808
0x1290016 store_bit_field(rtx_def*, poly_int<2u, unsigned long>, poly_int<2u, unsigned long>, poly_int<2u, unsigned long>, poly_int<2u, unsigned long>, machine_mode, rtx_def*, bool, bool)
        ../../../../gcc/gcc/expmed.cc:1194
0x12cb40b store_field
        ../../../../gcc/gcc/expr.cc:8230
0x12c4426 expand_assignment(tree_node*, tree_node*, bool)
        ../../../../gcc/gcc/expr.cc:6290
0x111032f expand_gimple_stmt_1
        ../../../../gcc/gcc/cfgexpand.cc:3966
0x11106ed expand_gimple_stmt
        ../../../../gcc/gcc/cfgexpand.cc:4064
0x1118d72 expand_gimple_basic_block
        ../../../../gcc/gcc/cfgexpand.cc:6120
0x111aa2c execute
        ../../../../gcc/gcc/cfgexpand.cc:6855

The solution is quite simple, we just need to extract index = 1 element to the highpart of the DImode register on RV32 system
since DImode register consists of 2 scalar registers.

After this patch:

	vsetivli	zero,2,e32,m2,ta,ma
	vle32.v	v2,0(a0)
	vslidedown.vi	v4,v2,1
	vmv.x.s	a0,v2
	vmv.x.s	a1,v4
	ret

Tested on full coverage testing of both RV32 and RV64 no regression.

Committed as it is an obvious bug fix.

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_legitimize_move): Fix ICE.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/bug-8.c: New test.
2023-12-20 16:58:36 +08:00
Alexandre Oliva
4e0a467302 strub: sparc64: unbias the stack address [PR112917]
The stack pointer is biased by 2047 bytes on sparc64, so the range it
delimits is way off.  Unbias the addresses returned by
__builtin_stack_address (), so that the strub builtins, inlined or
not, can function correctly.  I've considered introducing a new target
macro, but using STACK_POINTER_OFFSET seems safe, and it enables the
register save areas to be scrubbed as well.

Because of the large fixed-size outgoing args area next to the
register save area on sparc, we still need __strub_leave to not
allocate its own frame, otherwise it won't be able to clear part of
the frame it should.


for  gcc/ChangeLog

	PR middle-end/112917
	* builtins.cc (expand_bultin_stack_address): Add
	STACK_POINTER_OFFSET.
	* doc/extend.texi (__builtin_stack_address): Adjust.
2023-12-20 05:18:21 -03:00
Alexandre Oliva
9fa35dbb90 strub: sparc: omit frame in strub_leave [PR112917]
If we allow __strub_leave to allocate a frame on sparc, it will
overlap with a lot of the stack range we're supposed to scrub, because
of the large fixed-size outgoing args and register save area.
Unfortunately, setting up the PIC register seems to prevent the frame
pointer from being omitted.

Since the strub runtime doesn't issue calls or use global variables,
at least on sparc, disabling PIC to compile strub.c seems to do the
right thing.


for  libgcc/ChangeLog

	PR middle-end/112917
	* config.host (sparc, sparc64): Enable...
	* config/sparc/t-sparc: ... this new fragment.
2023-12-20 05:18:17 -03:00
Alexandre Oliva
672db38c6f -finline-stringops: allow expansion into edges [PR113002]
Builtin expanders for memset and memcpy may involve conditionals and
loops, but their sequences may be end up emitted in edges.  Alas,
commit_one_edge_insertion rejects sequences that end with a jump, a
requirement that makes sense for insertions after expand, but not so
much during expand.

During expand, jumps may appear in the middle of the insert sequence
as much as in the end, and it's only after committing edge insertions
out of PHI nodes that we go through the entire function splitting
blocks where needed, so relax the assert in commit_one_edge_insertion
so that jumps are accepted during expand even at the end of the
sequence.


for  gcc/ChangeLog

	PR rtl-optimization/113002
	* cfgrtl.cc (commit_one_edge_insertion): Tolerate jumps in the
	inserted sequence during expand.

for  gcc/testsuite/ChangeLog

	PR rtl-optimization/113002
	* gcc.dg/vect/pr113002.c: New.
2023-12-20 05:18:15 -03:00
Alexandre Oliva
438bf6ade4 untyped calls: use wrapper class type for implicit plus_one
Instead of get and set macros to apply a delta, use a single macro
that resorts to a temporary wrapper class to apply it.


for  gcc/ChangeLog

	* builtins.cc (delta_type): New template class.
	(set_apply_args_size, get_apply_args_size): Replace with...
	(saved_apply_args_size): ... this.
	(set_apply_result_size, get_apply_result_size): Replace with...
	(saved_apply_result_size): ... this.
	(apply_args_size, apply_result_size): Adjust.
2023-12-20 04:59:00 -03:00
Jeff Law
6c22779dfb [committed] Stop forcing unsigned bitfields on mcore
The GCC manual has a whole section on signedness of bitfields with the ultimate
conclusion that the property really isn't an ABI issue, but instead a C dialect
issue (agreed).  Furthermore it concludes that all targets should behave the
same by default.

So it was a mistake for the mcore port to force bitfields to be unsigned and
that never should have been included.  This patch rectifies that problem.

I should have remembered this -- I went down this path once in the 90s.  I
don't recall which port anymore, but once Joseph mentioned this policy bits and
pieces did start to come back to me.

Restoring the proper default happens to also fix 170 tests in the GCC
testsuite, some of which would go into infinite loops when bitfields were
treated as signed values (pr88621 for example).  Essentially the testing time
cuts in half, which was actually the point of digging into pr88621 to begin
with.

gcc/
	* config/mcore/mcore.h (CC1_SPEC): Do not set -funsigned-bitfields.
2023-12-19 21:24:31 -07:00
Alexandre Oliva
35914e5bba -finline-stringops: copy timeout factor from memcmp-1.c test
I added some -finline-stringops tests that included memcmp-1.c, but
carried over the timeout factor onto only one such test.  Jeff Law
kindly pointed that out (thanks!), so here's the fix.


for  gcc/testsuite/ChangeLog

	* gcc.dg/torture/inline-mem-cmp-1.c: Copy timeout factor from
	mem-cmp-1.c.
	* gcc.dg/torture/inline-mem-cpy-1.c: Likewise.
2023-12-20 01:05:45 -03:00
Haochen Jiang
d3545378db i386: Allow 64 bit mask register for -mno-evex512
gcc/ChangeLog:

	* config/i386/avx512bwintrin.h: Allow 64 bit mask intrin usage
	for -mno-evex512.
	* config/i386/i386-builtin.def: Remove OPTION_MASK_ISA2_EVEX512
	for 64 bit mask builtins.
	* config/i386/i386.cc (ix86_hard_regno_mode_ok): Allow 64 bit
	mask register for -mno-evex512.
	* config/i386/i386.md (SWI1248_AVX512BWDQ_64): Remove
	TARGET_EVEX512.
	(*zero_extendsidi2): Change isa attribute to avx512bw.
	(kmov_isa): Ditto.
	(*anddi_1): Ditto.
	(*andn<mode>_1): Remove TARGET_EVEX512.
	(*one_cmplsi2_1_zext): Change isa attribute to avx512bw.
	(*ashl<mode>3_1): Ditto.
	(*lshr<mode>3_1): Ditto.
	* config/i386/sse.md (SWI1248_AVX512BWDQ): Remove TARGET_EVEX512.
	(SWI1248_AVX512BW): Ditto.
	(SWI1248_AVX512BWDQ2): Ditto.
	(*knotsi_1_zext): Ditto.
	(kunpckdi): Ditto.
	(SWI24_MASK): Removed.
	(vec_pack_trunc_<mode>): Change iterator from SWI24_MASK to SWI24.
	(vec_unpacks_lo_di): Remove TARGET_EVEX512.
	(SWI48x_MASK): Removed.
	(vec_unpacks_hi_<mode>): Change iterator from SWI48x_MASK to SWI48x.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx10_1-6.c: Remove check for errors.
	* gcc.target/i386/noevex512-2.c: Diito.
2023-12-20 10:10:43 +08:00
Siddhesh Poyarekar
576c1fc440 tree-object-size: Always set computed bit for bdos [PR113012]
It is always safe to set the computed bit for dynamic object sizes at
the end of collect_object_sizes_for because even in case of a dependency
loop encountered in nested calls, we have an SSA temporary to actually
finish the object size expression.  The reexamine pass for dynamic
object sizes is only for propagation of unknowns and gimplification of
the size expressions, not for loop resolution as in the case of static
object sizes.

gcc/ChangeLog:

	PR tree-optimization/113012
	* tree-object-size.cc (compute_builtin_object_size): Expand
	comment for dynamic object sizes.
	(collect_object_sizes_for): Always set COMPUTED bitmap for
	dynamic object sizes.

gcc/testsuite/ChangeLog:

	PR tree-optimization/113012
	* gcc.dg/ubsan/pr113012.c: New test case.

Signed-off-by: Siddhesh Poyarekar <siddhesh@gotplt.org>
2023-12-19 19:29:29 -05:00
GCC Administrator
fa1158c50a Daily bump. 2023-12-20 00:17:48 +00:00
Alexandre Oliva
181917d56c strub: use opt_for_fn during ipa
Instead of global optimization levels and flags, check per-function
ones.


for  gcc/ChangeLog

	* ipa-strub.cc (gsi_insert_finally_seq_after_call): Likewise.
	(pass_ipa_strub::adjust_at_calls_call): Likewise.
2023-12-19 21:06:24 -03:00
Alexandre Oliva
1b83fce7df strub: avoid lto inlining
The strub builtins are not suited for cross-unit inlining, they should
only be inlined by the builtin expanders, if at all.  While testing on
sparc64, it occurred to me that, if libgcc was built with LTO enabled,
lto1 might inline them, and that would likely break things.  So, make
sure they're clearly marked as not inlinable.


for  libgcc/ChangeLog

	* strub.c (ATTRIBUTE_NOINLINE): New.
	(ATTRIBUTE_STRUB_CALLABLE): Add it.
	(__strub_dummy_force_no_leaf): Drop it.
2023-12-19 21:06:22 -03:00
Alexandre Oliva
66c8b0f695 hardened: use LD_PIE_SPEC only if defined
sol2.h may define LINK_PIE_SPEC and leave LD_PIE_SPEC undefined, but
gcc.cc will only provide a LD_PIE_SPEC definition if LINK_PIE_SPEC is
not defined, and thenit uses LD_PIE_SPEC guarded by #ifdef HAVE_LD_PIE
only.  Add LD_PIE_SPEC to the guard.


gcc/ChangeLog

	* gcc.cc (process_command): Use LD_PIE_SPEC only if defined.
2023-12-19 21:06:17 -03:00
Marek Polacek
40337cae12 sccopy: remove unused data member [PR113069]
PR tree-optimization/113069

gcc/ChangeLog:

	* gimple-ssa-sccopy.cc (scc_discovery): Remove unused member.
2023-12-19 17:56:33 -05:00
Patrick Palka
fced59166f c++: local class memfn synth from uneval context [PR113063]
Here we first use and therefore synthesize the local class operator<=>
from an unevaluated context, which inadvertently affects synthesization
by preventing functions used within the definition (such as the copy
constructor of std::strong_ordering) from getting marked as odr-used.

This patch fixes this by using maybe_push_to_top_level in synthesize_method
which ensures cp_unevaluated_operand gets cleared even in the function-local
case.

	PR c++/113063

gcc/cp/ChangeLog:

	* method.cc (synthesize_method): Use maybe_push_to_top_level
	and maybe_pop_from_top_level.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp2a/spaceship-synth16.C: New test.
2023-12-19 16:33:55 -05:00
Patrick Palka
7f26997e64 c++: missing state restoration in maybe_pop_from_top_level
In the function-local case of maybe_pop_from_top_level, we need to
restore the global flags that maybe_push_to_top_level cleared.

gcc/cp/ChangeLog:

	* name-lookup.cc (struct local_state_t): Define.
	(local_state_stack): Define.
	(maybe_push_to_top_level): Use them.
	(maybe_pop_from_top_level): Likewise.
	* pt.cc (instantiate_decl): Remove dead code for saving/restoring
	cp_unevaluated_operand and c_inhibit_evaluation_warnings.
2023-12-19 16:26:27 -05:00
Nathaniel Shead
5ba949c096 c++: Check null pointer deref when calling memfn in constexpr [PR102420]
Calling a non-static member function on a null pointer is undefined
behaviour (see [expr.ref] p8) and should error in constant evaluation,
even if the 'this' pointer is never actually accessed within that
function.

One catch is that currently, the function pointer conversion operator
for lambdas passes a null pointer as the 'this' pointer to the
underlying 'operator()', so for now we ignore such calls.

	PR c++/102420

gcc/cp/ChangeLog:

	* constexpr.cc (cxx_bind_parameters_in_call): Check for calling
	non-static member functions with a null pointer.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/constexpr-memfn2.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
2023-12-20 08:18:56 +11:00
Francois-Xavier Coudert
d31c54c7da libgfortran: avoid duplicate libraries in spec
The linking of libgcc is already present in %(liborig), so the current
situation duplicates libraries. This was not an issue until macOS's new
linker started giving warnings for such cases.

libgfortran/ChangeLog:

	PR libfortran/110651
	* libgfortran.spec.in: Remove duplicate libraries.
2023-12-19 22:10:55 +01:00
Sandra Loosemore
d0603dfe9d OpenMP: Permit additional selector properties
This patch adds "hpe" to the known properties for the "vendor" selector,
and support for "acquire" and "release" for "atomic_default_mem_order".

gcc/ChangeLog
	* omp-general.cc (vendor_properties): Add "hpe".
	(atomic_default_mem_order_properties): Add "acquire" and "release".
	(omp_context_selector_matches): Handle "acquire" and "release".

gcc/testsuite/ChangeLog
	* c-c++-common/gomp/declare-variant-2.c: Don't expect error on
	"acquire" and "release".
	* gfortran.dg/gomp/declare-variant-2a.f90: Likewise.
2023-12-19 20:07:13 +00:00
Sandra Loosemore
9f9b3d6732 OpenMP: Use enumerators for names of trait-sets and traits
This patch introduces enumerators to represent trait-set names and
trait names, which makes it easier to use tables to control other
behavior and for switch statements to dispatch on the tags.  The tags
are stored in the same place in the TREE_LIST structure (OMP_TSS_ID or
OMP_TS_ID) and are encoded there as integer constants.

gcc/ChangeLog
	* omp-selectors.h: New file.
	* omp-general.h: Include omp-selectors.h.
	(OMP_TSS_CODE, OMP_TSS_NAME): New.
	(OMP_TS_CODE, OMP_TS_NAME): New.
	(make_trait_set_selector, make_trait_selector): Adjust declarations.
	(omp_construct_traits_to_codes): Likewise.
	(omp_context_selector_set_compare): Likewise.
	(omp_get_context_selector): Likewise.
	(omp_get_context_selector_list): New.
	* omp-general.cc (omp_construct_traits_to_codes): Pass length in
	as argument instead of returning it.  Make it table-driven.
	(omp_tss_map): New.
	(kind_properties, vendor_properties, extension_properties): New.
	(atomic_default_mem_order_properties): New.
	(omp_ts_map): New.
	(omp_check_context_selector): Simplify lookup and dispatch logic.
	(omp_mark_declare_variant): Ignore variants with unknown construct
	selectors.  Adjust for new representation.
	(make_trait_set_selector, make_trait_selector): Adjust for new
	representations.
	(omp_context_selector_matches): Simplify dispatch logic.  Avoid
	fixed-sized buffers and adjust call to omp_construct_traits_to_codes.
	(omp_context_selector_props_compare): Adjust for new representations
	and simplify dispatch logic.
	(omp_context_selector_set_compare): Likewise.
	(omp_context_selector_compare): Likewise.
	(omp_get_context_selector): Adjust for new representations, and split
	out...
	(omp_get_context_selector_list): New function.
	(omp_lookup_tss_code): New.
	(omp_lookup_ts_code): New.
	(omp_context_compute_score): Adjust for new representations.  Avoid
	fixed-sized buffers and magic numbers.  Adjust call to
	omp_construct_traits_to_codes.
	* gimplify.cc (omp_construct_selector_matches): Avoid use of
	fixed-size buffer.  Adjust call to omp_construct_traits_to_codes.

gcc/c/ChangeLog
	* c-parser.cc (omp_construct_selectors): Delete.
	(omp_device_selectors): Delete.
	(omp_implementation_selectors): Delete.
	(omp_user_selectors): Delete.
	(c_parser_omp_context_selector): Adjust for new representations
	and simplify dispatch logic.  Uniformly warn instead of sometimes
	error when an unknown selector is found.  Adjust error messages
	for extraneous/incorrect score.
	(c_parser_omp_context_selector_specification): Likewise.
	(c_finish_omp_declare_variant): Adjust for new representations.

gcc/cp/ChangeLog
	* decl.cc (omp_declare_variant_finalize_one): Adjust for new
	representations.
	* parser.cc (omp_construct_selectors): Delete.
	(omp_device_selectors): Delete.
	(omp_implementation_selectors): Delete.
	(omp_user_selectors): Delete.
	(cp_parser_omp_context_selector): Adjust for new representations
	and simplify dispatch logic.  Uniformly warn instead of sometimes
	error when an unknown selector is found.  Adjust error messages
	for extraneous/incorrect score.
	(cp_parser_omp_context_selector_specification): Likewise.
	* pt.cc (tsubst_attribute): Adjust for new representations.

gcc/fortran/ChangeLog
	* gfortran.h: Include omp-selectors.h.
	(enum gfc_omp_trait_property_kind): Delete, and replace all
	references with equivalent omp_tp_type enumerators.
	(struct gfc_omp_trait_property): Update for omp_tp_type.
	(struct gfc_omp_selector): Replace string name with new enumerator.
	(struct gfc_omp_set_selector): Likewise.
	* openmp.cc (gfc_free_omp_trait_property_list): Update for
	omp_tp_type.
	(omp_construct_selectors): Delete.
	(omp_device_selectors): Delete.
	(omp_implementation_selectors): Delete.
	(omp_user_selectors): Delete.
	(gfc_ignore_trait_property_extension): New.
	(gfc_ignore_trait_property_extension_list): New.
	(gfc_match_omp_selector): Adjust for new representations and simplify
	dispatch logic.  Uniformly warn instead of sometimes error when an
	unknown selector is found.
	(gfc_match_omp_context_selector): Adjust for new representations.
	Adjust error messages for extraneous/incorrect score.
	(gfc_match_omp_context_selector_specification): Likewise.
	* trans-openmp.cc (gfc_trans_omp_declare_variant): Adjust for
	new representations.

gcc/testsuite/
	* c-c++-common/gomp/declare-variant-1.c: Expect warning on
	unknown selectors.
	* c-c++-common/gomp/declare-variant-2.c: Likewise.  Also adjust
	messages for score errors.
	* c-c++-common/gomp/declare-variant-no-score.c: New.
	* gfortran.dg/gomp/declare-variant-1.f90: Expect warning on
	unknown selectors.
	* gfortran.dg/gomp/declare-variant-2.f90: Likewise.  Also adjust
	messages for score errors.
	* gfortran.dg/gomp/declare-variant-no-score.f90: New.
2023-12-19 20:07:13 +00:00
Sandra Loosemore
9b8fdcbf21 OpenMP: Unify representation of name-list properties.
Previously, name-list properties specified as identifiers were stored
in the TREE_PURPOSE/OMP_TP_NAME slot, while those specified as strings
were stored in the TREE_VALUE/OMP_TP_VALUE slot.  This patch puts both
representations in OMP_TP_VALUE with a magic cookie in OMP_TP_NAME.

gcc/ChangeLog
	* omp-general.h (OMP_TP_NAMELIST_NODE): New.
	* omp-general.cc (omp_context_name_list_prop): Move earlier
	in the file, and adjust for new representation.
	(omp_check_context_selector): Adjust this too.
	(omp_context_selector_props_compare): Likewise.

gcc/c/ChangeLog
	* c-parser.cc (c_parser_omp_context_selector): Adjust for new
	namelist property representation.

gcc/cp/ChangeLog
	* parser.cc (cp_parser_omp_context_selector): Adjust for new
	namelist property representation.
	* pt.cc (tsubst_attribute): Likewise.

gcc/fortran/ChangeLog
	* trans-openmp.cc (gfc_trans_omp_declare_varaint): Adjust for
	new namelist property representation.
2023-12-19 20:07:13 +00:00
Sandra Loosemore
82b32adaa7 OpenMP: Introduce accessor macros and constructors for context selectors.
This patch hides the underlying nested TREE_LIST structure of context
selectors behind accessor macros that have more meaningful names than
the generic TREE_PURPOSE/TREE_VALUE accessors.  There is a slight
change to the representation in that the score expression in
trait-selectors has a distinguished tag and is separated from the
ordinary properties, although internally it is still represented as
the first item in the TREE_VALUE of the selector.  This patch also renames
some local variables with slightly more descriptive names so it is easier
to track whether something is a selector-set, selector, or property.

gcc/ChangeLog
	* omp-general.h (OMP_TS_SCORE_NODE): New.
	(OMP_TSS_ID, OMP_TSS_TRAIT_SELECTORS): New.
	(OMP_TS_ID, OMP_TS_SCORE, OMP_TS_PROPERTIES): New.
	(OMP_TP_NAME, OMP_TP_VALUE): New.
	(make_trait_set_selector): Declare.
	(make_trait_selector): Declare.
	(make_trait_property): Declare.
	(omp_constructor_traits_to_codes): Rename to
	omp_construct_traits_to_codes.
	* omp-general.cc (omp_constructor_traits_to_codes): Rename
	to omp_construct_traits_to_codes.  Use new accessors.
	(omp_check_context_selector): Use new accessors.
	(make_trait_set_selector): New.
	(make_trait_selector): New.
	(make_trait_property): New.
	(omp_context_name_list_prop): Use new accessors.
	(omp_context_selector_matches): Use new accessors.
	(omp_context_selector_props_compare): Use new accessors.
	(omp_context_selector_set_compare): Use new accessors.
	(omp_get_context_selector): Use new accessors.
	(omp_context_compute_score): Use new accessors.
	* gimplify.cc (omp_construct_selector_matches): Adjust for renaming
	of omp_constructor_traits_to_codes.

gcc/c/ChangeLog
	* c-parser.cc (c_parser_omp_context_selector): Use new constructors.

gcc/cp/ChangeLog
	* parser.cc (cp_parser_omp_context_selector): Use new constructors.
	* pt.cc: Include omp-general.h.
	(tsubst_attribute): Use new context selector accessors and
	constructors.

gcc/fortran/ChangeLog
	* trans-openmp.cc (gfc_trans_omp_declare_variant): Use new
	constructors.
2023-12-19 20:06:58 +00:00
David Faust
1502d724df btf: change encoding of forward-declared enums [PR111735]
The BTF specification does not formally define a representation for
forward-declared enum types such as:

  enum Foo;

Forward-declarations for struct and union types are represented by
BTF_KIND_FWD, which has a 1-bit flag distinguishing the two.

The de-facto standard format used by other tools like clang and pahole
is to represent forward-declared enums as BTF_KIND_ENUM with vlen=0,
i.e. as a regular enum type with no enumerators.  This patch changes
GCC to adopt that format, and makes a couple of minor cleanups in
btf_asm_type ().

gcc/

	PR debug/111735
	* btfout.cc (btf_fwd_to_enum_p): New.
	(btf_asm_type_ref): Special case references to enum forwards.
	(btf_asm_type): Special case enum forwards. Rename btf_size_type to
	btf_size, and change chained ifs switching on btf_kind into else ifs.

gcc/testsuite/

	PR debug/111735
	* gcc.dg/debug/btf/btf-forward-2.c: New test.
2023-12-19 09:50:14 -08:00
Patrick Palka
0a37463758 c++: partial ordering and dep alias tmpl specs [PR90679]
During partial ordering, we want to look through dependent alias
template specializations within template arguments and otherwise
treat them as opaque in other contexts (see e.g. r7-7116-g0c942f3edab108
and r11-7011-g6e0a231a4aa240).  To that end template_args_equal was
given a partial_order flag that controls this behavior.  This flag
does the right thing when a dependent alias template specialization
appears as template argument of the partial specialization, e.g. in

  template<class T, class...> using first_t = T;
  template<class T> struct traits;
  template<class T> struct traits<first_t<T, T&>> { }; // #1
  template<class T> struct traits<first_t<const T, T&>> { }; // #2

we correctly consider #2 to be more specialized than #1.  But if the
alias specialization appears as a nested template argument of another
class template specialization, e.g. in

  template<class T> struct traits<A<first_t<T, T&>>> { }; // #1
  template<class T> struct traits<A<first_t<const T, T&>>> { }; // #2

then we incorrectly consider #1 and #2 to be unordered.  This is because

  1. we don't propagate the flag to recursive template_args_equal calls
  2. we don't use structural equality for class template specializations
     written in terms of dependent alias template specializations

This patch fixes the first issue by turning the partial_order flag into
a global.  This patch fixes the second issue by making us propagate
structural equality appropriately when building a class template
specialization.  In passing this patch also improves hashing of
specializations that use structural equality.

	PR c++/90679

gcc/cp/ChangeLog:

	* cp-tree.h (comp_template_args): Remove partial_order parameter.
	(template_args_equal): Likewise.
	* pt.cc (comparing_for_partial_ordering): New global flag.
	(iterative_hash_template_arg) <case tcc_type>: Hash the template
	and arguments for specializations that use structural equality.
	(template_args_equal): Remove partial order parameter and
	use comparing_for_partial_ordering instead.
	(comp_template_args): Likewise.
	(comp_template_args_porder): Set comparing_for_partial_ordering
	instead.  Make static.
	(any_template_arguments_need_structural_equality_p): Return true
	for an argument that's a dependent alias template specialization
	or a class template specialization that itself needs structural
	equality.
	* tree.cc (cp_tree_equal) <case TREE_VEC>: Adjust call to
	comp_template_args.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/alias-decl-75a.C: New test.
	* g++.dg/cpp0x/alias-decl-75b.C: New test.
2023-12-19 11:40:15 -05:00
Patrick Palka
6d27ee7fcc c++: refine dependent_alias_template_spec_p [PR90679]
For a (complex) alias template-id, dependent_alias_template_spec_p
returns true if any template argument of the template-id is dependent.
This predicate indicates that substitution into the template-id may
behave differently with respect to SFINAE than substitution into the
expanded alias, and so the alias is in a way non-transparent.

For example, 'first_t<T, T&>' in

  template<class T, class...> using first_t = T;
  template<class T> first_t<T, T&> f();

is such an alias template-id since first_t doesn't use its second
template parameter and so the substitution into the expanded alias would
discard the SFINAE effects of the corresponding (dependent) argument 'T&'.

But this predicate is overly conservative since what really matters for
sake of SFINAE equivalence is whether a template argument corresponding
to an _unused_ template parameter is dependent.  So the predicate should
return false for e.g. 'first_t<T&, int>'.

This patch refines the predicate appropriately.  We need to be able to
efficiently determine which template parameters of a complex alias
template are unused, so to that end we add a new out parameter to
complex_alias_template_p and cache its result in an on-the-side hash_map
that replaces the existing TEMPLATE_DECL_COMPLEX_ALIAS_P flag.

	PR c++/90679

gcc/cp/ChangeLog:

	* cp-tree.h (TEMPLATE_DECL_COMPLEX_ALIAS_P): Remove.
	(most_general_template): Constify parameter.
	* pt.cc (push_template_decl): Adjust after removing
	TEMPLATE_DECL_COMPLEX_ALIAS_P.
	(complex_alias_tmpl_info): New hash_map.
	(uses_all_template_parms_data::seen): Change type to
	tree* from bool*.
	(complex_alias_template_r): Adjust accordingly.
	(complex_alias_template_p): Add 'seen_out' out parameter.
	Call most_general_template and check PRIMARY_TEMPLATE_P.
	Use complex_alias_tmpl_info to cache the result and set
	'*seen_out' accordigly.
	(dependent_alias_template_spec_p): Add !processing_template_decl
	early exit test.  Consider dependence of only template arguments
	corresponding to seen template parameters as per

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/alias-decl-76.C: New test.
2023-12-19 11:26:34 -05:00
Marc Poulhiès
c37159d2e5 testsuite: adjust call to abort in excess-precision-12
On non-hosted targets, cstdlib may not be sufficient to have abort
defined, but it should be for std::abort.

gcc/testsuite/ChangeLog:

	* g++.target/i386/excess-precision-12.C: call std::abort instead of abort.
2023-12-19 16:02:48 +01:00
Marc Poulhiès
41f1b570ac ada: Add makefile targets for building/installing html doc
Add the ada.html and ada.install-html targets so that we can build the
html with `make html`.

gcc/ada/

	* gcc-interface/Make-lang.in (ada.html, ada.install-html): Add.
2023-12-19 15:27:51 +01:00
Eric Botcazou
a3626f49d6 ada: Fix internal error on call with parameter of predicated subtype
The problem is that the predicated subtype does not inherit all the required
attributes of a string subtype with a static predicate.

gcc/ada/

	* sem_ch3.adb (Analyze_Subtype_Declaration): Remove a short-circuit
	for subtypes without aspects when it comes to predicates.
	* sem_util.adb (Inherit_Predicate_Flags): Deal with private subtypes
	whose full view is an Itype.
2023-12-19 15:27:51 +01:00
Viljar Indus
257a2fca4f ada: Check all interfaces for valid iterator type
gcc/ada/

	* sem_ch13.adb (Valid_Default_Iterator): Check all interfaces for
	valid iterator type. Also improve error reporting.
2023-12-19 15:27:50 +01:00