GCC modified for the FreeChainXenon project
3dd6f73a23
For the stmt _1 = _2 + _3, assume that _2 or _3 not used after this stmt. _1 can use same register with _2 or _3 if without early clobber. Two registers are needed, but current calculation is three. This patch preserves point 0 for bb entry and excludes its def when calculates live regs of certain point. Signed-off-by: demin.han <demin.han@starfivetech.com> gcc/ChangeLog: * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix max live vregs calc (preferred_new_lmul_p): Ditto gcc/testsuite/ChangeLog: * gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c: Moved to... * gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-10.c: ...here. * gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-4.c: Moved to... * gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-11.c: ...here. Signed-off-by: demin.han <demin.han@starfivetech.com> |
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