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198754 commits

Author SHA1 Message Date
Ju-Zhe Zhong
a432d0d9e0 RISC-V: Add vwmacc vx C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vwmacc_vx-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmacc_vx_tumu-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccsu_vx_tumu-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccu_vx_tumu-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_tu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_tu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_tu-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_tum-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_tum-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_tum-3.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_tumu-1.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_tumu-2.c: New test.
	* gcc.target/riscv/rvv/base/vwmaccus_vx_tumu-3.c: New test.
2023-02-15 21:42:03 +08:00
Ju-Zhe Zhong
272e119d97 RISC-V: Finish all integer C/C++ intrinsics
gcc/ChangeLog:

	* config/riscv/predicates.md: Refine codes.
	* config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
	* config/riscv/riscv-v.cc: Refine codes.
	* config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
	enum.
	(class imac): New class.
	(enum widen_ternop_type): New enum.
	(class iwmac): New class.
	(BASE): New class.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
	(vnmsac): Ditto.
	(vmadd): Ditto.
	(vnmsub): Ditto.
	(vwmacc): Ditto.
	(vwmaccu): Ditto.
	(vwmaccsu): Ditto.
	(vwmaccus): Ditto.
	* config/riscv/riscv-vector-builtins.cc
	(function_builder::apply_predication): Adjust for multiply-add support.
	(function_expander::add_vundef_operand): Refine codes.
	(function_expander::use_ternop_insn): New function.
	(function_expander::use_widen_ternop_insn): Ditto.
	* config/riscv/riscv-vector-builtins.h: New function.
	* config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
	(pred_mul_<optab><mode>_undef_merge): Ditto.
	(*pred_<madd_nmsub><mode>): Ditto.
	(*pred_<macc_nmsac><mode>): Ditto.
	(*pred_mul_<optab><mode>): Ditto.
	(@pred_mul_<optab><mode>_scalar): Ditto.
	(*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
	(*pred_<madd_nmsub><mode>_scalar): Ditto.
	(*pred_<macc_nmsac><mode>_scalar): Ditto.
	(*pred_mul_<optab><mode>_scalar): Ditto.
	(*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
	(*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
	(*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
	(*pred_mul_<optab><mode>_extended_scalar): Ditto.
	(@pred_widen_mul_plus<su><mode>): Ditto.
	(@pred_widen_mul_plus<su><mode>_scalar): Ditto.
	(@pred_widen_mul_plussu<mode>): Ditto.
	(@pred_widen_mul_plussu<mode>_scalar): Ditto.
	(@pred_widen_mul_plusus<mode>_scalar): Ditto.
2023-02-15 21:41:51 +08:00
Ju-Zhe Zhong
a75fa2518d RISC-V: Add vmseq vv C++ tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmseq_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vv_m-1.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vv_m-2.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vv_m-3.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vv_mu-3.C: New test.
2023-02-15 21:17:24 +08:00
Ju-Zhe Zhong
c4e770c452 RISC-V: Add vmseq vx C++ tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmseq_vx_m_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_m_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_m_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_m_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_m_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_m_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmseq_vx_rv64-3.C: New test.
2023-02-15 21:17:24 +08:00
Ju-Zhe Zhong
5e96553eba RISC-V: Add vmsge vv C++ tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmsge_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vv_m-1.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vv_m-2.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vv_m-3.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vv_m-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vv_m-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vv_m-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vv_mu-3.C: New test.
2023-02-15 21:17:24 +08:00
Ju-Zhe Zhong
92e575eacf RISC-V: Add vmsge vx C++ api tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmsge_vx_m_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_m_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_m_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_m_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_m_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_m_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsge_vx_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_m_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_m_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_m_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_m_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_m_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_m_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgeu_vx_rv64-3.C: New test.
2023-02-15 21:17:24 +08:00
Ju-Zhe Zhong
0d689135ff RISC-V: Add vmsgt vv C++ tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmsgt_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vv_m-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vv_m-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vv_m-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vv_m-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vv_m-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vv_m-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vv_mu-3.C: New test.
2023-02-15 21:17:23 +08:00
Ju-Zhe Zhong
cfbcbe8e27 RISC-V: Add vmsgt vx C++ tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmsgt_vx_m_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_m_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_m_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_m_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_m_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_m_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgt_vx_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_m_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_m_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_m_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_m_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_m_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_m_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsgtu_vx_rv64-3.C: New test.
2023-02-15 21:17:23 +08:00
Ju-Zhe Zhong
d6d9206d2b RISC-V: Add vmsle vv C++ api tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmsle_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vv_m-1.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vv_m-2.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vv_m-3.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vv_m-1.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vv_m-2.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vv_m-3.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vv_mu-3.C: New test.
2023-02-15 21:17:23 +08:00
Ju-Zhe Zhong
6c4262a525 RISC-V: Add vmsle vx C++ api tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmsle_vx_m_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_m_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_m_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_m_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_m_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_m_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsle_vx_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_m_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_m_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_m_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_m_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_m_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_m_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsleu_vx_rv64-3.C: New test.
2023-02-15 21:17:23 +08:00
Ju-Zhe Zhong
400f003ee5 RISC-V: Add vmslt vv C++ api tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmslt_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vv_m-1.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vv_m-2.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vv_m-3.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vv_mu-3.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vv_m-1.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vv_m-2.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vv_m-3.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vv_mu-3.C: New test.
2023-02-15 21:17:23 +08:00
Ju-Zhe Zhong
18f4691e31 RISC-V: Add vmslt vx C++ tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmslt_vx_m_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_m_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_m_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_m_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_m_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_m_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmslt_vx_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_m_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_m_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_m_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_m_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_m_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_m_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsltu_vx_rv64-3.C: New test.
2023-02-15 21:17:23 +08:00
Ju-Zhe Zhong
f87fca5d7f RISC-V: Add vmsne vv C++ tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmsne_vv-1.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vv-2.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vv-3.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vv_m-1.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vv_m-2.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vv_m-3.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vv_mu-1.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vv_mu-2.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vv_mu-3.C: New test.
2023-02-15 21:17:23 +08:00
Ju-Zhe Zhong
ecdbebde7c RISC-V: Add vmsne vx C++ tests
gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/vmsne_vx_m_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_m_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_m_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_m_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_m_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_m_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_mu_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_mu_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_mu_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_mu_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_mu_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_mu_rv64-3.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_rv32-1.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_rv32-2.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_rv32-3.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_rv64-1.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_rv64-2.C: New test.
	* g++.target/riscv/rvv/base/vmsne_vx_rv64-3.C: New test.
2023-02-15 21:17:23 +08:00
Ju-Zhe Zhong
6ec7b7b3e4 RISC-V: Add binop constraints tests for integer compare
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/binop_vv_constraint-2.c: New test.
	* gcc.target/riscv/rvv/base/binop_vv_constraint-3.c: New test.
	* gcc.target/riscv/rvv/base/binop_vv_constraint-4.c: New test.
	* gcc.target/riscv/rvv/base/binop_vv_constraint-5.c: New test.
	* gcc.target/riscv/rvv/base/binop_vv_constraint-6.c: New test.
	* gcc.target/riscv/rvv/base/binop_vv_constraint-7.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-123.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-124.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-125.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-126.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-127.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-128.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-129.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-130.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-131.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-132.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-133.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-134.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-135.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-136.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-137.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-138.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-139.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-140.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-141.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-142.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-143.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-144.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-145.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-146.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-147.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-148.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-149.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-150.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-151.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-152.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-153.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-154.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-155.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-156.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-157.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-158.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-159.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-160.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-161.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-162.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-163.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-164.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-165.c: New test.
	* gcc.target/riscv/rvv/base/binop_vx_constraint-166.c: New test.
2023-02-15 21:17:23 +08:00
Ju-Zhe Zhong
4d06fc3790 RISC-V: Add vmseq vv C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmseq_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vv_mu-3.c: New test.
2023-02-15 21:17:22 +08:00
Ju-Zhe Zhong
76db33c592 RISC-V: Add vmseq vx C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmseq_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmseq_vx_rv64-3.c: New test.
2023-02-15 21:17:22 +08:00
Ju-Zhe Zhong
52ba1d2e23 RISC-V: Add vmsge vv C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmsge_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vv_mu-3.c: New test.
2023-02-15 21:17:22 +08:00
Ju-Zhe Zhong
5893cfb26a RISC-V: Add vmsge vx C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmsge_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsge_vx_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgeu_vx_rv64-3.c: New test.
2023-02-15 21:17:22 +08:00
Ju-Zhe Zhong
fe1a6c2c8a RISC-V: Add vmsgt vv C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmsgt_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vv_mu-3.c: New test.
2023-02-15 21:17:22 +08:00
Ju-Zhe Zhong
6dae0aa248 RISC-V: Add vmsgt vx C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmsgt_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgt_vx_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsgtu_vx_rv64-3.c: New test.
2023-02-15 21:17:22 +08:00
Ju-Zhe Zhong
f7b8022bcd RISC-V: Add vmsle vv C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmsle_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vv_mu-3.c: New test.
2023-02-15 21:17:22 +08:00
Ju-Zhe Zhong
fec15ae4a3 RISC-V: Add vmsle vx C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmsle_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsle_vx_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsleu_vx_rv64-3.c: New test.
2023-02-15 21:17:22 +08:00
Ju-Zhe Zhong
85a8ad0a35 RISC-V: Add vmslt vv C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmslt_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vv_mu-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vv_mu-3.c: New test.
2023-02-15 21:17:21 +08:00
Ju-Zhe Zhong
13a256448a RISC-V: Add vmslt vx C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmslt_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmslt_vx_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsltu_vx_rv64-3.c: New test.
2023-02-15 21:17:21 +08:00
Ju-Zhe Zhong
946ed63e61 RISC-V: Add vmsne vv C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmsne_vv-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vv-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vv-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vv_m-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vv_m-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vv_m-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vv_mu-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vv_mu-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vv_mu-3.c: New test.
2023-02-15 21:17:21 +08:00
Ju-Zhe Zhong
fca68b0bbf RISC-V: Add vmsne.vx C api tests
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vmsne_vx_m_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_m_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_m_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_m_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_m_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_m_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_mu_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_mu_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_mu_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_mu_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_mu_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_mu_rv64-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_rv32-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_rv32-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_rv32-3.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_rv64-1.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_rv64-2.c: New test.
	* gcc.target/riscv/rvv/base/vmsne_vx_rv64-3.c: New test.
2023-02-15 21:17:21 +08:00
Ju-Zhe Zhong
acb51b5c80 RISC-V: Add integer compare C/C++ intrinsic support
gcc/ChangeLog:

	* config/riscv/predicates.md (vector_mask_operand): Refine the codes.
	(vector_all_trues_mask_operand): New predicate.
	(vector_undef_operand): New predicate.
	(ltge_operator): New predicate.
	(comparison_except_ltge_operator): New predicate.
	(comparison_except_eqge_operator): New predicate.
	(ge_operator): New predicate.
	* config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
	* config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
	(BASE): Ditto.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
	(vmsne): Ditto.
	(vmslt): Ditto.
	(vmsgt): Ditto.
	(vmsle): Ditto.
	(vmsge): Ditto.
	(vmsltu): Ditto.
	(vmsgtu): Ditto.
	(vmsleu): Ditto.
	(vmsgeu): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.cc
	(struct return_mask_def): Adjust for compare support.
	* config/riscv/riscv-vector-builtins.cc
	(function_expander::use_compare_insn): New function.
	* config/riscv/riscv-vector-builtins.h
	(function_expander::add_integer_operand): Ditto.
	* config/riscv/riscv.cc (riscv_print_operand): Add compare support.
	* config/riscv/riscv.md: Add vector min/max attributes.
	* config/riscv/vector-iterators.md (xnor): New iterator.
	* config/riscv/vector.md (@pred_cmp<mode>): New pattern.
	(*pred_cmp<mode>): Ditto.
	(*pred_cmp<mode>_narrow): Ditto.
	(@pred_ltge<mode>): Ditto.
	(*pred_ltge<mode>): Ditto.
	(*pred_ltge<mode>_narrow): Ditto.
	(@pred_cmp<mode>_scalar): Ditto.
	(*pred_cmp<mode>_scalar): Ditto.
	(*pred_cmp<mode>_scalar_narrow): Ditto.
	(@pred_eqne<mode>_scalar): Ditto.
	(*pred_eqne<mode>_scalar): Ditto.
	(*pred_eqne<mode>_scalar_narrow): Ditto.
	(*pred_cmp<mode>_extended_scalar): Ditto.
	(*pred_cmp<mode>_extended_scalar_narrow): Ditto.
	(*pred_eqne<mode>_extended_scalar): Ditto.
	(*pred_eqne<mode>_extended_scalar_narrow): Ditto.
	(@pred_ge<mode>_scalar): Ditto.
	(@pred_<optab><mode>): Ditto.
	(@pred_n<optab><mode>): Ditto.
	(@pred_<optab>n<mode>): Ditto.
	(@pred_not<mode>): Ditto.
2023-02-15 21:17:21 +08:00
Iain Sandoe
142bd88c5f testsuite, objective-c: Fix a testcase on Windows.
Windows needs to use uintptr_t to represent an integral pointer type (long
is not the right type there).

Patch from 'nightstike'.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>

gcc/testsuite/ChangeLog:

	* obj-c++.dg/proto-lossage-4.mm: Use uintptr_t for integral pointer
	representations.
2023-02-15 10:51:35 +00:00
Martin Jambor
8b1b1b2d69
ipa: Avoid IPA confusing scalar values and single-field aggregates (PR 108679)
PR 108679 testcase shows a situation when IPA-CP is able to track a
scalar constant in a single-field structure that is part of a bigger
structure.  This smaller structure is however also passed in a few
calls to other functions, but the two same-but-different entities,
originally placed at the same offset and with the same size, confuse
the mechanism that takes care of handling call statements after
IPA-SRA.

I think that in stage 4 it is best to revert to GCC 12 behavior in this
particular case (when IPA-CP detects a constant in a single-field
structure or a single element array that is part of a bigger aggregate)
and the patch below does that.  If accepted, I plan to file a
missed-optimization bug to track that we could use the IPA-CP propagated
value to re-construct the small aggregate arguments.

gcc/ChangeLog:

2023-02-13  Martin Jambor  <mjambor@suse.cz>

	PR ipa/108679
	* ipa-sra.cc (push_param_adjustments_for_index): Do not omit
	creation of non-scalar replacements even if IPA-CP knows their
	contents.

gcc/testsuite/ChangeLog:

2023-02-13  Martin Jambor  <mjambor@suse.cz>

	PR ipa/108679
	* gcc.dg/ipa/pr108679.c: New test.
2023-02-15 11:38:07 +01:00
Tobias Burnus
7a8cada824 OpenMP/Fortran: Fix loop-iter var privatization with !$OMP LOOP [PR108512]
For 'parallel', loop-iteration variables are marked are marked as 'private',
unless they either appear in an omp do/simd loop or an data-sharing clause
already exists for those on 'parallel'. 'omp loop' wasn't handled, leading
to (potentially) multiple data-sharing clauses in gfc_resolve_do_iterator
as omp_current_ctx pointed to the 'parallel' directive, ignoring the
in-betwen 'loop' directive.

The latter lead to a bogus diagnostic - or rather an ICE as the source
location var contained only '\0'.

Additionally, several 'case EXEC_OMP...LOOP' have been added to call the
right resolution function and likewise for '{masked,master} taskloop'.

gcc/fortran/ChangeLog:

	PR fortran/108512
	* openmp.cc (gfc_resolve_omp_parallel_blocks): Handle combined 'loop'
	directives.
	(gfc_resolve_do_iterator): Set a source location for added
	'private'-clause arguments.
	* resolve.cc (gfc_resolve_code): Call gfc_resolve_omp_do_blocks
	also for EXEC_OMP_LOOP and gfc_resolve_omp_parallel_blocks for
	combined directives with loop + '{masked,master} taskloop (simd)'.

gcc/testsuite/ChangeLog:

	PR fortran/108512
	* gfortran.dg/gomp/loop-5.f90: New test.
	* gfortran.dg/gomp/loop-2.f90: Update dg-error.
	* gfortran.dg/gomp/taskloop-2.f90: Update dg-error.
2023-02-15 11:23:31 +01:00
Tobias Burnus
edaf1d6078 libgomp: Fix reverse-offload for GOMP_MAP_TO_PSET
libgomp/
	* target.c (gomp_target_rev): Dereference ptr
	to get device address.
	* testsuite/libgomp.fortran/reverse-offload-5.f90: Add test
	for unallocated allocatable.
2023-02-15 11:21:11 +01:00
Tobias Burnus
c7a9655be6 libgomp: Fix 'target enter data' with always pointer
As GOMP_MAP_ALWAYS_POINTER operates on the previous map item, ensure that
with 'target enter data' both are passed together to gomp_map_vars_internal.

libgomp/ChangeLog:

	* target.c (gomp_map_vars_internal): Add 'i > 0' before doing a
	kind check.
	(GOMP_target_enter_exit_data): If the next map item is
	GOMP_MAP_ALWAYS_POINTER map it together with the current item.
	* testsuite/libgomp.fortran/target-enter-data-3.f90: New test.
2023-02-15 11:18:31 +01:00
Jakub Jelinek
3f71b82596 powerpc: Fix up expansion for WIDEN_MULT_PLUS_EXPR [PR108787]
WIDEN_MULT_PLUS_EXPR as documented has the factor operands with
the same precision and the addend and result another one at least twice
as wide.
Similarly, {,u}maddMN4 is documented as
'maddMN4'
     Multiply operands 1 and 2, sign-extend them to mode N, add operand
     3, and store the result in operand 0.  Operands 1 and 2 have mode M
     and operands 0 and 3 have mode N.  Both modes must be integer or
     fixed-point modes and N must be twice the size of M.

     In other words, 'maddMN4' is like 'mulMN3' except that it also adds
     operand 3.

     These instructions are not allowed to 'FAIL'.

'umaddMN4'
     Like 'maddMN4', but zero-extend the multiplication operands instead
     of sign-extending them.
The PR103109 addition of these expanders to rs6000 didn't handle this
correctly though, it treated the last argument as also having mode M
sign or zero extended into N.  Unfortunately this means incorrect code
generation whenever the last operand isn't really sign or zero extended
from DImode to TImode.

The following patch removes maddditi4 expander altogether from rs6000.md,
because we'd need
        maddhd 9,3,4,5
        sradi 10,5,63
        maddld 3,3,4,5
        sub 9,9,10
        add 4,9,6
which is longer than
        mulld 9,3,4
        mulhd 4,3,4
        addc 3,9,5
        adde 4,4,6
and nothing would be able to optimize the case of last operand already
sign-extended from DImode to TImode into just
	mr 9,3
        maddld 3,3,4,5
        maddhd 4,9,4,5
or so.  And fixes umaddditi4, so that it emits an add at the end to add
the high half of the last operand, fortunately in this case if the high
half of the last operand is known to be zero (i.e. last operand is zero
extended from DImode to TImode) then combine will drop the useless add.

If we wanted to get back the signed op1 * op2 + op3 all in the DImode
into TImode op0, we'd need to introduce a new tree code next to
WIDEN_MULT_PLUS_EXPR and maddMN4 expander, because I'm afraid it can't
be done at expansion time in maddMN4 expander to detect whether the
operand is sign extended especially because of SUBREGs and the awkwardness
of looking at earlier emitted instructions, and combine would need 5
instruction combination.

2023-02-15  Jakub Jelinek  <jakub@redhat.com>

	PR target/108787
	PR target/103109
	* config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
	expander, change operand 3 to be TImode, emit maddlddi4 and
	umadddi4_highpart{,_le} with its low half and finally add the high
	half to the result.

	* gcc.dg/pr108787.c: New test.
	* gcc.target/powerpc/pr108787.c: New test.
	* gcc.target/powerpc/pr103109-1.c: Adjust expected instruction counts.
2023-02-15 10:13:00 +01:00
Martin Liska
545c9f8b78 docs: document new --param=asan-kernel-mem-intrinsic-prefix
gcc/ChangeLog:

	* doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
2023-02-15 09:37:59 +01:00
Jakub Jelinek
1e7a87dc19 c++: Add testcases from some Issaquah DRs
The following patch adds testcases for 5 DRs.  In the DR2475, DR2530 and
CWG2691 my understanding is we already implement the desired behavior,
in DR2478 partially (I've added 2 dg-bogus there, I think we inherit
rather than overwrite DECL_DECLARED_CONSTINIT_P for explicit specialization
somewhere, still far better than clang++) and DR2673 on the other side the
DR was to codify the clang++ behavior rather than GCC.

Not 100% sure if it is better to commit the 2 with dg-bogus or just wait
until the actual fixes are implemented.  BTW, I've noticed
register_specialization does:
              FOR_EACH_CLONE (clone, fn)
                {
                  DECL_DECLARED_INLINE_P (clone)
                    = DECL_DECLARED_INLINE_P (fn);
                  DECL_SOURCE_LOCATION (clone)
                    = DECL_SOURCE_LOCATION (fn);
                  DECL_DELETED_FN (clone)
                    = DECL_DELETED_FN (fn);
                }
but not e.g. constexpr/consteval, have tried to cover that in a testcase
but haven't managed to do so.

2023-02-15  Jakub Jelinek  <jakub@redhat.com>

	* g++.dg/DRs/dr2475.C: New test.
	* g++.dg/DRs/dr2478.C: New test.
	* g++.dg/DRs/dr2530.C: New test.
	* g++.dg/DRs/dr2673.C: New test.
	* c-c++-common/cpp/delimited-escape-seq-8.c: New test.
2023-02-15 09:34:41 +01:00
Richard Biener
86bc090961 Fix possible sanopt compile-time hog
While working on bitmap operations I figured sanopt.cc uses
a sbitmap worklist, iterating using bitmap_first_set_bit on it.
That's quadratic since bitmap_first_set_bit for sbitmap is O(n).

The fix is to use regular bitmaps for the worklist and the bitmap
feeding it and to avoid a useless copy.

	* sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
	for with_poison and alias worklist to it.
	(sanitize_asan_mark_poison): Likewise.
2023-02-15 08:28:48 +01:00
Richard Biener
e1dfac7e71 target/108738 - optimize bit operations in STV
The following does low-hanging optimizations, combining bitmap
test and set and removing redundant operations.

	PR target/108738
	* config/i386/i386-features.cc (scalar_chain::add_to_queue):
	Combine bitmap test and set.
	(scalar_chain::add_insn): Likewise.
	(scalar_chain::analyze_register_chain): Remove redundant
	attempt to add to queue and instead strengthen assert.
	Sink common attempts to mark the def dual-mode.
	(scalar_chain::add_to_queue): Remove redundant insn bitmap
	check.
2023-02-15 08:28:08 +01:00
Richard Biener
ec23e9e25e target/108738 - STV bitmap operations compile-time hog
When the set of candidates becomes very large then repeated
bit checks on it during the build of an actual chain can become
slow because of the O(n) nature of bitmap tests.  The following
switches the candidates bitmaps to the tree representation before
building the chains to get O(log n) amortized behavior.

For the testcase at hand this improves STV time by 50%.

	PR target/108738
	* config/i386/i386-features.cc (convert_scalars_to_vector):
	Switch candidates bitmaps to tree view before building the chains.
2023-02-15 08:28:08 +01:00
GCC Administrator
05467d08e7 Daily bump. 2023-02-15 00:17:49 +00:00
Hans-Peter Nilsson
d68adf8537 gen_reload: Correct parameter for fatal_insn call
Observed when disabling LEGITIMIZE_RELOAD_ADDRESS for
cris-elf: the current code doesn't handle the post-cc0
parallel-with-clobber-of-cc0 sets, dropping down into the
fatal_insn call.  Following the code, it's obvious that the
variable "set" is always NULL at the call.  The intended
parameter is "in".

	* reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
	"failure trying to reload" call.
2023-02-15 01:15:43 +01:00
Hans-Peter Nilsson
abbdb623c4 debug: Support "phrs" for dumping a HARD_REG_SET
The debug-function in sel-sched-dump.cc that would be
suitable for a hookup to a command in gdb is guarded by
#ifdef INSN_SCHEDULING, thus can't be used for all targets.
Better move the function marked DEBUG_FUNCTION elsewhere,
here to a file with a suitable static function to call.

There are multiple sets of similar functions dumping
HARD_REG_SETs, but cleaning that up is better left to a
separate commit.

gcc:
	* gdbinit.in (phrs): New command.
	* sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
	* ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
2023-02-15 01:09:06 +01:00
Marek Polacek
cce6262502 c++: fix ICE in joust_maybe_elide_copy [PR106675]
joust_maybe_elide_copy checks that the last conversion in the ICS for
the first argument is ck_ref_bind, which is reasonable, because we've
checked that we're dealing with a copy/move constructor.  But it can
also happen that we couldn't figure out which conversion function is
better to convert the argument, as in this testcase: joust couldn't
decide if we should go with

  operator foo &()

or

  operator foo const &()

so we get a ck_ambig, which then upsets joust_maybe_elide_copy.  Since
a ck_ambig can validly occur, I think we should just return early, as
in the patch below.

	PR c++/106675

gcc/cp/ChangeLog:

	* call.cc (joust_maybe_elide_copy): Return false for ck_ambig.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/overload-conv-5.C: New test.
2023-02-14 19:04:18 -05:00
David Faust
c348a71721 bpf: fix memory constraint of ldx/stx instructions [PR108790]
In some cases where the target memory address for an ldx or stx
instruction could be reduced to a constant, GCC could emit a malformed
instruction like:

    ldxdw %r0,0

Rather than the expected form:

    ldxdw %rX, [%rY + OFFSET]

This is due to the constraint allowing a const_int operand, which the
output templates do not handle.

Fix it by introducing a new memory constraint for the appropriate
operands of these instructions, which is identical to 'm' except that
it does not accept const_int.

gcc/

	PR target/108790
	* config/bpf/constraints.md (q): New memory constraint.
	* config/bpf/bpf.md (zero_extendhidi2): Use it here.
	(zero_extendqidi2): Likewise.
	(zero_extendsidi2): Likewise.
	(*mov<MM:mode>): Likewise.

gcc/testsuite/

	PR target/108790
	* gcc.target/bpf/ldxdw.c: New test.
2023-02-14 14:44:34 -08:00
Andrew Pinski
a42ed1d918 Simplify "1 - bool_val" to "bool_val ^ 1"
For bool values, it is easier to deal with
xor 1 rather than having 1 - a. This is because
we are more likely to simplify the xor further in many
cases.

This is a special case for (MASK - b) where MASK
is a powerof2 - 1 and b <= MASK but only for bool
ranges ([0,1]) as that is the main case where the
difference comes into play.

Note this is enabled for gimple folding only
as the ranges are only know while doing gimple
folding and cfun is not always set when fold is called.

OK? Bootstrapped and tested on x86_64-linux-gnu with no
regressions.

gcc/ChangeLog:

	PR tree-optimization/108355
	PR tree-optimization/96921
	* match.pd: Add pattern for "1 - bool_val".

gcc/testsuite/ChangeLog:

	PR tree-optimization/108355
	PR tree-optimization/96921
	* gcc.dg/tree-ssa/bool-minus-1.c: New test.
	* gcc.dg/tree-ssa/bool-minus-2.c: New test.
	* gcc.dg/tree-ssa/pr108354-1.c: New test.
2023-02-14 21:44:21 +00:00
Gerald Pfeifer
7e300a3d04 libstdc++: Update an open-std.org link
libstdc++-v3/ChangeLog:

	* doc/xml/manual/status_cxx2017.xml: Update an open-std.org link
	to www.open-std.org and https.
	* doc/html/manual/status.html: Regenerate.
2023-02-14 22:17:10 +01:00
Richard Biener
e72c2770b6 Improve VN PHI hash table handling
The hash function of PHIs is weak since we want to be able to CSE
them even across basic-blocks in some cases.  The following avoids
weakening the hash for cases we are never going to CSE, reducing
the number of collisions and avoiding redundant work in the
hash and equality functions.

	* tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
	basic block index hashing on the availability of ->cclhs.
	(vn_phi_eq): Avoid re-doing sanity checks for CSE but
	rely on ->cclhs availability.
	(vn_phi_lookup): Set ->cclhs only when we are eventually
	going to CSE the PHI.
	(vn_phi_insert): Likewise.
2023-02-14 16:18:57 +01:00
Eric Botcazou
1434eee54e Fix small regression in Ada
gcc/
	* gimplify.cc (gimplify_save_expr): Add missing guard.
gcc/ada/
	* gcc-interface/trans.cc (gnat_gimplify_expr): Add missing guard.
gcc/testsuite/
	* gnat.dg/shift2.adb: New test.
2023-02-14 13:27:18 +01:00
Dongsheng Song
a16fc9333f Fix musl build on Linux
The commit "ada: Add PIE support to backtraces on Linux" uses
_r_debug under Linux unconditionally. It is incorrect since musl
libc does not define _r_debug like glibc.

gcc/ada/
	* adaint.c [Linux]: Include <features.h>.
	(__gnat_get_executable_load_address) [Linux]: Enable only for
	glibc and uClibc.
2023-02-14 12:54:37 +01:00
Richard Biener
994224236e tree-optimization/108782 - nested first order recurrence vectorization
First order recurrence vectorization isn't possible for nested
loops.

	PR tree-optimization/108782
	* tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
	Make sure we're not vectorizing an inner loop.

	* gcc.dg/torture/pr108782.c: New testcase.
2023-02-14 12:49:42 +01:00