Commit graph

203231 commits

Author SHA1 Message Date
Jonathan Wakely
84cff28fd2 libstdc++: Make __cmp_cat::__unseq constructor consteval
This constructor should only ever be used with a literal 0 as the
argument, so we can make it consteval. This has the nice advantage that
it is expanded immediately in the front end, and so GDB will never step
into the __cmp_cat::__unseq::__unseq(__unseq*) constructor that is
uninteresting and probably confusing to users.

libstdc++-v3/ChangeLog:

	* libsupc++/compare (__cmp_cat::__unseq): Make ctor consteval.
	* testsuite/18_support/comparisons/categories/zero_neg.cc: Prune
	excess errors caused by invalid consteval calls.
2023-08-17 20:24:17 +01:00
Jonathan Wakely
c992acdc67 libstdc++: Simplify chrono::__units_suffix using std::format
For std::chrono formatting we can simplify __units_suffix by using
std::format_to to generate the "[n/m]s" suffix with the correct
character type and write directly to the output iterator, so it doesn't
need to be widened using ctype. We can't remove the use of ctype::widen
for formatting a time zone abbreviation as a wide string, because that
can contain arbitrary characters that can't be widened by
__to_wstring_numeric.

This also fixes a bug in the chrono formatter for %Z which created a
dangling wstring_view.

libstdc++-v3/ChangeLog:

	* include/bits/chrono_io.h (__units_suffix_misc): Remove.
	(__units_suffix): Return a known suffix as string view, do not
	write unknown suffixes to a buffer.
	(__fmt_units_suffix): New function that formats the suffix using
	std::format_to.
	(operator<<, __chrono_formatter::_M_q): Use __fmt_units_suffix.
	(__chrono_formatter::_M_Z): Correct lifetime of wstring.
2023-08-17 20:24:17 +01:00
Jonathan Wakely
023a62b77f libstdc++: Rework std::format support for wchar_t
This changes how std::format creates wide strings, by replacing uses of
std::ctype<wchar_t>::widen with the recently-added __to_wstring_numeric
helper function. This removes the dependency on the locale, which should
only be used for locale-specific formats such as {:Ld}.

Also disable all the wide string formatting support if the
_GLIBCXX_USE_WCHAR_T macro is not defined. This is consistent with other
wchar_t support being disabled if the library is built without that
macro defined.

libstdc++-v3/ChangeLog:

	* include/std/format [_GLIBCXX_USE_WCHAR_T]: Guard all wide
	string formatters with this macro.
	(__formatter_int::_M_format_int, __formatter_fp::format)
	(formatter<const void*, C>::format): Use __to_wstring_numeric
	instead of std::ctype::widen.
	(__formatter_fp::_M_localize): Use hardcoded wchar_t values
	instead of std::ctype::widen.
	* testsuite/std/format/functions/format.cc: Add more checks for
	wstring formatting of arithmetic types.
2023-08-17 20:24:17 +01:00
Jonathan Wakely
aeed687f4e libstdc++: Implement std::to_string in terms of std::format (P2587R3)
This change for C++26 affects std::to_string for floating-point
arguments, so that they should be formatted using std::format("{}", v)
instead of using sprintf. The modified specification in the standard
also affects integral arguments, but there's no observable difference
for them, and we already use std::to_chars for them anyway.

To avoid <string> depending on all of <format>, this change actually
just uses std::to_chars directly instead of using std::format. This is
equivalent, because the format spec "{}" doesn't use any of the other
features of std::format.

libstdc++-v3/ChangeLog:

	* include/bits/basic_string.h (to_string(floating-point-type)):
	Implement using std::to_chars for C++26.
	* include/bits/version.def (__cpp_lib_to_string): Define.
	* include/bits/version.h: Regenerate.
	* testsuite/21_strings/basic_string/numeric_conversions/char/dr1261.cc:
	Adjust expected result in C++26 mode.
	* testsuite/21_strings/basic_string/numeric_conversions/char/to_string.cc:
	Likewise.
	* testsuite/21_strings/basic_string/numeric_conversions/wchar_t/dr1261.cc:
	Likewise.
	* testsuite/21_strings/basic_string/numeric_conversions/wchar_t/to_wstring.cc:
	Likewise.
	* testsuite/21_strings/basic_string/numeric_conversions/char/to_string_float.cc:
	New test.
	* testsuite/21_strings/basic_string/numeric_conversions/wchar_t/to_wstring_float.cc:
	New test.
	* testsuite/21_strings/basic_string/numeric_conversions/version.cc:
	New test.
2023-08-17 20:24:17 +01:00
Jonathan Wakely
51ec07b116 libstdc++: Optimize std::to_string using std::string::resize_and_overwrite
This uses std::string::__resize_and_overwrite to avoid initializing the
string buffer with characters that are immediately overwritten. This
results in about 6% better performance for the std_to_string case in
int-benchmark.cc from https://github.com/fmtlib/format-benchmark

This requires a change to a testcase. The previous implementation
guaranteed that the string returned from std::to_string(integral-type)
would have no excess capacity, because it was constructed with the
correct length. The new implementation constructs an empty string and
then resizes it with resize_and_overwrite, which over-allocates. This
means that the "no-excess capacity" guarantee no longer holds.

We can also greatly improve the performance of std::to_wstring by using
std::to_string and then widening it with a new helper function, instead
of using std::swprintf to do the formatting.

libstdc++-v3/ChangeLog:

	* include/bits/basic_string.h (to_string(integral-type)): Use
	resize_and_overwrite when available.
	(__to_wstring_numeric): New helper functions.
	(to_wstring): Use std::to_string then __to_wstring_numeric.
	* testsuite/21_strings/basic_string/numeric_conversions/char/to_string_int.cc:
	Remove check for no excess capacity.
2023-08-17 20:24:17 +01:00
Jonathan Wakely
95c2b0cc9e libstdc++: Define std::string::resize_and_overwrite for C++11 and COW string
There are several places in the library where we can improve performance
using resize_and_overwrite so it's inconvenient only being able to use
it in C++23 mode, and only for cxx11 strings. This adds it for COW
strings, and also adds __resize_and_overwrite as an extension for C++11
mode.

The new __resize_and_overwrite is available for C++11 and later, so
within the library we can use that consistently even in C++23.  In order
to avoid making a copy (which might not be possible for non-copyable,
non-movable types) the callable is passed to resize_and_overwrite as an
lvalue reference.  Unlike wrapping it in std::ref(op) this ensures that
invoking it as std::move(op)(n, p) will use the correct value category.
It also avoids any overhead that would be added by wrapping it in a
lambda like [&op](auto p, auto n) { return std::move(op)(p, n); }.

Adjust std::format to use the new __resize_and_overwrite, which we can
assume exists because we only use std::basic_string<char> and
std::basic_string<wchar_t>, so no program-defined specializations.

The uses in <experimental/internet> cannot be replaced, because those
are type-dependent on an Allocator template parameter, which could mean
they use program-defined specializations of std::basic_string that don't
have the __resize_and_overwrite extension.

libstdc++-v3/ChangeLog:

	* include/bits/basic_string.h (__resize_and_overwrite): New
	function.
	* include/bits/basic_string.tcc (__resize_and_overwrite): New
	function.
	(resize_and_overwrite): Simplify by using reserve instead of
	growing the string manually. Adjust for C++11 compatibility.
	* include/bits/cow_string.h (resize_and_overwrite): New
	function.
	(__resize_and_overwrite): New function.
	* include/bits/version.def (__cpp_lib_string_resize_and_overwrite):
	Do not depend on cxx11abi.
	* include/bits/version.h: Regenerate.
	* include/std/format (__formatter_fp::_S_resize_and_overwrite):
	Remove.
	(__formatter_fp::format, __formatter_fp::_M_localize): Use
	__resize_and_overwrite instead of _S_resize_and_overwrite.
	* testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc:
	Adjust for C++11 compatibility when included by ...
	* testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite_ext.cc:
	New test.
2023-08-17 20:24:17 +01:00
Andrew MacLeod
dc48d1d1d4 Fix range-ops operator_addr.
Lack of symbolic information prevents op1_range from beig able to draw
the same conclusions as fold_range can.

	PR tree-optimization/111009
	gcc/
	* range-op.cc (operator_addr_expr::op1_range): Be more restrictive.

	gcc/testsuite/
	* gcc.dg/pr111009.c: New.
2023-08-17 13:38:50 -04:00
Patrick O'Neill
d7b6cad9d6 RISCV: Add rotate immediate regression test
This adds new regression tests to ensure half-register rotations are
correctly optimized into rori instructions.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/zbb-rol-ror-08.c: New test.
	* gcc.target/riscv/zbb-rol-ror-09.c: New test.

Co-authored-by: Charlie Jenkins <charlie@rivosinc.com>
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
2023-08-17 10:08:58 -07:00
Patrick Palka
bad357dd1b libstdc++: Implement P2770R0 changes to join_view / join_with_view
This C++23 paper fixes an issue in these views when adapting a certain
kind of non-forward range, and we treat it as a DR against C++20.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>

libstdc++-v3/ChangeLog:

	* include/bits/regex.h (regex_iterator::iterator_concept):
	Define for C++20 as per P2770R0.
	(regex_token_iterator::iterator_concept): Likewise.
	* include/std/ranges (__detail::__as_lvalue): Define.
	(join_view::_Iterator): Befriend join_view.
	(join_view::_Iterator::_M_satisfy): Use _M_get_outer
	instead of _M_outer.
	(join_view::_Iterator::_M_get_outer): Define.
	(join_view::_Iterator::_Iterator): Split constructor taking
	_Parent argument into two as per P2770R0.  Remove constraint on
	default constructor.
	(join_view::_Iterator::_M_outer): Make this data member present
	only when the underlying range is forward.
	(join_view::_Iterator::operator++): Use _M_get_outer instead of
	_M_outer.
	(join_view::_Iterator::operator--): Use __as_lvalue helper.
	(join_view::_Iterator::operator==): Adjust constraints as per
	P2770R0.
	(join_view::_Sentinel::__equal): Use _M_get_outer instead of
	_M_outer.
	(join_view::_M_outer): New data member when the underlying range
	is non-forward.
	(join_view::begin): Adjust definition as per P2770R0.
	(join_view::end): Likewise.
	(join_with_view::_M_outer_it): New data member when the
	underlying range is non-forward.
	(join_with_view::begin): Adjust definition as per P2770R0.
	(join_with_view::end): Likewise.
	(join_with_view::_Iterator::_M_outer_it): Make this data member
	present only when the underlying range is forward.
	(join_with_view::_Iterator::_M_get_outer): Define.
	(join_with_view::_Iterator::_Iterator): Split constructor
	taking _Parent argument into two as per P2770R0.  Remove
	constraint on default constructor.
	(join_with_view::_Iterator::_M_update_inner): Adjust definition
	as per P2770R0.
	(join_with_view::_Iterator::_M_get_inner): Likewise.
	(join_with_view::_Iterator::_M_satisfy): Adjust calls to
	_M_get_inner.  Use _M_get_outer instead of _M_outer_it.
	(join_with_view::_Iterator::operator==): Adjust constraints
	as per P2770R0.
	(join_with_view::_Sentinel::operator==): Use _M_get_outer
	instead of _M_outer_it.
	* testsuite/std/ranges/adaptors/p2770r0.cc: New test.
2023-08-17 12:56:32 -04:00
Patrick Palka
4a6f3676e7 libstdc++: Convert _RangeAdaptorClosure into a CRTP base [PR108827]
Using the CRTP idiom for this base class avoids bloating the size of a
pipeline when adding distinct empty range adaptor closure objects to it,
as detailed in section 4.1 of P2387R3.

But it means we can no longer define its operator| overloads as hidden
friends, since it'd mean each instantiation of _RangeAdaptorClosure
introduces its own distinct set of hidden friends.  So e.g. for the
outer | in

  x | (views::reverse | views::join)

ADL would find 6 distinct hidden operator| friends:

  two from _RangeAdaptorClosure<_Reverse>
  two from _RangeAdaptorClosure<_Join>
  two from _RangeAdaptorClosure<_Pipe<_Reverse, _Join>>

but we really only want to consider the last two.

We avoid this issue by instead defining the operator| overloads at
namespace scope alongside _RangeAdaptorClosure.  This should be fine
because the only types defined in this namespace are _RangeAdaptorClosure,
_RangeAdaptor, _Pipe and _Partial, so we don't have to worry about
unintentional ADL.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>

	PR libstdc++/108827

libstdc++-v3/ChangeLog:

	* include/std/ranges (__adaptor::_RangeAdaptorClosure):
	Convert into a CRTP class template.  Move hidden operator|
	friends into namespace scope and adjust their constraints.
	(__closure::__is_range_adaptor_closure_fn): Define.
	(__closure::__is_range_adaptor_closure): Define.
	(__adaptor::_Partial): Adjust use of _RangeAdaptorClosure.
	(__adaptor::_Pipe): Likewise.
	(views::_All): Likewise.
	(views::_Join): Likewise.
	(views::_Common): Likewise.
	(views::_Reverse): Likewise.
	(views::_Elements): Likewise.
	(views::_Adjacent): Likewise.
	(views::_AsRvalue): Likewise.
	(views::_Enumerate): Likewise.
	(views::_AsConst): Likewise.
	* testsuite/std/ranges/adaptors/all.cc: Reinstate assertion
	expecting that adding empty range adaptor closure objects to a
	pipeline doesn't increase the size of a pipeline.
2023-08-17 12:40:04 -04:00
Vladimir N. Makarov
bd7257f08c [LRA]: When assigning stack slots to pseudos previously assigned to fp consider other spilled pseudos
The previous LRA patch can assign slot of conflicting pseudos to
pseudos spilled after prohibiting fp->sp elimination.  This patch
fixes this problem.

gcc/ChangeLog:

	* lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
	slots_num initialization from here ...
	(lra_spill): ... to here before the 1st call of
	assign_stack_slot_num_and_sort_pseudos.  Add the 2nd call after
	fp->sp elimination.
2023-08-17 12:01:49 -04:00
Jose E. Marchesi
e1f45bea27 Add warning options -W[no-]compare-distinct-pointer-types
GCC emits pedwarns unconditionally when comparing pointers of
different types, for example:

  int xdp_context (struct xdp_md *xdp)
    {
        void *data = (void *)(long)xdp->data;
        __u32 *metadata = (void *)(long)xdp->data_meta;
        __u32 ret;

        if (metadata + 1 > data)
          return 0;
        return 1;
   }

  /home/jemarch/foo.c: In function ‘xdp_context’:
  /home/jemarch/foo.c:15:20: warning: comparison of distinct pointer types lacks a cast
         15 |   if (metadata + 1 > data)
                 |                    ^

LLVM supports an option -W[no-]compare-distinct-pointer-types that can
be used in order to enable or disable the emission of such warnings.
It is enabled by default.

This patch adds the same options to GCC.

Documentation and testsuite updated included.
Regtested in x86_64-linu-gnu.
No regressions observed.

gcc/ChangeLog:

	PR c/106537
	* doc/invoke.texi (Option Summary): Mention
	-Wcompare-distinct-pointer-types under `Warning Options'.
	(Warning Options): Document -Wcompare-distinct-pointer-types.

gcc/c-family/ChangeLog:

	PR c/106537
	* c.opt (Wcompare-distinct-pointer-types): New option.

gcc/c/ChangeLog:

	PR c/106537
	* c-typeck.cc (build_binary_op): Warning on comparing distinct
	pointer types only when -Wcompare-distinct-pointer-types.

gcc/testsuite/ChangeLog:

	PR c/106537
	* gcc.c-torture/compile/pr106537-1.c: New test.
	* gcc.c-torture/compile/pr106537-2.c: Likewise.
	* gcc.c-torture/compile/pr106537-3.c: Likewise.
2023-08-17 17:35:57 +02:00
Jan-Benedict Glaw
ee40bdbfb0 Fix code_helper unused argument warning for fr30
fr30 is the only target defining GO_IF_LEGITIMATE_ADDRESS right now, in
which case the `code_helper ch` argument to memory_address_addr_space_p()
is unused and emits a new warning.

gcc/ChangeLog:
	* recog.cc (memory_address_addr_space_p): Mark possibly unused
	argument as unused.
2023-08-17 15:55:27 +02:00
Tsukasa OI
1aaf3a64e9 [PATCH] RISC-V: Deduplicate #error messages in testsuite
"#error Feature macro not defined" is required to test the existence of an
extension through the preprocessor.  However, multiple occurrence of the
exact same error message will confuse the developer once an error is
encountered.

This commit replaces such error messages to
"#error Feature macro for `EXT' not defined" to make which
macro is missing.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/zvkn.c: Deduplicate #error messages.
	* gcc.target/riscv/zvkn-1.c: Ditto.
	* gcc.target/riscv/zvknc.c: Ditto.
	* gcc.target/riscv/zvknc-1.c: Ditto.
	* gcc.target/riscv/zvknc-2.c: Ditto.
	* gcc.target/riscv/zvkng.c: Ditto.
	* gcc.target/riscv/zvkng-1.c: Ditto.
	* gcc.target/riscv/zvkng-2.c: Ditto.
	* gcc.target/riscv/zvks.c: Ditto.
	* gcc.target/riscv/zvks-1.c: Ditto.
	* gcc.target/riscv/zvksc.c: Ditto.
	* gcc.target/riscv/zvksc-1.c: Ditto.
	* gcc.target/riscv/zvksc-2.c: Ditto.
	* gcc.target/riscv/zvksg.c: Ditto.
	* gcc.target/riscv/zvksg-1.c: Ditto.
	* gcc.target/riscv/zvksg-2.c: Ditto.
2023-08-17 07:52:55 -06:00
Richard Biener
482551a79a tree-optimization/111039 - abnormals and bit test merging
The following guards the bit test merging code in if-combine against
the appearance of SSA names used in abnormal PHIs.

	PR tree-optimization/111039
	* tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
	SSA_NAME_OCCURS_IN_ABNORMAL_PHI.

	* gcc.dg/pr111039.c: New testcase.
2023-08-17 15:27:30 +02:00
Tobias Burnus
8f3c4517b1 libgomp: call numa_available first when using libnuma
The documentation requires that numa_available() is called and only
when successful, other libnuma function may be called. Internally,
it does a syscall to get_mempolicy with flag=0 (which would return
the default policy if mode were not NULL). If this returns -1 (and
not 0) and errno == ENOSYS, the Linux kernel does not have the
get_mempolicy syscall function; if so, numa_available() returns -1
(otherwise: 0).

libgomp/

	PR libgomp/111024
	* allocator.c (gomp_init_libnuma): Call numa_available; if
	not available or not returning 0, disable libnuma usage.
2023-08-17 15:20:55 +02:00
Alex Coplan
84a5be47f8 doc: Fixes to RTL-SSA sample code
This patch fixes up the code examples in the RTL-SSA documentation (the
sections on making insn changes) to reflect the current API.

The main issues are as follows:
 - rtl_ssa::recog takes an obstack_watermark & as the first parameter.
   Presumably this is intended to be the change attempt, so I've updated
   the examples to pass this through.
 - The variants of recog and restrict_movement that take an ignore
   predicate have been renamed with an _ignoring suffix, so I've
   updated callers to use those names.
 - A couple of minor "obvious" fixes to add a missing address-of
   operator and correct a variable name.

gcc/ChangeLog:

	* doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
2023-08-17 14:08:31 +01:00
Lehua Ding
903d937569 RISC-V: Fix XPASS slp testcases
This patch fixs XPASS slp testcases on trunk by
making the conditions for xfail stricter.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/partial/slp-1.c: Fix.
	* gcc.target/riscv/rvv/autovec/partial/slp-16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/partial/slp-17.c: Ditto.
	* gcc.target/riscv/rvv/autovec/partial/slp-18.c: Ditto.
	* gcc.target/riscv/rvv/autovec/partial/slp-19.c: Ditto.
	* gcc.target/riscv/rvv/autovec/partial/slp-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/partial/slp-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/partial/slp-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/partial/slp-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/partial/slp-6.c: Ditto.
2023-08-17 20:49:51 +08:00
Jose E. Marchesi
b7c50f68f2 bpf: support `naked' function attributes in BPF targets
The kernel selftests and other BPF programs make extensive use of the
`naked' function attribute with bodies written using basic inline
assembly.  This patch adds support for the attribute to
bpf-unkonwn-none, makes it to inhibit warnings due to lack of explicit
`return' statement, and updates documentation and testsuite
accordingly.

Tested in x86_64-linux-gnu host and bpf-unknown-none target.

gcc/ChangeLog

	PR target/111046
	* config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
	`naked' function attribute.
	(bpf_warn_func_return): New function.
	(TARGET_WARN_FUNC_RETURN): Define.
	(bpf_expand_prologue): Add preventive comment.
	(bpf_expand_epilogue): Likewise.
	* doc/extend.texi (BPF Function Attributes): Document the `naked'
	function attribute.

gcc/testsuite/ChangeLog

	* gcc.target/bpf/naked-1.c: New test.
2023-08-17 14:39:46 +02:00
Jonathan Wakely
d07bce478f libstdc++: Fix std::format("{:F}", inf) to use uppercase
std::format was treating {:f} and {:F} identically on the basis that for
the fixed 1.234567 format there are no alphabetical characters that need
to be in uppercase. But that's wrong for infinities and NaNs, which
should be formatted as "INF" and "NAN" for {:F}.

libstdc++-v3/ChangeLog:

	* include/std/format (__format::_Pres_type): Add _Pres_F.
	(__formatter_fp::parse): Use _Pres_F for 'F'.
	(__formatter_fp::format): Set __upper for _Pres_F.
	* testsuite/std/format/functions/format.cc: Check formatting of
	infinity and NaN for each presentation type.
2023-08-17 13:12:39 +01:00
Jonathan Wakely
b10dfbb54e libstdc++: Regenerate Makefile.in
libstdc++-v3/ChangeLog:

	* include/Makefile.in: Regenerate.
2023-08-17 13:12:39 +01:00
Richard Biener
99b5921bfc Handle TYPE_OVERFLOW_UNDEFINED vectorized BB reductions
The following changes the gate to perform vectorization of BB reductions
to use needs_fold_left_reduction_p which in turn requires handling
TYPE_OVERFLOW_UNDEFINED types in the epilogue code generation by
promoting any operations generated there to use unsigned arithmetic.

The following does this, there's currently only v16qi where x86
supports a .REDUC_PLUS reduction for integral modes so I had to
add a x86 specific testcase using GIMPLE IL.

	* tree-vect-slp.cc (vect_slp_check_for_roots): Use
	!needs_fold_left_reduction_p to decide whether we can
	handle the reduction with association.
	(vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
	reductions perform all arithmetic in an unsigned type.

	* gcc.target/i386/vect-reduc-2.c: New testcase.
2023-08-17 13:16:22 +02:00
benjamin priour
17d670dbca testsuite: Remove unused dg-line in ce8cdf5bcf
Test case g++.dg/analyzer/fanalyzer-show-events-in-system-headers.C
introduced by patch ce8cdf5bcf
emitted a warning for an unused dg-line variable.
This fixes up the blunder.

Signed-off-by: benjamin priour <vultkayn@gcc.gnu.org>

gcc/testsuite/ChangeLog:

	* g++.dg/analyzer/fanalyzer-show-events-in-system-headers.C:
	Remove dg-line var declare_a.
2023-08-17 11:29:05 +02:00
Rainer Orth
93f803d53b fixincludes: Update darwin_flt_eval_method for macOS 14
On macOS 14, a guard in <math.h> changed:

-- MacOSX13.3.sdk/usr/include/math.h	2023-04-19 01:54:44
+++ MacOSX14.0.sdk/usr/include/math.h	2023-08-01 08:42:43
@@ -22,0 +23 @@
+
@@ -43 +44 @@
-#if __FLT_EVAL_METHOD__ == 0
+#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1
@@ -49 +50 @@
-#elif __FLT_EVAL_METHOD__ == 2 || __FLT_EVAL_METHOD__ == -1
+#elif __FLT_EVAL_METHOD__ == 2

Therefore the darwin_flt_eval_method fixincludes fix doesn't match any
longer, leading to a large number of testsuite failures like

/private/var/gcc/regression/master/14-gcc/build/gcc/include-fixed/math.h:69:5:
error: #error "Unsupported value of __FLT_EVAL_METHOD__."

where __FLT_EVAL_METHOD__ = 16.

This patch adjusts the fix to allow for both forms.

Tested with make check in fixincludes on x86_64-apple-darwin23.0.0 and
verifying that <math.h> has indeed been fixed as expected.

2023-08-16  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	fixincludes:
	* inclhack.def (darwin_flt_eval_method): Handle macOS 14 guard
	variant.
	* fixincl.x: Regenerate.
	* tests/base/math.h [DARWIN_FLT_EVAL_METHOD_CHECK]: Update test.
2023-08-17 10:16:57 +02:00
Rainer Orth
0beac9209f build: Allow for Xcode 15 ld -v output
Since Xcode 15 beta 6, ld -v output differs from previous versions:

* macOS 13/Xcode 14:

  @(#)PROGRAM:ld  PROJECT:ld64-857.1

* macOS 14/Xcode 15:

  @(#)PROGRAM:ld  PROJECT:dyld-1015.1

configure cannot handle the new form, so LD64_VERSION isn't set.

This patch fixes this.  The autoconf manual states that sed doesn't
portably support alternation, so I'm using two separate expressions to
extract the version number.

Tested on x86_64-apple-darwin23.0.0.

2023-08-16  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	gcc:
	* configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
	output.
	* configure: Regenerate.
2023-08-17 10:14:49 +02:00
Jonathan Wakely
51d702f3ba libstdc++: Disable PCH for tests that rely on include order
These tests expect to be able to #undef a feature test macro and then
include <version> to get it redefined. But if <version> has already been
included by the <bits/stdc++.h> PCH then including it again does nothing
and the macro remains undefined.

libstdc++-v3/ChangeLog:

	* testsuite/24_iterators/move_iterator/p2520r0.cc: Add no_pch.
	* testsuite/std/format/functions/format.cc: Likewise.
	* testsuite/std/format/functions/format_c++23.cc: Likewise.
2023-08-17 08:42:45 +01:00
Jonathan Wakely
91315f23ba libstdc++: Fix testsuite no_pch directive
The { dg-add-options no_pch } directive is supposed to add a macro
definition that invalidates the PCH file, and ensures that the #include
directives in the test file are processed as written. But the proc that
adds the options actually removes all existing options, cancelling out
any previous dg-options directive.

This means that using no_pch will cause FAILs in a file that relies on
other options set by an earlier dg-options.

The no_pch directive was added for PR libstdc++/21769 where Janis
suggested adding it as return "$flags -D__GLIBCXX__=99999999" but what
was actually committed didn't include the $flags so replaced them.

Additionally, using no_pch  only prevents the precompiled version of
<bits/stdc++.h> from being included, it doesn't prevent the
non-precompiled version being included by -include bits/stdc++.h in the
test flags. Use regsub to filter that out of the options as well.

libstdc++-v3/ChangeLog:

	* testsuite/lib/dg-options.exp (add_options_for_no_pch): Remove
	any "-include bits/stdc++.h" from options and add the macro to
	the existing options instead of replacing them.
2023-08-17 08:42:45 +01:00
Pan Li
c6259c4975 RISC-V: Support RVV VFWREDOSUM.VS rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFWREDOSUM.VS as the below samples

* __riscv_vfwredosum_vs_f32m1_f64m1_rm
* __riscv_vfwredosum_vs_f32m1_f64m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc
	(widen_freducop): Add frm_opt_type template arg.
	(vfwredosum_frm_obj): New declaration.
	(BASE): Ditto.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def
	(vfwredosum_frm): New intrinsic function def.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/float-point-wredosum.c: New test.
2023-08-17 15:37:57 +08:00
Pan Li
3a68ef2ccc RISC-V: Support RVV VFREDOSUM.VS rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFREDOSUM.VS as the below samples.

* __riscv_vfredosum_vs_f32m1_f32m1_rm
* __riscv_vfredosum_vs_f32m1_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc
	(vfredosum_frm_obj): New declaration.
	(BASE): Ditto.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def
	(vfredosum_frm): New intrinsic function def.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/float-point-redosum.c: New test.
2023-08-17 15:36:48 +08:00
Pan Li
3d903a26d7 RISC-V: Support RVV VFREDUSUM.VS rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFREDUSUM.VS as the below samples.

* __riscv_vfredusum_vs_f32m1_f32m1_rm
* __riscv_vfredusum_vs_f32m1_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc
	(class freducop): Add frm_op_type template arg.
	(vfredusum_frm_obj): New declaration.
	(BASE): Ditto.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def
	(vfredusum_frm): New intrinsic function def.
	* config/riscv/riscv-vector-builtins-shapes.cc
	(struct reduc_alu_frm_def): New class for frm shape.
	(SHAPE): New declaration.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/float-point-redusum.c: New test.
2023-08-17 15:35:37 +08:00
Pan Li
20e1db413e RISC-V: Support RVV VFNCVT.F.{X|XU|F}.W rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFNCVT.F.{X|XU|F}.W as the below samples.

* __riscv_vfncvt_f_x_w_f32m1_rm
* __riscv_vfncvt_f_x_w_f32m1_rm_m
* __riscv_vfncvt_f_xu_w_f32m1_rm
* __riscv_vfncvt_f_xu_w_f32m1_rm_m
* __riscv_vfncvt_f_f_w_f32m1_rm
* __riscv_vfncvt_f_f_w_f32m1_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc
	(class vfncvt_f): Add frm_op_type template arg.
	(vfncvt_f_frm_obj): New declaration.
	(BASE): Ditto.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def
	(vfncvt_f_frm): New intrinsic function def.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/float-point-ncvt-f.c: New test.
2023-08-17 15:34:53 +08:00
Pan Li
72fc7e9d6a RISC-V: Support RVV VFNCVT.XU.F.W rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFNCVT.XU.F.W as the below samples.

* __riscv_vfncvt_xu_f_w_u16mf2_rm
* __riscv_vfncvt_xu_f_w_u16mf2_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc
	(vfncvt_xu_frm_obj): New declaration.
	(BASE): Ditto.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def
	(vfncvt_xu_frm): New intrinsic function def.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/float-point-ncvt-xu.c: New test.
2023-08-17 15:34:09 +08:00
Pan Li
3d18a528bf RISC-V: Support RVV VFNCVT.X.F.W rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFNCVT.X.F.W as the below samples.

* __riscv_vfncvt_x_f_w_i16mf2_rm
* __riscv_vfncvt_x_f_w_i16mf2_rm_m

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc
	(class vfncvt_x): Add frm_op_type template arg.
	(BASE): New declaration.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def
	(vfncvt_x_frm): New intrinsic function def.
	* config/riscv/riscv-vector-builtins-shapes.cc
	(struct narrow_alu_frm_def): New shape function for frm.
	(SHAPE): New declaration.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/float-point-ncvt-x.c: New test.
2023-08-17 15:32:32 +08:00
Haochen Jiang
5ccdfd0870 [Patch 6/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins
gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx10_1-vextractf64x2-1.c: New test.
	* gcc.target/i386/avx10_1-vextracti64x2-1.c: Ditto.
	* gcc.target/i386/avx10_1-vfpclasspd-1.c: Ditto.
	* gcc.target/i386/avx10_1-vfpclassps-1.c: Ditto.
	* gcc.target/i386/avx10_1-vinsertf64x2-1.c: Ditto.
	* gcc.target/i386/avx10_1-vinserti64x2-1.c: Ditto.
	* gcc.target/i386/avx10_1-vrangepd-1.c: Ditto.
	* gcc.target/i386/avx10_1-vrangeps-1.c: Ditto.
	* gcc.target/i386/avx10_1-vreducepd-1.c: Ditto.
	* gcc.target/i386/avx10_1-vreduceps-1.c: Ditto.
2023-08-17 14:25:53 +08:00
Haochen Jiang
0b20e0f17b [Patch 5/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins
gcc/ChangeLog:

	* config/i386/avx512vldqintrin.h: Remove target attribute.
	* config/i386/i386-builtin.def (BDESC):
	Add OPTION_MASK_ISA2_AVX10_1.
	* config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
	(VFH_AVX512VLDQ_AVX10_1): Ditto.
	(VF1_AVX512VLDQ_AVX10_1): Ditto.
	(<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
	Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
	(vec_pack<floatprefix>_float_<mode>): Change iterator to
	VI8_AVX512VLDQ_AVX10_1. Remove target check.
	(vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
	VF1_AVX512VLDQ_AVX10_1. Remove target check.
	(vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
	(VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
	(avx512vl_vextractf128<mode>): Change iterator to
	VI48F_256_DQVL_AVX10_1. Remove target check.
	(vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
	(vec_extract_hi_<mode>): Ditto.
	(avx512vl_vinsert<mode>): Ditto.
	(vec_set_lo_<mode><mask_name>): Ditto.
	(vec_set_hi_<mode><mask_name>): Ditto.
	(avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
	iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
	(avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
	iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
	* config/i386/subst.md (mask_avx512dq_condition): Add
	TARGET_AVX10_1.
	(mask_scalar_merge): Ditto.
2023-08-17 14:24:59 +08:00
Haochen Jiang
aba1089505 [Patch 4/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins
gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx10_1-abs-copysign-1.c: New test.
	* gcc.target/i386/avx10_1-vandpd-1.c: Ditto.
	* gcc.target/i386/avx10_1-vandps-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvtps2qq-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvtps2uqq-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvtqq2pd-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvtqq2ps-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvtuqq2pd-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvtuqq2ps-1.c: Ditto.
	* gcc.target/i386/avx10_1-vorpd-1.c: Ditto.
	* gcc.target/i386/avx10_1-vorps-1.c: Ditto.
	* gcc.target/i386/avx10_1-vpmovd2m-1.c: Ditto.
	* gcc.target/i386/avx10_1-vpmovm2d-1.c: Ditto.
	* gcc.target/i386/avx10_1-vpmovm2q-1.c: Ditto.
	* gcc.target/i386/avx10_1-vpmovq2m-1.c: Ditto.
	* gcc.target/i386/avx10_1-vxorpd-1.c: Ditto.
	* gcc.target/i386/avx10_1-vxorps-1.c: Ditto.
2023-08-17 14:24:16 +08:00
Haochen Jiang
d14ab07ee9 [Patch 3/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins
gcc/ChangeLog:

	* config/i386/avx512vldqintrin.h: Remove target attribute.
	* config/i386/i386-builtin.def (BDESC):
	Add OPTION_MASK_ISA2_AVX10_1.
	* config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
	* config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
	(VI48_AVX512VLDQ_AVX10_1): Ditto.
	(VF2_AVX512VL): Remove.
	(VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
	Add TARGET_AVX10_1.
	(*<code><mode>3<mask_name>): Change isa attribute to
	avx10_1_or_avx512dq. Add TARGET_AVX10_1.
	(<code><mode>3): Add TARGET_AVX10_1. Change isa attr
	to avx10_1_or_avx512vl.
	(<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
	Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
	(<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
	Add TARGET_AVX10_1.
	(<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
	Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
	(<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
	Add TARGET_AVX10_1.
	(float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
	Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
	(float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
	Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
	(float<floatunssuffix>v4div4sf2<mask_name>):
	Add TARGET_AVX10_1.
	(avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
	(*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
	(float<floatunssuffix>v2div2sf2): Ditto.
	(float<floatunssuffix>v2div2sf2_mask): Ditto.
	(*float<floatunssuffix>v2div2sf2_mask): Ditto.
	(*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
	(<avx512>_cvt<ssemodesuffix>2mask<mode>):
	Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
	(<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
	(*<avx512>_cvtmask2<ssemodesuffix><mode>):
	Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
	Change when constraint is enabled.
2023-08-17 14:23:30 +08:00
Juzhe-Zhong
29547511f7 RISC-V: Fix incorrect VTYPE fusion for floating point scalar move insn[PR111037]
void foo(_Float16 y, int64_t *i64p)
{
  vint64m1_t vx =__riscv_vle64_v_i64m1 (i64p, 1);
  vx = __riscv_vadd_vv_i64m1 (vx, vx, 1);
  vfloat16m1_t vy =__riscv_vfmv_s_f_f16m1 (y, 1);
  asm volatile ("# use %0 %1" : : "vr"(vx), "vr" (vy));
}

zve64f:
foo:
	vsetivli	zero,1,e16,mf4,ta,ma
	vle64.v	v1,0(a0)
	vfmv.s.f	v2,fa0
	vsetvli	zero,zero,e64,m1,ta,ma
	vadd.vv	v1,v1,v1

zve64d:
foo:
	vsetivli	zero,1,e64,m1,ta,ma
	vle64.v	v1,0(a0)
	vfmv.s.f	v2,fa0
	vadd.vv	v1,v1,v1

gcc/ChangeLog:

	PR target/111037
	* config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
	(second_sew_less_than_first_sew_p): Fix bug.
	(first_sew_less_than_second_sew_p): Ditto.

gcc/testsuite/ChangeLog:

	PR target/111037
	* gcc.target/riscv/rvv/base/pr111037-1.c: New test.
	* gcc.target/riscv/rvv/base/pr111037-2.c: New test.
2023-08-17 14:20:38 +08:00
Haochen Jiang
1c3c405ecf Support AVX10.1 for AVX512DQ+AVX512VL intrins
gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx10_1-vandnpd-1.c: New test.
	* gcc.target/i386/avx10_1-vandnps-1.c: Ditto.
	* gcc.target/i386/avx10_1-vbroadcastf32x2-1.c: Ditto.
	* gcc.target/i386/avx10_1-vbroadcastf64x2-1.c: Ditto.
	* gcc.target/i386/avx10_1-vbroadcasti32x2-1.c: Ditto.
	* gcc.target/i386/avx10_1-vbroadcasti64x2-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvtpd2qq-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvtpd2uqq-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvttpd2qq-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvttpd2uqq-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvttps2qq-1.c: Ditto.
	* gcc.target/i386/avx10_1-vcvttps2uqq-1.c: Ditto.
	* gcc.target/i386/avx10_1-vpmullq-1.c: Ditto.
2023-08-17 14:19:59 +08:00
Haochen Jiang
2485dd9b4e Support AVX10.1 for AVX512DQ+AVX512VL intrins
gcc/ChangeLog:

	* config/i386/avx512vldqintrin.h: Remove target attribute.
	* config/i386/i386-builtin.def (BDESC):
	Add OPTION_MASK_ISA2_AVX10_1.
	* config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
	* config/i386/i386-expand.cc
	(ix86_check_builtin_isa_match): Ditto.
	(ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
	* config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
	and avx10_1_or_avx512vl.
	* config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
	(VF1_128_256VLDQ_AVX10_1): Ditto.
	(VI8_AVX512VLDQ_AVX10_1): Ditto.
	(<sse>_andnot<mode>3<mask_name>):
	Add TARGET_AVX10_1 and change isa attr from avx512dq to
	avx10_1_or_avx512dq.
	(*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
	avx512vl to avx10_1_or_avx512vl.
	(fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
	Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
	(fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
	Ditto.
	(ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
	Ditto.
	(fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
	Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
	(avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
	Add TARGET_AVX10_1.
	(fix<fixunssuffix>_truncv2sfv2di2): Ditto.
	(cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
	Remove target check.
	(avx512dq_mul<mode>3<mask_name>): Ditto.
	(*avx512dq_mul<mode>3<mask_name>): Ditto.
	(VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
	(<mask_codefor>avx512dq_broadcast<mode><mask_name>):
	Remove target check.
	(VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
	(<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
	Remove target check.
	* config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
	(mask_avx512vl_condition): Ditto.
	(mask): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx-1.c: Add -mavx10.1.
	* gcc.target/i386/avx-2.c: Ditto.
	* gcc.target/i386/sse-26.c: Skip AVX512VLDQ intrin file.
2023-08-17 14:19:05 +08:00
Haochen Jiang
26a820dc13 Emit a warning when AVX10 options conflict in vector width
gcc/ChangeLog:

	* common/config/i386/i386-common.cc
	(ix86_check_avx10_vector_width): New function to check isa_flags
	to emit a warning when there is a conflict in AVX10 options for
	vector width.
	(ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
	* config/i386/driver-i386.cc (host_detect_local_cpu):
	Do not append -mno-avx10-max-512bit for -march=native.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx10_1-15.c: New test.
	* gcc.target/i386/avx10_1-16.c: Ditto.
	* gcc.target/i386/avx10_1-17.c: Ditto.
	* gcc.target/i386/avx10_1-18.c: Ditto.
2023-08-17 14:16:57 +08:00
Haochen Jiang
0288ab1473 Emit a warning when disabling AVX512 with AVX10 enabled or disabling AVX10 with AVX512 enabled
gcc/ChangeLog:

	* common/config/i386/i386-common.cc
	(ix86_check_avx10): New function to check isa_flags and
	isa_flags_explicit to emit warning when AVX10 is enabled
	by "-m" option.
	(ix86_check_avx512):  New function to check isa_flags and
	isa_flags_explicit to emit warning when AVX512 is enabled
	by "-m" option.
	(ix86_handle_option): Do not change the flags when warning
	is emitted.
	* config/i386/driver-i386.cc (host_detect_local_cpu):
	Do not append -mno-avx10.1 for -march=native.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx10_1-11.c: New test.
	* gcc.target/i386/avx10_1-12.c: Ditto.
	* gcc.target/i386/avx10_1-13.c: Ditto.
	* gcc.target/i386/avx10_1-14.c: Ditto.
2023-08-17 14:14:35 +08:00
Haochen Jiang
11ad44da01 Initial support for AVX10.1
gcc/ChangeLog:

	* common/config/i386/cpuinfo.h (get_available_features):
	Add avx10_set and version and detect avx10.1.
	(cpu_indicator_init): Handle avx10.1-512.
	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
	(OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
	(OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
	(OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
	(OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
	(ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
	-mavx10.1-512.
	* common/config/i386/i386-cpuinfo.h (enum processor_features):
	Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
	FEATURE_AVX10_512BIT.
	* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
	AVX10_512BIT, AVX10_1 and AVX10_1_512.
	* config/i386/constraints.md (Yk): Add AVX10_1.
	(Yv): Ditto.
	(k): Ditto.
	* config/i386/cpuid.h (bit_AVX10): New.
	(bit_AVX10_256): Ditto.
	(bit_AVX10_512): Ditto.
	* config/i386/i386-c.cc (ix86_target_macros_internal):
	Define AVX10_512BIT and AVX10_1.
	* config/i386/i386-isa.def
	(AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
	(AVX10_1): Add DEF_PTA(AVX10_1).
	* config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
	(ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
	and avx10.1-512.
	(ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
	FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
	(ix86_valid_target_attribute_inner_p): Handle AVX10_1.
	* config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
	(ix86_conditional_register_usage): Ditto.
	(ix86_hard_regno_mode_ok): Ditto.
	(ix86_rtx_costs): Ditto.
	* config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
	* config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
	-mavx10.1-512.
	* doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
	* doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
	* doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
	and avx10.1-512.

gcc/testsuite/ChangeLog:

	* g++.target/i386/mv33.C: New test.
	* gcc.target/i386/avx10_1-1.c: Ditto.
	* gcc.target/i386/avx10_1-2.c: Ditto.
	* gcc.target/i386/avx10_1-3.c: Ditto.
	* gcc.target/i386/avx10_1-4.c: Ditto.
	* gcc.target/i386/avx10_1-5.c: Ditto.
	* gcc.target/i386/avx10_1-6.c: Ditto.
	* gcc.target/i386/avx10_1-7.c: Ditto.
	* gcc.target/i386/avx10_1-8.c: Ditto.
	* gcc.target/i386/avx10_1-9.c: Ditto.
	* gcc.target/i386/avx10_1-10.c: Ditto.
2023-08-17 14:11:33 +08:00
Sergei Trofimovich
24f7b20bbd Drop unused enum vrp_mode.
Follow removal of EVRP and clean up unused defines.

gcc/
	* flag-types.h (vrp_mode): Remove unused.
2023-08-17 06:31:44 +01:00
Yanzhang Wang
e7a36e4715 [PATCH] RISC-V: Support simplify (-1-x) for vector.
From: Yanzhang Wang <yanzhang.wang@intel.com>

The pattern is enabled for scalar but not for vector. The patch try to
make it consistent and will convert below code,

shortcut_for_riscv_vrsub_case_1_32:
        vl1re32.v       v1,0(a1)
        vsetvli zero,a2,e32,m1,ta,ma
        vrsub.vi        v1,v1,-1
        vs1r.v  v1,0(a0)
        ret

to,

shortcut_for_riscv_vrsub_case_1_32:
        vl1re32.v       v1,0(a1)
        vsetvli zero,a2,e32,m1,ta,ma
        vnot.v  v1,v1
        vs1r.v  v1,0(a0)
        ret

gcc/ChangeLog:

	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
	CONSTM1_RTX.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/simplify-vrsub.c: New test.
2023-08-16 22:30:00 -06:00
Andrew Pinski
a32de58c9e Add support for vector conitional not
Like the support conditional neg (r12-4470-g20dcda98ed376cb61c74b2c71),
this just adds conditional not too.
Also we should be able to turn `(a ? -1 : 0) ^ b` into a conditional
not.

OK? Bootstrapped and tested on x86_64-linux-gnu and aarch64-linux-gnu.

gcc/ChangeLog:

	* internal-fn.def (COND_NOT): New internal function.
	* match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
	to the lists.
	(`vec (a ? -1 : 0) ^ b`): New pattern to convert
	into conditional not.
	* optabs.def (cond_one_cmpl): New optab.
	(cond_len_one_cmpl): Likewise.

gcc/testsuite/ChangeLog:

	PR target/110986
	* gcc.target/aarch64/sve/cond_unary_9.c: New test.
2023-08-16 18:35:58 -07:00
GCC Administrator
8e71ad9e78 Daily bump. 2023-08-17 00:17:21 +00:00
Andrew Pinski
034dd4252c Add libstdc++-v3/include/bits/version.h to gcc_update touch part
This adds libstdc++-v3/include/bits/version.h so it has the correct timestamp.

Committed as obvious after running contrib/gcc_update --touch

contrib/ChangeLog:

	* gcc_update: Add libstdc++-v3/include/bits/version.h.
2023-08-16 15:36:43 -07:00
Harald Anlauf
9ade70bb86 Fortran: fix memleak for character,value dummy of bind(c) procedure [PR110360]
Testcase gfortran.dg/bind_c_usage_13.f03 exhibited a memleak in the frontend
occuring when passing a character literal to a character,value dummy of a
bind(c) procedure, due to a missing cleanup in the conversion of the actual
argument expression.  Reduced testcase:

  program p
    interface
       subroutine val_c (c) bind(c)
         use iso_c_binding, only: c_char
         character(len=1,kind=c_char), value :: c
       end subroutine val_c
    end interface
    call val_c ("A")
  end

gcc/fortran/ChangeLog:

	PR fortran/110360
	* trans-expr.cc (conv_scalar_char_value): Use gfc_replace_expr to
	avoid leaking replaced gfc_expr.
2023-08-16 22:00:49 +02:00
Jonathan Wakely
4a2b262597 libstdc++: Fix std::basic_string::resize_and_overwrite
The callable used for resize_and_overwrite was being passed the string's
expanded capacity, which might be greater than the new size being
requested. This is not conforming, as the standard requires the same n
to be passed to the callable that the user passed to
resize_and_overwrite.

The existing tests didn't catch this because they all used a value which
was more than twice the existing capacity, so the _M_create call
allocated exactly what was requested, and the value passed to the
callable was correct. But when the requested size is greater than the
current capacity but smaller than twice the current capacity, _M_create
will allocate twice the current capacity and then that value was being
passed to the callable.

I noticed this because std::format(L"{}", 0.25) was producing L"0.25XX"
where the XX characters were whatever happened to be on the stack before
the call. When std::format used resize_and_overwrite to widen a string
it was copying too many characters into the destination and setting the
result's length too long. I've added a test for this case, and a new
test that doesn't hardcode -std=gnu++20 so can be used to test
std::format in C++23 and C++26 modes.

libstdc++-v3/ChangeLog:

	* include/bits/basic_string.tcc (resize_and_overwrite): Invoke
	the callable with the same size as resize_and_overwrite was
	called with.
	* testsuite/21_strings/basic_string/capacity/char/resize_and_overwrite.cc:
	Check with small values for the new size.
	* testsuite/std/format/functions/format.cc: Check wide
	formatting of double values that produce small strings.
	* testsuite/std/format/functions/format_c++23.cc: New test.
2023-08-16 18:36:37 +01:00