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210451 commits

Author SHA1 Message Date
Jakub Jelinek
922648759b c-family: Fix -Warray-compare warning ICE [PR115290]
The warning code uses %D to print the ARRAY_REF first operands.
That works in the most common case where those operands are decls, but
as can be seen on the following testcase, they can be other expressions
with array type.
Just changing %D to %E isn't enough, because then the diagnostics can
suggest something like
note: use '&(x) != 0 ? (int (*)[32])&a : (int (*)[32])&b[0] == &(y) != 0 ? (int (*)[32])&a : (int (*)[32])&b[0]' to compare the addresses
which is a bad suggestion, the %E printing doesn't know that the
warning code will want to add & before it and [0] after it.
So, the following patch adds ()s around the operand as well, but does
that only for non-decls, for decls keeps it as &arr[0] like before.

2024-06-17  Jakub Jelinek  <jakub@redhat.com>

	PR c/115290
	* c-warn.cc (do_warn_array_compare): Use %E rather than %D for
	printing op0 and op1; if those operands aren't decls, also print
	parens around them.

	* c-c++-common/Warray-compare-3.c: New test.

(cherry picked from commit b63c7d92012f92e0517190cf263d29bbef8a06bf)
2024-06-17 19:25:43 +02:00
Jakub Jelinek
5be6d9d2a9 c++: Fix up floating point conversion rank comparison for _Float32 and float if float/double are same size [PR115511]
On AVR and SH with some options sizeof (float) == sizeof (double) and
the 2 types have the same set of values.
http://eel.is/c++draft/conv.rank#2.2 for this says that double still
has bigger rank than float and http://eel.is/c++draft/conv.rank#2.2
says that extended type with the same set of values as more than one
standard floating point type shall have the same rank as double.
I've implemented the latter rule as
   if (cnt > 1 && mv2 == long_double_type_node)
     return -2;
with the _Float64/double/long double case having same mode case (various
targets with -mlong-double-64) in mind.
But never thought there are actually targets where float and double
are the same, that needs handling too, if cnt > 1 (that is the extended
type mv1 has same set of values as 2 or 3 of float/double/long double)
and mv2 is float, we need to return 2, because mv1 in that case should
have same rank as double and double has bigger rank than float.

2024-06-17  Jakub Jelinek  <jakub@redhat.com>

	PR target/111343
	PR c++/115511
	* typeck.cc (cp_compare_floating_point_conversion_ranks): If an
	extended floating point type mv1 has same set of values as more
	than one standard floating point type and mv2 is float, return 2.

	* g++.dg/cpp23/ext-floating18.C: New test.

(cherry picked from commit 8584c98f370cd91647c184ce58141508ca478a12)
2024-06-17 19:17:06 +02:00
Patrick Palka
20cda2e85c c++: undeclared identifier in requires-clause [PR99678]
Since the terms of a requires-clause are grammatically primary-expressions
and not e.g. postfix-expressions, it seems we need to explicitly handle
and diagnose the case where a term parses to a bare unresolved identifier,
like cp_parser_postfix_expression does, since cp_parser_primary_expression
leaves that up to its callers.  Otherwise we incorrectly accept the first
three requires-clauses below.

Note that the only occurrences of primary-expression in the grammar are
postfix-expression and constraint-logical-and-expression, so it's not too
surprising that we need this special handling here.

	PR c++/99678

gcc/cp/ChangeLog:

	* parser.cc (cp_parser_constraint_primary_expression): Diagnose
	a bare unresolved unqualified-id.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp2a/concepts-requires38.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit d387ecb2b2f44f33fd6a7c5ec7eadaf6dd70efc9)
2024-06-17 10:14:44 -04:00
Patrick Palka
4df8640299 c++: ICE w/ ambig and non-strictly-viable cands [PR115239]
Here during overload resolution we have two strictly viable ambiguous
candidates #1 and #2, and two non-strictly viable candidates #3 and #4
which we hold on to ever since r14-6522.  These latter candidates have
an empty second arg conversion since the first arg conversion was deemed
bad, and this trips up joust when called on #3 and #4 which assumes all
arg conversions are there.

We can fix this by making joust robust to empty arg conversions, but in
this situation we shouldn't need to compare #3 and #4 at all given that
we have a strictly viable candidate.  To that end, this patch makes
tourney shortcut considering non-strictly viable candidates upon
encountering ambiguity between two strictly viable candidates (taking
advantage of the fact that the candidates list is sorted according to
viability via splice_viable).

	PR c++/115239

gcc/cp/ChangeLog:

	* call.cc (tourney): Don't consider a non-strictly viable
	candidate as the champ if there was ambiguity between two
	strictly viable candidates.

gcc/testsuite/ChangeLog:

	* g++.dg/overload/error7.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit 7fed7e9bbc57d502e141e079a6be2706bdbd4560)
2024-06-17 10:14:43 -04:00
Patrick Palka
9583f781e1 c++: visibility wrt concept-id as targ [PR115283]
Like with alias templates, it seems we don't maintain visibility flags
for concepts either, so min_vis_expr_r should ignore them for now.
Otherwise after r14-6789 we may incorrectly give a function template that
uses a concept-id in its signature internal linkage.

	PR c++/115283

gcc/cp/ChangeLog:

	* decl2.cc (min_vis_expr_r) <case TEMPLATE_DECL>: Ignore
	concepts.

gcc/testsuite/ChangeLog:

	* g++.dg/template/linkage5.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit b1fe718cbe0c8883af89f52e0aad3ebf913683de)
2024-06-17 10:14:43 -04:00
Stefan Schulze Frielinghaus
0ed63e3791 s390: testsuite: Fix ifcvt-one-insn-bool.c
With the change of r15-787-g57e04879389f9c I forgot to also update this
test.

gcc/testsuite/ChangeLog:

	* gcc.target/s390/ifcvt-one-insn-bool.c: Fix loc.

(cherry picked from commit ac66736bf2f8a10d2f43e83ed6377e4179027a39)
2024-06-17 08:52:28 +02:00
Stefan Schulze Frielinghaus
8f124e6b79 s390: Implement TARGET_NOCE_CONVERSION_PROFITABLE_P [PR109549]
Consider a NOCE conversion as profitable if there is at least one
conditional move.

gcc/ChangeLog:

	PR target/109549
	* config/s390/s390.cc (TARGET_NOCE_CONVERSION_PROFITABLE_P):
	Define.
	(s390_noce_conversion_profitable_p): Implement.

gcc/testsuite/ChangeLog:

	* gcc.target/s390/ccor.c: Order of loads are reversed, now, as a
	consequence the condition has to be reversed.

(cherry picked from commit 57e04879389f9c0d5d53f316b468ce1bddbab350)
2024-06-17 08:52:20 +02:00
GCC Administrator
13a09f32df Daily bump. 2024-06-17 00:21:57 +00:00
GCC Administrator
a4f8e9ec38 Daily bump. 2024-06-16 00:21:54 +00:00
Christoph Müllner
3fe255fd3f riscv: Allocate enough space to strcpy() string
I triggered an ICE on Ubuntu 24.04 when compiling code that uses
function attributes. Looking into the sources shows that we have
a systematic issue in the attribute handling code:
* we determine the length with strlen() (excluding the terminating null)
* we allocate a buffer with this length
* we copy the original string using strcpy() (incl. the terminating null)

To quote the man page of strcpy():
"The programmer is responsible for allocating a  destination  buffer
large  enough,  that  is, strlen(src)  + 1."

The ICE looks like this:

*** buffer overflow detected ***: terminated
xtheadmempair_bench.c:14:1: internal compiler error: Aborted
   14 | {
      | ^
0xaf3b99 crash_signal
        /home/ubuntu/src/gcc/scaleff/gcc/toplev.cc:319
0xe5b957 strcpy
        /usr/include/riscv64-linux-gnu/bits/string_fortified.h:79
0xe5b957 riscv_process_target_attr
        /home/ubuntu/src/gcc/scaleff/gcc/config/riscv/riscv-target-attr.cc:339
0xe5baaf riscv_process_target_attr
        /home/ubuntu/src/gcc/scaleff/gcc/config/riscv/riscv-target-attr.cc:314
0xe5bc5f riscv_option_valid_attribute_p(tree_node*, tree_node*, tree_node*, int)
        /home/ubuntu/src/gcc/scaleff/gcc/config/riscv/riscv-target-attr.cc:389
0x6a31e5 handle_target_attribute
        /home/ubuntu/src/gcc/scaleff/gcc/c-family/c-attribs.cc:5915
0x5d3a07 decl_attributes(tree_node**, tree_node*, int, tree_node*)
        /home/ubuntu/src/gcc/scaleff/gcc/attribs.cc:900
0x5db403 c_decl_attributes
        /home/ubuntu/src/gcc/scaleff/gcc/c/c-decl.cc:5501
0x5e8965 start_function(c_declspecs*, c_declarator*, tree_node*)
        /home/ubuntu/src/gcc/scaleff/gcc/c/c-decl.cc:10562
0x6318ed c_parser_declaration_or_fndef
        /home/ubuntu/src/gcc/scaleff/gcc/c/c-parser.cc:2914
0x63a8ad c_parser_external_declaration
        /home/ubuntu/src/gcc/scaleff/gcc/c/c-parser.cc:2048
0x63b219 c_parser_translation_unit
        /home/ubuntu/src/gcc/scaleff/gcc/c/c-parser.cc:1902
0x63b219 c_parse_file()
        /home/ubuntu/src/gcc/scaleff/gcc/c/c-parser.cc:27277
0x68fec5 c_common_parse_file()
        /home/ubuntu/src/gcc/scaleff/gcc/c-family/c-opts.cc:1311
Please submit a full bug report, with preprocessed source (by using -freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

gcc/ChangeLog:

	* config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
	Fix allocation size of buffer.
	(riscv_process_one_target_attr): Likewise.
	(riscv_process_target_attr): Likewise.

(cherry picked from commit 6762d5738b02d84ad3f51e89979b48acb68db65b)
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2024-06-15 12:12:00 +02:00
GCC Administrator
6b2fc15d22 Daily bump. 2024-06-15 00:22:06 +00:00
Jonathan Wakely
75251f5091
libstdc++: Fix declaration of posix_memalign for freestanding
Thanks to Jérôme Duval for noticing this.

libstdc++-v3/ChangeLog:

	* libsupc++/new_opa.cc [!_GLIBCXX_HOSTED]: Fix declaration of
	posix_memalign.

(cherry picked from commit 161efd677458f20d13ee1018a4d5e3964febd508)
2024-06-14 15:39:27 +01:00
GCC Administrator
b740c091a3 Daily bump. 2024-06-14 00:22:20 +00:00
GCC Administrator
8bd6e4038a Daily bump. 2024-06-13 00:21:50 +00:00
Andre Vieira
7593dae69b arm: Add .type and .size to __gnu_cmse_nonsecure_call [PR115360]
This patch adds missing assembly directives to the CMSE library wrapper to call
functions with attribute cmse_nonsecure_call.  Without the .type directive the
linker will fail to produce the correct veneer if a call to this wrapper
function is to far from the wrapper itself.  The .size was added for
completeness, though we don't necessarily have a usecase for it.

libgcc/ChangeLog:

	PR target/115360
	* config/arm/cmse_nonsecure_call.S: Add .type and .size directives.

(cherry picked from commit c559353af49fe5743d226ac3112a285b27a50f6a)
2024-06-12 15:08:55 +01:00
Torbjörn SVENSSON
9100e78ba2 testsuite: Fix expand-return CMSE test for Armv8.1-M [PR115253]
For Armv8.1-M, the clearing of the registers is handled differently than
for Armv8-M, so update the test case accordingly.

gcc/testsuite/ChangeLog:

	PR target/115253
	* gcc.target/arm/cmse/extend-return.c: Update test case
	condition for Armv8.1-M.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Co-authored-by: Yvan ROUX <yvan.roux@foss.st.com>
(cherry picked from commit cf5f9171bae1f5f3034dc9a055b77446962f1a8c)
2024-06-12 10:12:07 +02:00
Torbjörn SVENSSON
a657148995 arm: Zero/Sign extends for CMSE security on Armv8-M.baseline [PR115253]
Properly handle zero and sign extension for Armv8-M.baseline as
Cortex-M23 can have the security extension active.
Currently, there is an internal compiler error on Cortex-M23 for the
epilog processing of sign extension.

This patch addresses the following CVE-2024-0151 for Armv8-M.baseline.

gcc/ChangeLog:

	PR target/115253
	* config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
	Sign extend for Thumb1.
	(thumb1_expand_prologue): Add zero/sign extend.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Co-authored-by: Yvan ROUX <yvan.roux@foss.st.com>
(cherry picked from commit 65bd0655ece268895e5018e393bafb769e201c78)
2024-06-12 10:12:06 +02:00
GCC Administrator
dfc5c98cbc Daily bump. 2024-06-12 00:24:10 +00:00
Andrew Pinski
e6b1c08205 Fix building JIT with musl libc [PR115442]
Just like r13-6662-g0e6f87835ccabf but this time for jit/jit-recording.cc.

Pushed as obvious after a quick build to make sure jit still builds.

gcc/jit/ChangeLog:

	PR jit/115442
	* jit-recording.cc: Define INCLUDE_SSTREAM before including
	system.h and don't directly incldue sstream.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
(cherry picked from commit e4244b88d75124f6957bfa080c8ad34017364e53)
2024-06-11 12:45:59 -07:00
Richard Sandiford
7d64bc0990 ira: Fix go_through_subreg offset calculation [PR115281]
go_through_subreg used:

  else if (!can_div_trunc_p (SUBREG_BYTE (x),
			     REGMODE_NATURAL_SIZE (GET_MODE (x)), offset))

to calculate the register offset for a pseudo subreg x.  In the blessed
days before poly-int, this was:

    *offset = (SUBREG_BYTE (x) / REGMODE_NATURAL_SIZE (GET_MODE (x)));

But I think this is testing the wrong natural size.  If we exclude
paradoxical subregs (which will get an offset of zero regardless),
it's the inner register that is being split, so it should be the
inner register's natural size that we use.

This matters in the testcase because we have an SFmode lowpart
subreg into the last of three variable-sized vectors.  The
SUBREG_BYTE is therefore equal to the size of two variable-sized
vectors.  Dividing by the vector size gives a register offset of 2,
as expected, but dividing by the size of a scalar FPR would give
a variable offset.

I think something similar could happen for fixed-size targets if
REGMODE_NATURAL_SIZE is different for vectors and integers (say),
although that case would trade an ICE for an incorrect offset.

gcc/
	PR rtl-optimization/115281
	* ira-conflicts.cc (go_through_subreg): Use the natural size of
	the inner mode rather than the outer mode.

gcc/testsuite/
	PR rtl-optimization/115281
	* gfortran.dg/pr115281.f90: New test.

(cherry picked from commit 46d931b3dd31cbba7c3355ada63f155aa24a4e2b)
2024-06-11 09:58:48 +01:00
GCC Administrator
60e4cc3625 Daily bump. 2024-06-11 00:23:34 +00:00
Patrick Palka
ff8105b491 c++: lambda in pack expansion [PR115378]
Here find_parameter_packs_r is incorrectly treating the 'auto' return
type of a lambda as a parameter pack due to Concepts-TS specific logic
added in r6-4517, leading to confusion later when expanding the pattern.

Since we intend on removing Concepts TS support soon anyway, this patch
fixes this by restricting the problematic logic with flag_concepts_ts.
Doing so revealed that add_capture was relying on this logic to set
TEMPLATE_TYPE_PARAMETER_PACK for the 'auto' type of an pack expansion
init-capture, which we now need to do explicitly.

	PR c++/115378

gcc/cp/ChangeLog:

	* lambda.cc (lambda_capture_field_type): Set
	TEMPLATE_TYPE_PARAMETER_PACK on the auto type of an init-capture
	pack expansion.
	* pt.cc (find_parameter_packs_r) <case TEMPLATE_TYPE_PARM>:
	Restrict TEMPLATE_TYPE_PARAMETER_PACK promotion with
	flag_concepts_ts.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp1y/decltype-auto-103497.C: Adjust expected diagnostic.
	* g++.dg/template/pr95672.C: Likewise.
	* g++.dg/cpp2a/lambda-targ5.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
(cherry picked from commit 5c761395402a730535983a5e49ef1775561ebc61)
2024-06-10 10:15:31 -04:00
Eric Botcazou
b5ad4431f9 Fix crash on access-to-incomplete type
This just adds the missing guard.

gcc/ada/
	PR ada/114708
	* exp_util.adb (Finalize_Address): Add guard for incomplete types.

gcc/testsuite/
	* gnat.dg/incomplete8.adb: New test.
2024-06-10 12:22:32 +02:00
Eric Botcazou
72a59a1b8d Add testcase for PR ada/114398
gcc/testsuite/
	PR ada/114398
	* gnat.dg/access11.adb: New test.
2024-06-10 11:51:26 +02:00
Javier Miranda
a1bec0455f ada: Storage_Error in indirect call to function returning limited type
At runtime the code generated by the compiler reports the
exception Storage_Error in an indirect call through an
access-to-subprogram variable that references a function
returning a limited tagged type object.

gcc/ada/

	* sem_ch6.adb (Might_Need_BIP_Task_Actuals): Add support
	for access-to-subprogram parameter types.
	* exp_ch6.adb (Add_Task_Actuals_To_Build_In_Place_Call):
	Add dummy BIP parameters to access-to-subprogram types
	that may reference a function that has BIP parameters.
2024-06-10 11:50:40 +02:00
Jan Beulich
6bd8a3a7a8 libgcc/aarch64: also provide AT_HWCAP2 fallback
Much like AT_HWCAP is already provided in case the platform headers
don't have the value (yet).

libgcc/

	* config/aarch64/cpuinfo.c: Provide AT_HWCAP2.
2024-06-10 08:59:46 +02:00
Matthias Kretz
489b58b797 libstdc++: Fix simd<char> conversion for -fno-signed-char for Clang
The special case for Clang in the trait producing a signed integer type
lead to the trait returning 'char' where it should have been 'signed
char'. This workaround was introduced because on Clang the return type
of vector compares was not convertible to '_SimdWrapper<
__int_for_sizeof_t<...' unless '__int_for_sizeof_t<char>' was an alias
for 'char'. In order to not rewrite the complete mask type code (there
is code scattered around the implementation assuming signed integers),
this needs to be 'signed char'; so the special case for Clang needs to
be removed.
The conversion issue is now solved in _SimdWrapper, which now
additionally allows conversion from vector types with compatible
integral type.

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>

libstdc++-v3/ChangeLog:

	PR libstdc++/115308
	* include/experimental/bits/simd.h (__int_for_sizeof): Remove
	special cases for __clang__.
	(_SimdWrapper): Change constructor overload set to allow
	conversion from vector types with integral conversions via bit
	reinterpretation.

(cherry picked from commit 8e36cf4c5c9140915d0019999db132a900b48037)
2024-06-10 07:58:09 +02:00
Matthias Kretz
237f060033 libstdc++: Avoid MMX return types from __builtin_shufflevector
This resolves a regression on i686 that was introduced with
r15-429-gfb1649f8b4ad50.

Signed-off-by: Matthias Kretz <m.kretz@gsi.de>

libstdc++-v3/ChangeLog:

	PR libstdc++/115247
	* include/experimental/bits/simd.h (__as_vector): Don't use
	vector_size(8) on __i386__.
	(__vec_shuffle): Never return MMX vectors, widen to 16 bytes
	instead.
	(concat): Fix padding calculation to pick up widening logic from
	__as_vector.

(cherry picked from commit 241a6cc88d866fb36bd35ddb3edb659453d6322e)
2024-06-10 07:58:09 +02:00
Matthias Kretz
ff4646793f libstdc++: Use __builtin_shufflevector for simd split and concat
Signed-off-by: Matthias Kretz <m.kretz@gsi.de>

libstdc++-v3/ChangeLog:

	PR libstdc++/114958
	* include/experimental/bits/simd.h (__as_vector): Return scalar
	simd as one-element vector. Return vector from single-vector
	fixed_size simd.
	(__vec_shuffle): New.
	(__extract_part): Adjust return type signature.
	(split): Use __extract_part for any split into non-fixed_size
	simds.
	(concat): If the return type stores a single vector, use
	__vec_shuffle (which calls __builtin_shufflevector) to produce
	the return value.
	* include/experimental/bits/simd_builtin.h
	(__shift_elements_right): Removed.
	(__extract_part): Return single elements directly. Use
	__vec_shuffle (which calls __builtin_shufflevector) to for all
	non-trivial cases.
	* include/experimental/bits/simd_fixed_size.h (__extract_part):
	Return single elements directly.
	* testsuite/experimental/simd/pr114958.cc: New test.

(cherry picked from commit fb1649f8b4ad5043dd0e65e4e3a643a0ced018a9)
2024-06-10 07:58:08 +02:00
GCC Administrator
affb4f3ed6 Daily bump. 2024-06-10 00:22:13 +00:00
GCC Administrator
2ceab8827c Daily bump. 2024-06-09 00:22:27 +00:00
Harald Anlauf
c3e16edcf2 Fortran: fix ALLOCATE with SOURCE=, zero-length character [PR83865]
gcc/fortran/ChangeLog:

	PR fortran/83865
	* trans-stmt.cc (gfc_trans_allocate): Restrict special case for
	source-expression with zero-length character to rank 0, so that
	the array shape is not discarded.

gcc/testsuite/ChangeLog:

	PR fortran/83865
	* gfortran.dg/allocate_with_source_32.f90: New test.

(cherry picked from commit 7f21aee0d4ef95eee7d9f7f42e9a056715836648)
2024-06-08 19:53:00 +02:00
GCC Administrator
96f9b06822 Daily bump. 2024-06-08 00:24:02 +00:00
Richard Ball
ca1924947b arm: Fix CASE_VECTOR_SHORTEN_MODE for thumb2.
The CASE_VECTOR_SHORTEN_MODE query is missing some equals signs
which causes suboptimal codegen due to missed optimisation
opportunities. This patch also adds a test for thumb2
switch statements as none exist currently.

gcc/ChangeLog:
	PR target/115353
	* config/arm/arm.h (enum arm_auto_incmodes):
	Correct CASE_VECTOR_SHORTEN_MODE query.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/thumb2-switchstatement.c: New test.

(cherry picked from commit 2963c76e8e24d4ebaf2b1b4ac4d7ca44eb0a9025)
2024-06-07 15:16:15 +01:00
Jakub Jelinek
0f616e75f3 bitint: Fix up lower_addsub_overflow [PR115352]
The following testcase is miscompiled because of a flawed optimization.
If one changes the 65 in the testcase to e.g. 66, one gets:
...
  _25 = .USUBC (0, _24, _14);
  _12 = IMAGPART_EXPR <_25>;
  _26 = REALPART_EXPR <_25>;
  if (_23 >= 1)
    goto <bb 8>; [80.00%]
  else
    goto <bb 11>; [20.00%]

  <bb 8> :
  if (_23 != 1)
    goto <bb 10>; [80.00%]
  else
    goto <bb 9>; [20.00%]

  <bb 9> :
  _27 = (signed long) _26;
  _28 = _27 >> 1;
  _29 = (unsigned long) _28;
  _31 = _29 + 1;
  _30 = _31 > 1;
  goto <bb 11>; [100.00%]

  <bb 10> :
  _32 = _26 != _18;
  _33 = _22 | _32;

  <bb 11> :
  # _17 = PHI <_30(9), _22(7), _33(10)>
  # _19 = PHI <_29(9), _18(7), _18(10)>
...
so there is one path for limbs below the boundary (in this case there are
actually no limbs there, maybe we could consider optimizing that further,
say with simply folding that _23 >= 1 condition to 1 == 1 and letting
cfg cleanup handle it), another case where it is exactly the limb on the
boundary (that is the bb 9 handling where it extracts the interesting
bits (the first 3 statements) and then checks if it is zero or all ones and
finally the case of limbs above that where it compares the current result
limb against the previously recorded 0 or all ones and ors differences into
accumulated result.

Now, the optimization which the first hunk removes was based on the idea
that for that case the extraction of the interesting bits from the limb
don't need anything special, so the _27/_28/_29 statements above aren't
needed, the whole limb is interesting bits, so it handled the >= 1
case like the bb 9 above without the first 3 statements and bb 10 wasn't
there at all.  There are 2 problems with that, for the higher limbs it
only checks if the the result limb bits are all zeros or all ones, but
doesn't check if they are the same as the other extension bits, and
it forgets the previous flag whether there was an overflow.
First I wanted to fix it just by adding the _33 = _22 | _30; statement
to the end of bb 9 above, which fixed the originally filed huge testcase
and the first 2 foo calls in the testcase included in the patch, it no
longer forgets about previously checked differences from 0/1.
But as the last 2 foo calls show, it still didn't check whether each
even (or each odd depending on the exact position) result limb is
equal to the first one, so every second limb it could choose some other
0 vs. all ones value and as long as it repeated in another limb above it
it would be ok.

So, the optimization just can't work properly and the following patch
removes it.

2024-06-07  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/115352
	* gimple-lower-bitint.cc (lower_addsub_overflow): Don't disable
	single_comparison if cmp_code is GE_EXPR.

	* gcc.dg/torture/bitint-71.c: New test.

(cherry picked from commit a47b1aaa7a76201da7e091d9f8d4488105786274)
2024-06-07 10:34:53 +02:00
GCC Administrator
7d40974268 Daily bump. 2024-06-07 00:22:48 +00:00
Jakub Jelinek
56c73729c3 c: Fix up pointer types to may_alias structures [PR114493]
The following testcase ICEs in ipa-free-lang, because the
fld_incomplete_type_of
          gcc_assert (TYPE_CANONICAL (t2) != t2
                      && TYPE_CANONICAL (t2) == TYPE_CANONICAL (TREE_TYPE (t)));
assertion doesn't hold.
This is because t is a struct S * type which was created while struct S
was still incomplete and without the may_alias attribute (and TYPE_CANONICAL
of a pointer type is a type created with can_alias_all = false argument),
while later on on the struct definition may_alias attribute was used.
fld_incomplete_type_of then creates an incomplete distinct copy of the
structure (but with the original attributes) but pointers created for it
are because of the "may_alias" attribute TYPE_REF_CAN_ALIAS_ALL, including
their TYPE_CANONICAL, because while that is created with !can_alias_all
argument, we later set it because of the "may_alias" attribute on the
to_type.

This doesn't ICE with C++ since PR70512 fix because the C++ FE sets
TYPE_REF_CAN_ALIAS_ALL on all pointer types to the class type (and its
variants) when the may_alias is added.

The following patch does that in the C FE as well.

2024-06-06  Jakub Jelinek  <jakub@redhat.com>

	PR c/114493
	* c-decl.cc (c_fixup_may_alias): New function.
	(finish_struct): Call it if "may_alias" attribute is
	specified.

	* gcc.dg/pr114493-1.c: New test.
	* gcc.dg/pr114493-2.c: New test.

(cherry picked from commit d5a3c6d43acb8b2211d9fb59d59482d74c010f01)
2024-06-06 22:18:54 +02:00
Richard Ball
35ed54f136 aarch64: Add missing ACLE macro for NEON-SVE Bridge
__ARM_NEON_SVE_BRIDGE was missed in the original patch and is
added by this patch.

gcc/ChangeLog:

	* config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
	Add missing __ARM_NEON_SVE_BRIDGE.

(cherry picked from commit 43530bc40b1d0465911e493e56a6631202ce85b1)
2024-06-06 16:33:30 +01:00
GCC Administrator
d5760344db Daily bump. 2024-06-06 00:22:30 +00:00
Rainer Orth
e11a42b8c7 testsuite: i386: Require ifunc support in gcc.target/i386/avx10_1-25.c etc.
Two new AVX10.1 tests FAIL on Solaris/x86:

FAIL: gcc.target/i386/avx10_1-25.c (test for excess errors)
FAIL: gcc.target/i386/avx10_1-26.c (test for excess errors)

Excess errors:
/vol/gcc/src/hg/master/local/gcc/testsuite/gcc.target/i386/avx10_1-25.c:6:9: error: the call requires 'ifunc', which is not supported by this target

Fixed by requiring ifunc support.

Tested on i386-pc-solaris2.11 and x86_64-pc-linux-gnu.

2024-06-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	gcc/testsuite:
	* gcc.target/i386/avx10_1-25.c: Require ifunc support.
	* gcc.target/i386/avx10_1-26.c: Likewise.
2024-06-05 10:16:51 +08:00
GCC Administrator
7f0f88e282 Daily bump. 2024-06-05 00:22:26 +00:00
Jonathan Wakely
c6e6258ea4
libstdc++: Only define std::span::at for C++26 [PR115335]
In r14-5689-g1fa85dcf656e2f I added std::span::at and made the correct
changes to the __cpp_lib_span macro (with tests for the correct value in
C++20/23/26). But I didn't make the declaration of std::span::at
actually depend on the macro, so it was defined for C++20 and C++23, not
only for C++26. This fixes that oversight.

libstdc++-v3/ChangeLog:

	PR libstdc++/115335
	* include/std/span (span::at): Guard with feature test macro.

(cherry picked from commit 2197814011eec75022aa8550f10621409b69d4a1)
2024-06-04 15:29:28 +01:00
Jakub Jelinek
a88e13bd7e fold-const: Fix up CLZ handling in tree_call_nonnegative_warnv_p [PR115337]
The function currently incorrectly assumes all the __builtin_clz* and .CLZ
calls have non-negative result.  That is the case of the former which is UB
on zero and has [0, prec-1] return value otherwise, and is the case of the
single argument .CLZ as well (again, UB on zero), but for two argument
.CLZ is the case only if the second argument is also nonnegative (or if we
know the argument can't be zero, but let's do that just in the ranger IMHO).

The following patch does that.

2024-06-04  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/115337
	* fold-const.cc (tree_call_nonnegative_warnv_p) <CASE_CFN_CLZ>:
	If arg1 is non-NULL, RECURSE on it, otherwise return true.

	* gcc.dg/bitint-106.c: New test.

(cherry picked from commit b82a816000791e7a286c7836b3a473ec0e2a577b)
2024-06-04 16:20:25 +02:00
Jakub Jelinek
f9af4a05e0 builtins: Force SAVE_EXPR for __builtin_{add,sub,mul}_overflow and __builtin{add,sub}c [PR108789]
The following testcase is miscompiled, because we use save_expr
on the .{ADD,SUB,MUL}_OVERFLOW call we are creating, but if the first
two operands are not INTEGER_CSTs (in that case we just fold it right away)
but are TREE_READONLY/!TREE_SIDE_EFFECTS, save_expr doesn't actually
create a SAVE_EXPR at all and so we lower it to
*arg2 = REALPART_EXPR (.ADD_OVERFLOW (arg0, arg1)), \
IMAGPART_EXPR (.ADD_OVERFLOW (arg0, arg1))
which evaluates the ifn twice and just hope it will be CSEd back.
As *arg2 aliases *arg0, that is not the case.
The builtins are really never const/pure as they store into what
the third arguments points to, so after handling the INTEGER_CST+INTEGER_CST
case, I think we should just always use SAVE_EXPR.  Just building SAVE_EXPR
by hand and setting TREE_SIDE_EFFECTS on it doesn't work, because
c_fully_fold optimizes it away again, so the following patch marks the
ifn calls as TREE_SIDE_EFFECTS (but doesn't do it for the
__builtin_{add,sub,mul}_overflow_p case which were designed for use
especially in constant expressions and don't really evaluate the
realpart side, so we don't really need a SAVE_EXPR in that case).

2024-06-04  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/108789
	* builtins.cc (fold_builtin_arith_overflow): For ovf_only,
	don't call save_expr and don't build REALPART_EXPR, otherwise
	set TREE_SIDE_EFFECTS on call before calling save_expr.
	(fold_builtin_addc_subc): Set TREE_SIDE_EFFECTS on call before
	calling save_expr.

	* gcc.c-torture/execute/pr108789.c: New test.

(cherry picked from commit b8e28381cb5c0cddfe5201faf799d8b27f5d7d6c)
2024-06-04 16:19:42 +02:00
Jakub Jelinek
1c1bc2553f invoke.texi: Clarify -march=lujiazui
I was recently searching which exact CPUs are affected by the PR114576
wrong-code issue and went from the PTA_* bitmasks in GCC, so arrived
at the goldmont, goldmont-plus, tremont and lujiazui CPUs (as -march=
cases which do enable -maes and don't enable -mavx).
But when double-checking that against the invoke.texi documentation,
that was true for the first 3, but lujiazui said it supported AVX.
I was really confused by that, until I found the
https://gcc.gnu.org/pipermail/gcc-patches/2022-October/604407.html
explanation.  So, seems the CPUs do have AVX and F16C but -march=lujiazui
doesn't enable those and even activelly attempts to filter those out from
the announced CPUID features, in glibc as well as e.g. in libgcc.

Thus, I think we should document what actually happens, otherwise
users could assume that
gcc -march=lujiazui predefines __AVX__ and __F16C__, which it doesn't.

2024-06-04  Jakub Jelinek  <jakub@redhat.com>

	* doc/invoke.texi (lujiazui): Clarify that while the CPUs do support
	AVX and F16C, -march=lujiazui actually doesn't enable those.

(cherry picked from commit 09b4ab53155ea16e1fb12c2afcd9b6fe29a31c74)
2024-06-04 16:19:18 +02:00
Jakub Jelinek
a7dd44c02e rs6000: Fix up PCH in --enable-host-pie builds [PR115324]
PCH doesn't work properly in --enable-host-pie configurations on
powerpc*-linux*.
The problem is that the rs6000_builtin_info and rs6000_instance_info
arrays mix pointers to .rodata/.data (bifname and attr_string point
to string literals in .rodata section, and the next member is either NULL
or &rs6000_instance_info[XXX]) and GC member (tree fntype).
Now, for normal GC this works just fine, we emit
  {
    &rs6000_instance_info[0].fntype,
    1 * (RS6000_INST_MAX),
    sizeof (rs6000_instance_info[0]),
    &gt_ggc_mx_tree_node,
    &gt_pch_nx_tree_node
  },
  {
    &rs6000_builtin_info[0].fntype,
    1 * (RS6000_BIF_MAX),
    sizeof (rs6000_builtin_info[0]),
    &gt_ggc_mx_tree_node,
    &gt_pch_nx_tree_node
  },
GC roots which are strided and thus cover only the fntype members of all
the elements of the two arrays.
For PCH though it actually results in saving those huge arrays (one is
130832 bytes, another 81568 bytes) into the .gch files and loading them back
in full.  While the bifname and attr_string and next pointers are marked as
GTY((skip)), they are actually saved to point to the .rodata and .data
sections of the process which writes the PCH, but because cc1/cc1plus etc.
are position independent executables with --enable-host-pie, when it is
loaded from the PCH file, it can point in a completely different addresses
where nothing is mapped at all or some random different thing appears at.
While gengtype supports the callback option, that one is meant for
relocatable function pointers and doesn't work in the case of GTY arrays
inside of .data section anyway.

So, either we'd need to add some further GTY extensions, or the following
patch instead reworks it such that the fntype members which were the only
reason for PCH in those arrays are moved to separate arrays.

Size-wise in .data sections it is (in bytes):

                             vanilla    patched
rs6000_builtin_info          130832     110704
rs6000_instance_info          81568      40784
rs6000_overload_info           7392       7392
rs6000_builtin_info_fntype        0      10064
rs6000_instance_info_fntype       0      20392
sum                          219792     189336

where previously we saved/restored for PCH those 130832+81568 bytes, now we
save/restore just 10064+20392 bytes, so this change is beneficial for the
data section size.

Unfortunately, it grows the size of the rs6000_init_generated_builtins
function, vanilla had 218328 bytes, patched has 228668.

When I applied
 void
 rs6000_init_generated_builtins ()
 {
+  bifdata *rs6000_builtin_info_p;
+  tree *rs6000_builtin_info_fntype_p;
+  ovlddata *rs6000_instance_info_p;
+  tree *rs6000_instance_info_fntype_p;
+  ovldrecord *rs6000_overload_info_p;
+  __asm ("" : "=r" (rs6000_builtin_info_p) : "0" (rs6000_builtin_info));
+  __asm ("" : "=r" (rs6000_builtin_info_fntype_p) : "0" (rs6000_builtin_info_fntype));
+  __asm ("" : "=r" (rs6000_instance_info_p) : "0" (rs6000_instance_info));
+  __asm ("" : "=r" (rs6000_instance_info_fntype_p) : "0" (rs6000_instance_info_fntype));
+  __asm ("" : "=r" (rs6000_overload_info_p) : "0" (rs6000_overload_info));
+  #define rs6000_builtin_info rs6000_builtin_info_p
+  #define rs6000_builtin_info_fntype rs6000_builtin_info_fntype_p
+  #define rs6000_instance_info rs6000_instance_info_p
+  #define rs6000_instance_info_fntype rs6000_instance_info_fntype_p
+  #define rs6000_overload_info rs6000_overload_info_p
+
hack by hand, the size of the function is 209700 though, so if really
wanted, we could add __attribute__((__noipa__)) to the function when
building with recent enough GCC and pass pointers to the first elements
of the 5 arrays to the function as arguments.  If you want such a change,
could that be done incrementally?

2024-06-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/115324
	* config/rs6000/rs6000-gen-builtins.cc (write_decls): Remove
	GTY markup from struct bifdata and struct ovlddata and remove their
	fntype members.  Change next member in struct ovlddata and
	first_instance member of struct ovldrecord to have int type rather
	than struct ovlddata *.  Remove GTY markup from rs6000_builtin_info
	and rs6000_instance_info arrays, declare new
	rs6000_builtin_info_fntype and rs6000_instance_info_fntype arrays,
	which have GTY markup.
	(write_bif_static_init): Adjust for the above changes.
	(write_ovld_static_init): Likewise.
	(write_init_bif_table): Likewise.
	(write_init_ovld_table): Likewise.
	* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Likewise.
	* config/rs6000/rs6000-c.cc (find_instance): Likewise.  Make static.
	(altivec_resolve_overloaded_builtin): Adjust for the above changes.

(cherry picked from commit 4cf2de9b5268224816a3d53fdd2c3d799ebfd9c8)
2024-06-04 16:19:12 +02:00
Jakub Jelinek
14a7296d04 combine: Fix up simplify_compare_const [PR115092]
The following testcases are miscompiled (with tons of GIMPLE
optimization disabled) because combine sees GE comparison of
1-bit sign_extract (i.e. something with [-1, 0] value range)
with (const_int -1) (which is always true) and optimizes it into
NE comparison of 1-bit zero_extract ([0, 1] value range) against
(const_int 0).
The reason is that simplify_compare_const first (correctly)
simplifies the comparison to
GE (ashift:SI something (const_int 31)) (const_int -2147483648)
and then an optimization for when the second operand is power of 2
triggers.  That optimization is fine for power of 2s which aren't
the signed minimum of the mode, or if it is NE, EQ, GEU or LTU
against the signed minimum of the mode, but for GE or LT optimizing
it into NE (or EQ) against const0_rtx is wrong, those cases
are always true or always false (but the function doesn't have
a standardized way to tell callers the comparison is now unconditional).

The following patch just disables the optimization in that case.

2024-05-15  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/114902
	PR rtl-optimization/115092
	* combine.cc (simplify_compare_const): Don't optimize
	GE op0 SIGNED_MIN or LT op0 SIGNED_MIN into NE op0 const0_rtx or
	EQ op0 const0_rtx.

	* gcc.dg/pr114902.c: New test.
	* gcc.dg/pr115092.c: New test.

(cherry picked from commit 0b93a0ae153ef70a82ff63e67926a01fdab9956b)
2024-06-04 16:18:14 +02:00
Rainer Orth
e80523288c testsuite: gm2: Remove timeout overrides [PR114886]
A large number of gm2 tests are timing out even on current Solaris/SPARC
systems.  As detailed in the PR, the problem is that the gm2 testsuite
artificially lowers many timeouts way below the DejaGnu default of 300
seconds, often as short as 10 seconds.  The problem lies both in the
values (they may be appropriate for some targets, but too low for
others, especially under high load) and the fact that it uses absolute
values, overriding e.g. settings from a build-wide site.exp.

Therefore this patch removes all those overrides, restoring the
defaults.

Tested on sparc-sun-solaris2.11 (where all the previous timeouts are
gone) and i386-pc-solaris2.11.

2024-04-29  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	gcc/testsuite:
	PR modula2/114886
	* lib/gm2.exp: Don't load timeout-dg.exp.
	Don't set gm2_previous_timeout.
	Don't call dg-timeout.
	(gm2_push_timeout, gm2_pop_timeout): Remove.
	(gm2_init): Don't call dg-timeout.
	* lib/gm2-torture.exp: Don't load timeout-dg.exp.
	Don't set gm2_previous_timeout.
	Don't call dg-timeout.
	(gm2_push_timeout, gm2_pop_timeout): Remove.

	* gm2/coroutines/pim/run/pass/coroutines-pim-run-pass.exp: Don't
	load timeout-dg.exp.
	Don't call gm2_push_timeout, gm2_pop_timeout.
	* gm2/examples/map/pass/examples-map-pass.exp: Don't call
	gm2_push_timeout, gm2_pop_timeout.
	* gm2/iso/run/pass/iso-run-pass.exp: Don't load timeout-dg.exp.
	Don't call gm2_push_timeout, gm2_pop_timeout.
	* gm2/pimlib/base/run/pass/pimlib-base-run-pass.exp: Don't load
	timeout-dg.exp.
	Don't call gm2_push_timeout, gm2_pop_timeout.
	* gm2/projects/iso/run/pass/halma/projects-iso-run-pass-halma.exp:
	Don't call gm2_push_timeout, gm2_pop_timeout.
	* gm2/switches/whole-program/pass/run/switches-whole-program-pass-run.exp:
	Don't load timeout-dg.exp.
	Don't call gm2_push_timeout, gm2_pop_timeout.

(cherry picked from commit aff63ac11099d100b6891f3bcc3dc6cbc4fad654)
2024-06-04 09:12:28 +02:00
Rainer Orth
d92b508dd1 libstdc++: Build libbacktrace and 19_diagnostics/stacktrace with -funwind-tables [PR111641]
Several of the 19_diagnostics/stacktrace tests FAIL on Solaris/SPARC (32
and 64-bit), Solaris/x86 (32-bit only), and several other targets:

FAIL: 19_diagnostics/stacktrace/current.cc  -std=gnu++23 execution test
FAIL: 19_diagnostics/stacktrace/current.cc  -std=gnu++26 execution test
FAIL: 19_diagnostics/stacktrace/entry.cc  -std=gnu++23 execution test
FAIL: 19_diagnostics/stacktrace/entry.cc  -std=gnu++26 execution test
FAIL: 19_diagnostics/stacktrace/output.cc  -std=gnu++23 execution test
FAIL: 19_diagnostics/stacktrace/output.cc  -std=gnu++26 execution test
FAIL: 19_diagnostics/stacktrace/stacktrace.cc  -std=gnu++23 execution test
FAIL: 19_diagnostics/stacktrace/stacktrace.cc  -std=gnu++26 execution test

As it turns out, both the copy of libbacktrace in libstdc++ and the
testcases proper need to compiled with -funwind-tables, as is done for
libbacktrace itself.

This isn't an issue on Linux/x86_64 and Solaris/amd64 since 64-bit x86
always defaults to -funwind-tables.  32-bit x86 does, too, when
-fomit-frame-pointer is enabled as on Linux/i686, but unlike
Solaris/i386.

So this patch always enables the option both for the libbacktrace copy
and the testcases.

Tested on i386-pc-solaris2.11, sparc-sun-solaris2.11, and
x86_64-pc-linux-gnu.

2024-05-23  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	libstdc++-v3:
	PR libstdc++/111641
	* src/libbacktrace/Makefile.am (AM_CFLAGS): Add -funwind-tables.
	* src/libbacktrace/Makefile.in: Regenerate.

	* testsuite/19_diagnostics/stacktrace/current.cc (dg-options): Add
	-funwind-tables.
	* testsuite/19_diagnostics/stacktrace/entry.cc: Likewise.
	* testsuite/19_diagnostics/stacktrace/hash.cc: Likewise.
	* testsuite/19_diagnostics/stacktrace/output.cc: Likewise.
	* testsuite/19_diagnostics/stacktrace/stacktrace.cc: Likewise.

(cherry picked from commit a99ebb88f8f25e76ebed5afc22e64fa77a2f0d3f)
2024-06-04 09:10:24 +02:00
GCC Administrator
b2bbf9890e Daily bump. 2024-06-04 00:23:13 +00:00