RISC-V: Add test cases for insn does not satisfy its constraints [PR114714]
We have one ICE when RVV register overlap is enabled. We reverted this feature as it is in stage 4 and there is no much time to figure a better solution for this. Thus, for now add the related test cases which will trigger ICE when register overlap enabled. This will gate the RVV register overlap support in GCC-15. PR target/114714 gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/pr114714-1.C: New test. * g++.target/riscv/rvv/base/pr114714-2.C: New test. Signed-off-by: Pan Li <pan2.li@intel.com> Co-Authored-by: Kito Cheng <kito.cheng@sifive.com>
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Pan Li
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85
gcc/testsuite/g++.target/riscv/rvv/base/pr114714-1.C
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85
gcc/testsuite/g++.target/riscv/rvv/base/pr114714-1.C
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@ -0,0 +1,85 @@
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/* Test that we do not have ice when compile */
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -std=c++17" } */
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typedef int a;
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typedef short b;
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typedef unsigned c;
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template < typename > using e = unsigned;
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template < typename > void ab();
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#pragma riscv intrinsic "vector"
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template < typename f, int, int ac > struct g {
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using i = f;
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template < typename m > using j = g< m, 0, ac >;
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using k = g< i, 1, ac - 1 >;
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using ad = g< i, 1, ac + 1 >;
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};
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namespace ae {
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struct af {
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using h = g< short, 6, 0 < 3 >;
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};
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struct ag {
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using h = af::h;
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};
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} template < typename, int > using ah = ae::ag::h;
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template < class ai > using aj = typename ai::i;
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template < class i, class ai > using j = typename ai::j< i >;
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template < class ai > using ak = j< e< ai >, ai >;
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template < class ai > using k = typename ai::k;
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template < class ai > using ad = typename ai::ad;
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template < a ap > vuint16m1_t ar(g< b, ap, 0 >, b);
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template < a ap > vuint16m2_t ar(g< b, ap, 1 >, b);
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template < a ap > vuint32m2_t ar(g< c, ap, 1 >, c);
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template < a ap > vuint32m4_t ar(g< c, ap, 2 >, c);
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template < class ai > using as = decltype(ar(ai(), aj< ai >()));
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template < class ai > as< ai > at(ai);
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namespace ae {
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template < int ap > vuint32m4_t au(g< c, ap, 1 + 1 >, vuint32m2_t l) {
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return __riscv_vlmul_ext_v_u32m2_u32m4(l);
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}
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} template < int ap > vuint32m2_t aw(g< c, ap, 1 >, vuint16m1_t l) {
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return __riscv_vzext_vf2_u32m2(l, 0);
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}
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namespace ae {
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vuint32m4_t ax(vuint32m4_t, vuint32m4_t, a);
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}
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template < class ay, class an > as< ay > az(ay ba, an bc) {
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an bb;
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return ae::ax(ae::au(ba, bc), ae::au(ba, bb), 2);
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}
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template < class bd > as< bd > be(bd, as< ad< bd > >);
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namespace ae {
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template < class bh, class bi > void bj(bh bk, bi bl) {
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ad< decltype(bk) > bn;
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az(bn, bl);
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}
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} template < int ap, int ac, class bp, class bq >
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void br(g< c, ap, ac > bk, bp, bq bl) {
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ae::bj(bk, bl);
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}
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template < class ai > using bs = decltype(at(ai()));
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struct bt;
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template < int ac = 1 > class bu {
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public:
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template < typename i > void operator()(i) {
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ah< i, ac > d;
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bt()(i(), d);
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}
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};
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struct bt {
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template < typename bv, class bf > void operator()(bv, bf bw) {
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using bx = bv;
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ak< bf > by;
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k< bf > bz;
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using bq = bs< decltype(by) >;
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using bp = bs< decltype(bw) >;
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bp cb;
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ab< bx >();
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for (;;) {
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bp cc;
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bq bl = aw(by, be(bz, cc));
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br(by, cb, bl);
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}
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}
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};
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void d() { bu()(b()); }
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85
gcc/testsuite/g++.target/riscv/rvv/base/pr114714-2.C
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85
gcc/testsuite/g++.target/riscv/rvv/base/pr114714-2.C
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@ -0,0 +1,85 @@
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/* Test that we do not have ice when compile */
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -std=c++17" } */
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typedef int a;
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typedef short b;
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typedef unsigned c;
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template < typename > using e = unsigned;
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template < typename > void ab();
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#pragma riscv intrinsic "vector"
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template < typename f, int, int ac > struct g {
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using i = f;
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template < typename m > using j = g< m, 0, ac >;
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using k = g< i, 1, ac - 1 >;
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using ad = g< i, 1, ac + 1 >;
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};
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namespace ae {
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struct af {
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using h = g< short, 6, 0 < 3 >;
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};
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struct ag {
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using h = af::h;
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};
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} template < typename, int > using ah = ae::ag::h;
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template < class ai > using aj = typename ai::i;
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template < class i, class ai > using j = typename ai::j< i >;
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template < class ai > using ak = j< e< ai >, ai >;
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template < class ai > using k = typename ai::k;
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template < class ai > using ad = typename ai::ad;
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template < a ap > vuint16mf2_t ar(g< b, ap, 0 >, b);
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template < a ap > vuint16m1_t ar(g< b, ap, 1 >, b);
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template < a ap > vuint32m1_t ar(g< c, ap, 1 >, c);
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template < a ap > vuint32m2_t ar(g< c, ap, 2 >, c);
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template < class ai > using as = decltype(ar(ai(), aj< ai >()));
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template < class ai > as< ai > at(ai);
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namespace ae {
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template < int ap > vuint32m2_t au(g< c, ap, 1 + 1 >, vuint32m1_t l) {
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return __riscv_vlmul_ext_v_u32m1_u32m2(l);
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}
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} template < int ap > vuint32m1_t aw(g< c, ap, 1 >, vuint16mf2_t l) {
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return __riscv_vzext_vf2_u32m1(l, 0);
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}
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namespace ae {
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vuint32m2_t ax(vuint32m2_t, vuint32m2_t, a);
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}
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template < class ay, class an > as< ay > az(ay ba, an bc) {
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an bb;
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return ae::ax(ae::au(ba, bc), ae::au(ba, bb), 2);
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}
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template < class bd > as< bd > be(bd, as< ad< bd > >);
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namespace ae {
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template < class bh, class bi > void bj(bh bk, bi bl) {
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ad< decltype(bk) > bn;
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az(bn, bl);
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}
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} template < int ap, int ac, class bp, class bq >
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void br(g< c, ap, ac > bk, bp, bq bl) {
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ae::bj(bk, bl);
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}
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template < class ai > using bs = decltype(at(ai()));
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struct bt;
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template < int ac = 1 > class bu {
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public:
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template < typename i > void operator()(i) {
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ah< i, ac > d;
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bt()(i(), d);
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}
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};
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struct bt {
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template < typename bv, class bf > void operator()(bv, bf bw) {
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using bx = bv;
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ak< bf > by;
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k< bf > bz;
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using bq = bs< decltype(by) >;
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using bp = bs< decltype(bw) >;
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bp cb;
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ab< bx >();
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for (;;) {
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bp cc;
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bq bl = aw(by, be(bz, cc));
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br(by, cb, bl);
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}
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}
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};
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void d() { bu()(b()); }
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