Commit graph

102822 commits

Author SHA1 Message Date
GDB Administrator
0110183789 Automatic date update in version.in 2020-08-11 00:00:07 +00:00
Alex Coplan
fa63795f40 aarch64: Don't assert on long sysreg names
This patch fixes an assertion failure on long system register operands
in the AArch64 backend. See the new testcase for an input which
reproduces the issue.

gas/ChangeLog:

	* config/tc-aarch64.c (parse_sys_reg): Don't assert when parsing
	a long system register.
	(parse_sys_ins_reg): Likewise.
	(sysreg_hash_insert): New.
	(md_begin): Use sysreg_hash_insert() to ensure all system
	registers are no longer than the maximum length at startup.
	* testsuite/gas/aarch64/invalid-sysreg-assert.d: New test.
	* testsuite/gas/aarch64/invalid-sysreg-assert.l: Error output.
	* testsuite/gas/aarch64/invalid-sysreg-assert.s: Input.

include/ChangeLog:

	* opcode/aarch64.h (AARCH64_MAX_SYSREG_NAME_LEN): New.
2020-08-10 17:44:02 +01:00
Nick Clifton
9546e03d55 Remove spurious text in changelog entry 2020-08-10 17:24:45 +01:00
Nick Clifton
ccd9fae5d5 Improve the documentation of the linker's --relax option.
PR ld/21351
	* ld.texi: Clarify the behaviour of the --relax and --no-relax
	options on systems that do not support them.
2020-08-10 16:35:57 +01:00
Tom de Vries
b3f8962bdb [sim] Fix mbuild build breaker in sim-cpu.c
When running gdb/gdb_mbuild.sh, I run into:
...
src/sim/aarch64/../common/sim-cpu.c: In function 'sim_cpu_free':
src/sim/aarch64/../common/sim-cpu.c:64:3: error: implicit declaration of \
  function 'free' [-Werror=implicit-function-declaration]
   free (cpu);
   ^~~~
src/sim/aarch64/../common/sim-cpu.c:64:3: error: incompatible implicit \
  declaration of built-in function 'free' [-Werror]
src/sim/aarch64/../common/sim-cpu.c:64:3: note: include '<stdlib.h>' or \
  provide a declaration of 'free'
...

Fix this by adding "#include <stdlib.h>".

Tested by gdb/gdb_mbuild.sh -e aarch64-elf.

sim/common/ChangeLog:

2020-08-10  Tom de Vries  <tdevries@suse.de>

	* sim-cpu.c: Include stdlib.h for free.
2020-08-10 17:26:09 +02:00
Przemyslaw Wirkus
f7cb161ea6 [aarch64] GAS doesn't validate the architecture version for any tlbi registers. Fixed with this patch.
* gas/config/tc-aarch64.c (parse_sys_reg): Call to
	aarch64_sys_ins_reg_supported_p instead of aarch64_sys_reg_supported_p.
	(parse_sys_ins_reg): Add aarch64_sys_reg_deprecated_p check.
	* include/opcode/aarch64.h (aarch64_sys_reg_deprecated_p): Functions
	paramaters changed.
	(aarch64_sys_reg_supported_p): Function removed.
	(aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
	* opcodes/aarch64-opc.c (aarch64_print_operand):
	(aarch64_sys_reg_deprecated_p): Functions paramaters changed.
	(aarch64_sys_reg_supported_p): Function removed.
	(aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
	(aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
	into this function.
	* gas/testsuite/gas/aarch64/illegal-sysreg-5.d: New test.
	* gas/testsuite/gas/aarch64/illegal-sysreg-5.l: New test.
	* gas/testsuite/gas/aarch64/sysreg-5.s: New test.
2020-08-10 16:20:17 +01:00
Luis Machado
f8e3fe0d27 [AArch64] Improve prologue handling (and fix PR26310)
I initially noticed the problem with the addition of
gdb.dwarf2/dw2-line-number-zero.exp.  The following failures showed up:

FAIL: gdb.dwarf2/dw2-line-number-zero.exp: continue to breakpoint: bar1
FAIL: gdb.dwarf2/dw2-line-number-zero.exp: bar1, 1st next
FAIL: gdb.dwarf2/dw2-line-number-zero.exp: bar1, 2nd next
FAIL: gdb.dwarf2/dw2-line-number-zero.exp: continue to breakpoint: bar2
FAIL: gdb.dwarf2/dw2-line-number-zero.exp: bar2, 1st next
FAIL: gdb.dwarf2/dw2-line-number-zero.exp: bar2, 2nd next

They happen because AArch64's prologue analyzer skips too many instructions
and ends up indicating a stopping point further into user code.

Dump of assembler code for function bar1:
   0x00000000000006f8 <+0>:	stp	x29, x30, [sp, #-16]!
   0x00000000000006fc <+4>:	mov	x29, sp
   0x0000000000000700 <+8>:	mov	w0, #0x1                   	// #1
   0x0000000000000704 <+12>:	bl	0x6e4 <foo>
   0x0000000000000708 <+16>:	mov	w0, #0x2                   	// #2

We should've stopped at 0x700, but the analyzer actually skips
that instruction and stops at 0x704.  Then GDB ends up adjusting
the address further, and pushes the stopping point to 0x708 based on the
SAL information.

I'm not sure if this adjustment to 0x708 is correct though, as it ends up
skipping past a branch. But I'm leaving that aside for now.

One other complicating factor is that GCC seems to be hoisting up instructions
from user code, mixing them up with prologue instructions.

The following patch adjusts the heuristics a little bit, and tracks when the
SP and FP get used.  If we notice an instruction that is not supposed to be
in the prologue, and this happens *after* SP/FP adjustments and saving of
registers, we stop the analysis.

This means, for PR26310, that we will now stop at 0x700.

I've also added a few more unit tests to make sure the updated behavior is
validated.

gdb/ChangeLog:

2020-08-10  Luis Machado  <luis.machado@linaro.org>

	PR gdb/26310

	* aarch64-tdep.c (aarch64_analyze_prologue): Track use of SP/FP and
	act accordingly.
	(aarch64_analyze_prologue_test): Add more unit tests to exercise
	movz/str/stur/stp skipping behavior.
2020-08-10 11:56:19 -03:00
Luis Machado
cc308722fb [AArch64] Fix incorrectly-defined SVE macro
The kernel has fixed this here:

https://lore.kernel.org/patchwork/patch/1029011/

We should do the same for GDB, which is still carrying an incorrect
definition of the macro.  As stated in the kernel patch thread, this doesn't
actually change things because, luckily, the structs are of the same size.

gdb/ChangeLog:

2020-08-10  Luis Machado  <luis.machado@linaro.org>

	* nat/aarch64-sve-linux-sigcontext.h (SVE_PT_REGS_OFFSET): Use
	struct user_sve_header instead of struct sve_context.
2020-08-10 11:50:53 -03:00
Alan Modra
3eb651743e Implement missing powerpc mtspr and mfspr extended insns
* ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
	instructions.
2020-08-10 21:52:17 +09:30
Alan Modra
8b2742a156 Implement missing powerpc extended mnemonics
gas/
	* testsuite/gas/ppc/power8.d,
	* testsuite/gas/ppc/power8.s: Add miso.
	* testsuite/gas/ppc/power9.d,
	* testsuite/gas/ppc/power8.s: Add exser, msgsndu, msgclru.
opcodes/
	* ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
	Enable icbt for power5, miso for power8.
2020-08-10 21:52:17 +09:30
Alan Modra
5fbec329ec Prioritise mtfprd and mtvrd over mtvsrd in PowerPC disassembly
gas/
	* testsuite/gas/ppc/power8.d: Update.
	* testsuite/gas/ppc/vsx2.d: Update.
opcodes/
	* ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
	mtvsrd, and similarly for mfvsrd.
2020-08-10 21:52:17 +09:30
Alan Modra
86c0f617ac Error on lmw, lswi and related PowerPC insns when LE
* config/tc-ppc.c (md_assemble): Error for lmw, stmw, lswi, lswx,
	stswi, or stswx in little-endian mode.
	* testsuite/gas/ppc/476.d,
	* testsuite/gas/ppc/476.s: Delete lmw, stmw, lswi, lswx, stswi, stswx.
	* testsuite/gas/ppc/a2.d,
	* testsuite/gas/ppc/a2.s: Move lmw, stmw, lswi, lswx, stswi, stswx..
	* testsuite/gas/ppc/be.d,
	* testsuite/gas/ppc/be.s: ..to here, new big-endian only test.
	* testsuite/gas/ppc/le_error.d,
	* testsuite/gas/ppc/le_error.l: New little-endian test.
	* testsuite/gas/ppc/ppc.exp: Run new tests.
2020-08-10 21:52:17 +09:30
H.J. Lu
9b0ac51b22 nm: Remove --with-symbol-versions
Since

commit 7e6e972f74
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Tue Mar 24 04:23:11 2020 -0700

    bfd: Display symbol version for nm -D

always displays symbol version for nm, remove --with-symbol-versions and
silently accept it for backward compatibility.

binutils/

	PR binutils/26302
	* nm.c (with_symbol_versions): Removed.
	(long_option_values): Add OPTION_WITH_SYMBOL_VERSIONS.
	(long_options): Update --with-symbol-versions entry.
	(print_symbol): Remove the with_symbol_versions check.
	(main): Add OPTION_WITH_SYMBOL_VERSIONS for backward
	compatibility.
	* doc/binutils.texi: Remove --with-symbol-versions.

ld/

	PR binutils/26302
	* testsuite/ld-elf/pr26302.nd: New file.
	* testsuite/ld-elf/pr26302.ver: Likewise.
	* testsuite/ld-elf/pr26302a.c: Likewise.
	* testsuite/ld-elf/pr26302b.c: Likewise.
	* testsuite/ld-elf/shared.exp: Run binutils/26302 tests.
2020-08-10 05:17:41 -07:00
GDB Administrator
40f3419a81 Automatic date update in version.in 2020-08-10 00:00:09 +00:00
Simon Marchi
041d9819fb gdb: replace function pointer with void * data with function_view
Replace the function pointer + `void *` parameters of
dwarf2_fetch_die_loc_sect_off and dwarf2_fetch_die_loc_cu_off with a
function_view parameter.  Change call sites to use a lambda function.
This improves type-safety, so reduces the chances of errors.

gdb/ChangeLog:

	* read.h (dwarf2_fetch_die_loc_sect_off,
	dwarf2_fetch_die_loc_cu_off): Replace function pointer +
	`void *` parameter with function_view.
	* read.c (dwarf2_fetch_die_loc_sect_off,
	dwarf2_fetch_die_loc_cu_off): Likewise.
	* loc.c (get_frame_pc_for_per_cu_dwarf_call): Remove.
	(per_cu_dwarf_call): Adjust.
	(get_frame_address_in_block_wrapper): Remove.
	(indirect_synthetic_pointer): Adjust.
	(get_ax_pc): Remove.
	(dwarf2_compile_expr_to_ax): Adjust.

Change-Id: Ic9b6ced0c4128f2b75ca62e0ed638b0962a22859
2020-08-09 18:26:48 -04:00
GDB Administrator
0770687e1e Automatic date update in version.in 2020-08-09 00:00:08 +00:00
Tom de Vries
38f8aa06d9 [gdb/build] Fix missing implicit constructor call with gcc 4.8
When building gdb on x86_64-linux with --enable-targets riscv64-suse-linux, I
run into:
...
src/gdb/arch/riscv.c:112:45:   required from here
/usr/include/c++/4.8/bits/hashtable_policy.h:195:39: error: no matching \
  function for call to 'std::pair<const riscv_gdbarch_features, const \
  std::unique_ptr<target_desc, target_desc_deleter> >::pair(const \
  riscv_gdbarch_features&, target_desc*&)'
  : _M_v(std::forward<_Args>(__args)...) { }
                                       ^
...
for this code in riscv_lookup_target_description:
...
  /* Add to the cache.  */
  riscv_tdesc_cache.emplace (features, tdesc);
...

Work around this compiler problem (filed as PR gcc/96537), similar to how that
was done in commit 6d0cf4464e "Fix build with gcc-4.8.x":
...
-  riscv_tdesc_cache.emplace (features, tdesc);
+  riscv_tdesc_cache.emplace (features, target_desc_up (tdesc));
...
That is, call the target_desc_up constructor explictly instead of implicitly.

Also, work around a similar issue in get_thread_arch_aspace_regcache.

Build on x86_64-linux with --enable-targets riscv64-suse-linux, and
reg-tested.

gdb/ChangeLog:

2020-08-08  Tom de Vries  <tdevries@suse.de>

	PR build/26344
	* arch/riscv.c (riscv_lookup_target_description): Use an explicit
	constructor.
	* regcache.c (get_thread_arch_aspace_regcache): Same.
2020-08-08 23:34:19 +02:00
GDB Administrator
bc853409cc Automatic date update in version.in 2020-08-08 00:00:06 +00:00
Jose E. Marchesi
aebda2fbcb bpf: add missing tests from previous commits
2020-08-07  David Faust  <david.faust@oracle.com>

	* testsuite/ld-bpf/call-3.s: New file.
	* testsuite/ld-bpf/call-3.d: Likewise.
2020-08-07 20:40:01 +02:00
David Faust
d844f10ac2 bpf: fix false overflow in eBPF ELF backend linker
When performing DISP{16,32} relocations, the eBPF ELF backend linker
needs to convert the relocation from an address into a signed number
of 64-bit words (minus one) to jump.

Because of this unsigned-to-signed conversion, special care needs to
be taken when dividing to ensure the sign bits remain correct.
Otherwise, a false relocation overflow error can be triggered.

bfd/ChangeLog

2020-08-07  David Faust  <david.faust@oracle.com>

	* elf64-bpf.c (bpf_elf_relocate_section): Ensure signed division for
	DISP16 and DISP32 relocations.

ld/ChangeLog

2020-08-07  David Faust  <david.faust@oracle.com>

	* testsuite/ld-bpf/call-3.s: New file.
	* testsuite/ld-bpf/call-3.d: Likewise.
2020-08-07 20:36:47 +02:00
Simon Marchi
fe4c3d430b gdb: fix whitespace issues in ChangeLog
Change-Id: Iea4bd2096bb994ec4ea9145cbe316aa345e8c6db
2020-08-07 13:39:11 -04:00
Tom Tromey
a52b3ae2b1 Fix remaining Ravenscar regressions
Testing showed a few more Ravenscar regressions arising from upstream.
In particular, gdb now uses the current thread in some places where
inferior_ptid was previously used.  This patch fixes the problem by
arranging to save and restore the thread now.

gdb/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* ravenscar-thread.c
	(ravenscar_thread_target::set_base_thread_from_ravenscar_task):
	New method.
	(ravenscar_thread_target::wait): Check
	runtime_initialized.
	(ravenscar_thread_target::prepare_to_store)
	(ravenscar_thread_target::stopped_by_sw_breakpoint)
	(ravenscar_thread_target::stopped_by_hw_breakpoint)
	(ravenscar_thread_target::stopped_by_watchpoint)
	(ravenscar_thread_target::stopped_data_address)
	(ravenscar_thread_target::core_of_thread): Use
	scoped_restore_current_thread and
	set_base_thread_from_ravenscar_task.
2020-08-07 10:26:47 -06:00
Tom Tromey
0e29517d97 Set inferior_ptid in ravenscar_thread_target::update_thread_list
Commit 2da4b788f ("Don't write to inferior_ptid in
ravenscar-thread.c") caused a Ravenscar regression (which, FWIW, is
understandable because Ravenscar is difficult to test).  Namely,
ravenscar_thread_target::update_thread_list calls
iterate_over_live_ada_tasks, which calls ada_build_task_list, which
uses target_has_stack -- which relies on inferior_ptid.

This patch changes update_thread_list to ensure that inferior_ptid is
set before making this call.  This avoids various failures on
Ravenscar targets.

gdb/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* ravenscar-thread.c (update_thread_list): Set inferior_ptid.
2020-08-07 10:26:47 -06:00
Tom Tromey
592f9bd76a Fetch registers from correct thread in ravenscar-thread.c
Fabien also noticed that gdb would not report a stop correctly when
using Ravenscar.  This patch fixes the bug by making a few changes:

* ravenscar_thread_target::wait now updates the inferior ptid before
  updating the thread list.  This ensures that a new thread is
  correctly associated with the underlying CPU.

* The fetch_registers, store_registers, and prepare_to_store methods
  now save and restore the regcache's ptid before doing the operation
  on the underlying live thread.  This ensures that gdb informs the
  remote of a thread it knows about, as opposed to using a Ravenscar
  thread, which probably will not be recognized.

gdb/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* ravenscar-thread.c (ravenscar_thread_target::wait): Call
	update_inferior_ptid before update_thread_list.
	(temporarily_change_regcache_ptid): New class.
	(ravenscar_thread_target::fetch_registers)
	(ravenscar_thread_target::store_registers)
	(ravenscar_thread_target::prepare_to_store): Use base thread when
	forwarding operation.
2020-08-07 10:26:47 -06:00
Tom Tromey
39e2018a4e Fix Ravenscar "process" resume
A coworker noticed that gdb would send the wrong vCont packet to qemu
when debugging a Ravenscar program:

    > (gdb) thread 2
    > [Switching to thread 2 (Thread 1.2)]
    > #0  0x0000000000001000 in ?? ()

    > (gdb) c
    [...]
    > Sending packet: $vCont;c:p1.1#e2...Ack

Here, we've switched to thread 2, but the packet says to resume thread
1.

This turned out to be a bug in ravenscar_thread_target::resume, which
did not properly handle the case of a "process" resume.  In
particular, the resume method would be passed a ptid of (1, 0, 0) --
but then rewrite this to its saved ptid.

This patch fixes the problem by recognizing this case in the resume
method.

gdb/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* ravenscar-thread.c (ravenscar_thread_target::resume): Handle
	"is_pid" case.
2020-08-07 10:26:47 -06:00
Tom Tromey
e09eef98a6 Update Ravenscar documentation
This documents some recent Ravenscar changes, and further documents
the known limitation where stepping through the runtime initialization
code does not work properly.

gdb/doc/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* gdb.texinfo (Ravenscar Profile): Add examples.
	Document runtime initialization limitation.
2020-08-07 10:26:46 -06:00
Tom Tromey
2080266b77 Wrap xfer_partial and enable_btrace for Ravenscar
A gdb crash showed that the xfer_partial target method was not wrapped
for Ravenscar.  This caused remote.c to call
remote::set_general_thread with a Ravenscar "fake" ptid, which showed
up later as an event ptid.

I went through all the target methods and looked to see which ones
could call set_general_thread or set_continue_thread (but not
set_general_process, as I think Ravenscar targets aren't
multi-inferior).  This patch wraps the two that I found.

xfer_partial requires special treatment, because it can be called
recursively via get_base_thread_from_ravenscar_task.  To avoid a
recursive call, this patch changes update_thread_list to record all
tasks in the m_cpu_map, and changes get_thread_base_cpu to prefer this
map.  This avoids some memory reads.

It was unclear to me whether enable_btrace really makes sense for
Ravenscar; but at the same time it seemed harmless to add this patch.

gdb/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* ravenscar-thread.c (xfer_partial, enable_btrace, add_thread):
	New methods.
	(ravenscar_thread_target::get_thread_base_cpu): Check m_cpu_map
	first.
	(ravenscar_thread_target::add_thread): Rename from
	ravenscar_add_thread.
	(ravenscar_thread_target::update_thread_list): Use a lambda.
	(ravenscar_thread_target::xfer_partial): New method.
2020-08-07 10:26:46 -06:00
Tom Tromey
78c02f21ad Use gdb::function_view in iterate_over_live_ada_tasks
This changes iterate_over_live_ada_tasks to accept a
gdb::function_view.  This is needed by a subsequent patch.

gdb/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* ada-lang.h (ada_task_list_iterator_ftype): Now a
	gdb::function_view.
	(iterate_over_live_ada_tasks): Change type of argument.
	* ada-tasks.c (iterate_over_live_ada_tasks): Change type
	of argument.
2020-08-07 10:26:46 -06:00
Tom Tromey
d5d833afcf Change names given to Ravenscar threads
Current a Ravenscar thread is given the same sort of name as a "CPU"
thread; they can only be distinguished by looking at the output of
"info thread".

This patch changes ravenscar-thread.c to distinguish these threads,
like:

    (gdb) continue
    Continuing.
    [New Ravenscar Thread 0x2b910]

gdb/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* ravenscar-thread.c (ravenscar_thread_target) <extra_thread_info>:
	Remove.
	(ravenscar_thread_target::extra_thread_info): Remove.
	(ravenscar_thread_target::pid_to_str): Mention Ravenscar in result;
	defer to target beneath for non-Ravenscar threads.
2020-08-07 10:26:46 -06:00
Tom Tromey
a8ac85bb7d Handle case where Ada task is current but not listed
Currently, the ravenscar runtime can mark an Ada task as the current
task, before adding it to the list of tasks that can be read by gdb.
In this scenario, gdb can sometimes crash in
ravenscar_get_thread_base_cpu with:

../../src/gdb/ravenscar-thread.c:167: internal-error: int ravenscar_get_thread_base_cpu(ptid_t): Assertion `task_info != NULL' failed.

However, as ravenscar_get_thread_base_cpu is only called to find the
base CPU, we can simply record this when registering the thread, and
look this up later.

gdb/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* ravenscar-thread.c (ravenscar_thread_target) <get_base_cpu,
	get_base_thread_from_ravenscar_task>: Now methods.
	<m_cpu_map>: New member.
	(ravenscar_thread_target::get_thread_base_cpu): Rename from
	ravenscar_get_thread_base_cpu.  Check m_cpu_map.
	(ravenscar_thread_target::task_is_currently_active): Update.
	(ravenscar_thread_target::get_base_thread_from_ravenscar_task):
	Now a method.
	(ravenscar_thread_target::add_active_thread): Put initial thread
	into the m_cpu_map.
2020-08-07 10:26:46 -06:00
Tom Tromey
550ab58d6e Return event_ptid from ravenscar_thread_target::wait
ravenscar_thread_target::wait should return the event ptid from the
wrapped "wait" call in the situation where returning the Ravenscar
thread ptid is not appropriate.  This probably does not really make a
difference in practice, but it seemed like a reasonable cleanup.

gdb/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* ravenscar-thread.c (ravenscar_thread_target::wait): Return
	event_ptid.
2020-08-07 10:26:45 -06:00
Tom Tromey
e95465793d Avoid crash in ravenscar_thread_target::wait
An earlier patch caused a Ravenscar regression in
ravenscar_thread_target::wait.  In particular, add_active_thread can
return NULL when the runtime is not initialized.

gdb/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* ravenscar-thread.c (ravenscar_thread_target::wait): Check
	runtime_initialized.
2020-08-07 10:26:45 -06:00
Tom Tromey
3d4470e5d4 Call add_active_thread after pushing the ravenscar target
Currently ravenscar-thread.c calls add_active_thread before pushing
the ravenscar target.  This yields an initial thread announcement of
"[Thread 0]".  Calling add_active_thread after pushing the target
fixes this.

gdb/ChangeLog
2020-08-07  Tom Tromey  <tromey@adacore.com>

	* ravenscar-thread.c (ravenscar_thread_target): Don't call
	add_active_thread.
	(ravenscar_thread_target::add_active_thread): Now public.
	(ravenscar_inferior_created): Call add_active_thread after pushing
	the target.
2020-08-07 10:26:45 -06:00
Simon Marchi
888bdb2b74 gdb: change regcache list to be a map
One regcache object is created for each stopped thread and is stored in
the regcache::regcaches linked list.  Looking up a regcache for a given
thread is therefore in O(number of threads).  Stopping all threads then
becomes O((number of threads) ^ 2).  Same goes for resuming a thread
(need to delete the regcache of a given ptid) and resuming all threads.
It becomes noticeable when debugging thousands of threads, which is
typical with GPU targets.  This patch replaces the linked list with some
maps to reduce that complexity.

The first design was using an std::unordered_map with (target, ptid,
arch) as the key, because that's how lookups are done (in
get_thread_arch_aspace_regcache).  However, the registers_changed_ptid
function, also somewhat on the hot path (it is used when resuming
threads), needs to delete all regcaches associated to a given (target,
ptid) tuple.  If the key of the map is (target, ptid, arch), we have to
walk all items of the map, not good.

The second design was therefore using an std::unordered_multimap with
(target, ptid) as the key.  One key could be associated to multiple
regcaches, all with different gdbarches.  When looking up, we would have
to walk all these regcaches.  This would be ok, because there will
usually be actually one matching regcache.  In the exceptional
multi-arch thread cases, there will be maybe two.  However, in
registers_changed_ptid, we sometimes need to remove all regcaches
matching a given target.  We would then have to talk all items of the
map again, not good.

The design as implemented in this patch therefore uses two levels of
map.  One std::unordered_map uses the target as the key.  The value type
is an std::unordered_multimap that itself uses the ptid as the key.  The
values of the multimap are the regcaches themselves.  Again, we expect
to have one or very few regcaches per (target, ptid).

So, in summary:

* The lookups (in get_thread_arch_aspace_regcache), become faster when
  the number of threads grows, compared to the linked list.  With a
  small number of threads, it will probably be a bit slower to do map
  lookups than to walk a few linked list nodes, but I don't think it
  will be noticeable in practice.

* The function registers_changed_ptid deletes all regcaches related to a
  given (target, ptid).  It must now handle the different cases separately:

    - NULL target and minus_one_ptid: we delete all the entries
    - NULL target and non-minus_one_ptid: invalid (checked by assert)
    - non-NULL target and non-minus_one_ptid: we delete all the entries
      associated to that tuple
    - a non-NULL target and minus_one_ptid: we delete all the entries
      associated to that target

* The function regcache_thread_ptid_changed is called when a thread
  changes ptid.  It is implemented efficiently using the map, although
  that's not very important: it is not called often, mostly when
  creating an inferior, on some specific platforms.

This patch is a tiny bit from ROCm GDB [1] we would like to merge
upstream.  Laurent Morichetti gave be these performance numbers:

The benchmark used is:

  time ./gdb --data-directory=data-directory /extra/lmoriche/hip/samples/0_Intro/bit_extract/bit_extract -ex "set pagination off" -ex "set breakpoint pending on" -ex "b bit_extract_kernel if \$_thread == 5" -ex run -ex c -batch

It measures the time it takes to continue from a conditional breakpoint with
2048 threads at that breakpoint, one of them reporting the breakpoint.

baseline:
real    0m10.227s
real    0m10.177s
real    0m10.362s

with patch:
real    0m8.356s
real    0m8.424s
real    0m8.494s

[1] https://github.com/ROCm-Developer-Tools/ROCgdb

gdb/ChangeLog:

	* regcache.c (ptid_regcache_map): New type.
	(target_ptid_regcache_map): New type.
	(regcaches): Change type to target_ptid_regcache_map.
	(get_thread_arch_aspace_regcache): Update to regcaches' new
	type.
	(regcache_thread_ptid_changed): Likewise.
	(registers_changed_ptid): Likewise.
	(regcaches_size): Likewise.
	(regcaches_test): Update.
	(regcache_thread_ptid_changed): Update.
	* regcache.h (regcache_up): New type.
	* gdbsupport/ptid.h (hash_ptid): New struct.

Change-Id: Iabb0a1111707936ca111ddb13f3b09efa83d3402
2020-08-07 11:29:00 -04:00
Simon Marchi
b161a60d1f gdb: pass target to thread_ptid_changed observable
I noticed what I think is a potential bug.  I did not observe it nor was
I able to reproduce it using actual debugging.  It's quite unlikely,
because it involves multi-target and ptid clashes.  I added selftests
that demonstrate it though.

The thread_ptid_changed observer says that thread with OLD_PTID now has
NEW_PTID.  Now, if for some reason we happen to have two targets
defining a thread with OLD_PTID, the observers don't know which thread
this is about.

regcache::regcache_thread_ptid_changed changes all regcaches with
OLD_PTID.  If there is a regcache for a thread with ptid OLD_PTID, but
that belongs to a different target, this regcache will be erroneously
changed.

Similarly, infrun_thread_ptid_changed updates inferior_ptid if
inferior_ptid matches OLD_PTID.  But if inferior_ptid currently refers
not to the thread is being changed, but to a thread with the same ptid
belonging to a different target, then inferior_ptid will erroneously be
changed.

This patch adds a `process_stratum_target *` parameter to the
`thread_ptid_changed` observable and makes the two observers use it.
Tests for both are added, which would fail if the corresponding fix
wasn't done.

gdb/ChangeLog:

	* observable.h (thread_ptid_changed): Add parameter
	`process_stratum_target *`.
	* infrun.c (infrun_thread_ptid_changed): Add parameter
	`process_stratum_target *` and use it.
	(selftests): New namespace.
	(infrun_thread_ptid_changed): New function.
	(_initialize_infrun): Register selftest.
	* regcache.c (regcache_thread_ptid_changed): Add parameter
	`process_stratum_target *` and use it.
	(regcache_thread_ptid_changed): New function.
	(_initialize_regcache): Register selftest.
	* thread.c (thread_change_ptid): Pass target to
	thread_ptid_changed observable.

Change-Id: I0599e61224b6d154a7b55088a894cb88298c3c71
2020-08-07 10:59:35 -04:00
Caroline Tice
d2854d8d5a Add code for processing version 5 DWP files (for use with DWARF v5).
The DWARF v5 Spec describes a (slightly) new format for V5 .dwp files.
    This patch updates GDB to allow it to read/process .dwp files in the
    new DWARF v5 format, while continuing to be able to read/process .dwp files
    in the older V1 & V2 formats (older, pre-standard formats).

    The two major differences between the V2 and the V5 format are:
        - The inclusion of DWARF-v5-specific sections:
              .debug_loclists.dwo
              .debug_rnglists.dwo
        - The .dwp section identifier encodings have changed.  The table below
          shows the old & new encodings.  Notice the re-purposing of 5, 7 & 8
          in particular.

    Val  DW4 section       DW4 section id  DW5 section         DW5 section id
    --- -----------------  --------------  -----------------   --------------
     1  .debug_info.dwo    DW_SECT_INFO    .debug_info.dwo     DW_SECT_INFO
     2  .debug_types.dwo   DW_SECT_TYPES         --              reserved
     3  .debug_abbrev.dwo  DW_SECT_ABBREV  .debug_abbrev.dwo   DW_SECT_ABBREV
     4  .debug_line.dwo    DW_SECT_LINE    .debug_line.dwo     DW_SECT_LINE
     5  .debug_loc.dwo     DW_SECT_LOC     .debug_loclists.dwo DW_SECT_LOCLISTS
     6  .debug_str_offsets.dwo             .debug_str_offsets.dwo
                           DW_SECT_STR_OFFSETS                 DW_SECT_STR_OFFSETS
     7  .debug_macinfo.dwo DW_SECT_MACINFO .debug_macro.dwo    DW_SECT_MACRO
     8  .debug_macro.dwo   DW_SECT_MACRO   .debug_rnglists.dwo DW_SECT_RNGLISTS
2020-08-07 06:53:03 -07:00
H.J. Lu
7bb178ecf8 as: Ignore rest of line on overflow error
* read.c (read_a_source_file): Ignore rest of line on overflow
	error.
2020-08-07 06:47:56 -07:00
Jozef Lawrynowicz
4b48e6d46d MSP430: sim: Increase main memory region size
The area between 0xFF00 and 0xFFC0 is unallocated in the simulator
memory map, so extend the main memory region up to 0xFFC0 to allow the
simulator to make use of the extra 192 bytes of space.

sim/msp430/ChangeLog:

	* msp430-sim.c (sim_open): Increase the size of the main memory region
	to 0xFAC0.
2020-08-07 11:01:22 +01:00
GDB Administrator
939bf1224d Automatic date update in version.in 2020-08-07 00:00:09 +00:00
Simon Marchi
159ed7d93f gdb: move regcache::regcaches to regcache.c
I don't really understand why `regcache_thread_ptid_changed` is a static
method of `struct regcache` instead of being a static free function in
regcache.c.  And I don't understand why `current_regcache` is a static
member of `struct regcache` instead of being a static global in
regcache.c.  It's not wrong per-se, but there's no other place where we
do it like this in GDB (as far as I remember) and it just exposes things
unnecessarily in the .h.

Move them to be just static in regcache.c.  As a result,
registers_changed_ptid doesn't need to be friend of the regcache class
anymore.

Removing the include of forward_list in regcache.h showed that we were
missing an include for it in dwarf2/index-write.c, record-btrace.c and
sparc64-tdep.c.

gdb/ChangeLog:

	* regcache.h (class regcache): Remove friend
	registers_changed_ptid.
	<regcache_thread_ptid_changed>: Remove.
	<regcaches>: Remove.
	* regcache.c (regcache::regcaches): Rename to...
	(regcaches): ... this.  Make static.
	(get_thread_arch_aspace_regcache): Update.
	(regcache::regcache_thread_ptid_changed): Rename to...
	(regcache_thread_ptid_changed): ... this.  Update.
	(class regcache_access): Remove.
	(regcaches_test): Update.
	(_initialize_regcache): Update.
	* sparc64-tdep.c, dwarf2/index-write.c, record-btrace.c: Include
	<forward_list>.

Change-Id: Iabc25759848010cfbb7ee7e27f60eaca17d61c12
2020-08-06 16:23:48 -04:00
Simon Marchi
174981ae1f gdb: rename regcache::current_regcache to regcache::regcaches
The name `current_regcache` for the list of currently-existing regcaches
sounds wrong.  The name is singular, but it holds multiple regcaches, so
it could at least be `current_regcaches`.

But in other places in GDB, "current" usually means "the object we are
working with right now".  For example, we swap the "current thread" when
we want to operate on a given thread.  This is not the case here, this
variable just holds all regcaches that exist at any given time, not "the
regcache we are working with right now".

So, I think calling it `regcaches` is better.  I also considered
`regcache_list`, but a subsequent patch will make it a map and not a
list, so it would sound wrong again.  `regcaches` sounds right for any
collection of regcache, whatever the type.

Rename a few other things that were related to this `current_regcache`
field.  Note that there is a `get_current_regcache` function, which
returns the regcache of the current thread.  That one is fine, because
it returns the regcache for the current thread.

gdb/ChangeLog:

	* regcache.h (class regcache) <current_regcache>: Rename to...
	<regcaches>: ... this.  Move doc here.
	* regcache.c (regcache::current_regcache) Rename to...
	(regcache::regcaches): ... this.  Move doc to header.
	(get_thread_arch_aspace_regcache): Update.
	(regcache::regcache_thread_ptid_changed): Update.
	(registers_changed_ptid): Update.
	(class regcache_access) <current_regcache_size>: Rename to...
	<regcaches_size>: ... this.
	(current_regcache_test): Rename to...
	(regcaches_test): ... this.
	(_initialize_regcache): Update.

Change-Id: I87de67154f5fe17a1f6aee7c4f2036647ee27b99
2020-08-06 16:23:36 -04:00
Alex Coplan
d27aad4ec3 gas: Fix internal error on long local labels
Prior to this commit, on an input such as "88888888888:", GAS hits a
signed integer overflow and likely an assertion failure. I see:

$ echo "88888888888:" | bin/aarch64-none-elf-as
{standard input}: Assembler messages:
{standard input}:1: Internal error in fb_label_name at ../gas/symbols.c:2049.
Please report this bug.

To fix this issue, I've taken two steps:

1. Change the type used for processing local labels in
   read_a_source_file() from int to long, to allow representing more
   local labels, and also since all uses of this variable (temp) are
   actually of type long.

2. Detect if we would overflow and bail out with an error message
   instead of actually overflowing and hitting the assertion in
   fb_label_name().

gas/ChangeLog:

2020-08-06  Alex Coplan  <alex.coplan@arm.com>

	* read.c (read_a_source_file): Use long for local labels, detect
	overflow and raise an error for overly-long labels.
	* testsuite/gas/all/gas.exp: Add local-label-overflow test.
	* testsuite/gas/all/local-label-overflow.d: New test.
	* testsuite/gas/all/local-label-overflow.l: Error output.
	* testsuite/gas/all/local-label-overflow.s: Input.
2020-08-06 17:39:03 +01:00
Victor Collod
ed908db649 amd64_analyze_prologue: fix incorrect comment
The width of the instruction didn't match the size of its operands.

2020-06-23  Victor Collod  <vcollod@nvidia.com>

	* amd64-tdep.c (amd64_analyze_prologue): Fix incorrect comment.

Change-Id: I104ebfe0b3c24bd6a8d0f0c5a791b9676a930a54
2020-08-06 11:04:53 -04:00
David Faust
3ee9565c95 bpf: relocation fixes for eBPF ELF backend
The eBPF ELF backend was not properly recording relocation addends
during installation, nor reading and applying them when performing
the final relocation. This lead to various issues with incorrect
relocations.

These issues are fixed with a new howto special function to install
the relocations, and updates to bpf_elf_relocate_section to read and
use the addends as recorded in the input_bfd.

bfd/ChangeLog

2020-08-05  David Faust  <david.faust@oracle.com>

	* elf64-bpf.c (bpf_elf_generic_reloc): New function.
	(bpf_elf_howto_table): Use it here.
	(bpf_elf_relocate_section): Use addends recorded in input_bfd for
	instruction and data relocations.

ld/ChangeLog

2020-08-05  David Faust  <david.faust@oracle.com>

	* testsuite/ld-bpf/call-2.s: New file.
	* testsuite/ld-bpf/call-2.d: Likewise.
	* testsuite/ld-bpf/reloc-data-be.d: Likewise.
	* testsuite/ld-bpf/reloc-data-le.d: Likewise.
	* testsuite/ld-bpf/reloc-data.s: Likewise.
	* testsuite/ld-bpf/reloc-insn-external-be.d: Likewise.
	* testsuite/ld-bpf/reloc-insn-external-le.d: Likewise.
	* testsuite/ld-bpf/reloc-insn-external.s: Likewise.
	* testsuite/ld-bpf/reloc-insn32-be.d: Likewise.
	* testsuite/ld-bpf/reloc-insn32-le.d: Likewise.
	* testsuite/ld-bpf/reloc-insn32.s: Likewise.
	* testsuite/ld-bpf/reloc-insn64-be.d: Likewise.
	* testsuite/ld-bpf/reloc-insn64-le.d: Likewise.
	* testsuite/ld-bpf/reloc-insn64.s: Likewise.
2020-08-06 15:14:54 +02:00
Jozef Lawrynowicz
1a9f72a7a8 MSP430: ld: Update output section tail when shuffling ".either" sections
The MSP430 linker shuffles input sections with names beginning with
".either" between the upper and lower memory regions, to try to avoid
one region overflowing when there is space in the other region.

However, when an ".either" input section attached to the tail of an
output section was moved to a different output section in the other
region, that tail wasn't being updated to the new section at the end
of the original output section.

This caused a bug where a shuffled section could end up in the
middle of another section in the output executable, resulting in
corrupted code or data.

When changing the output section of an input section attached to the
tail of its output section, that tail is now updated to point to
the new input section at the end of the section list.

ld/ChangeLog:

2020-08-06  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* emultempl/msp430.em (change_output_section): Update the tail
	of the output section statement list when moving the original
	tail to a different output section.
	(eval_upper_either_sections): Don't move sections from the upper
	region to the lower region unless the upper region is
	overflowing.
2020-08-06 11:19:36 +01:00
Kevin Buettner
b5582ab72f Don't output null pathname in core_target::build_file_mappings warning
While looking into the regressions reported by Luis Machado, I noticed
that null pathnames were being output in the warnings.  E.g.

warning: Can't open file (null) during file-backed mapping note processing

I've changed the warning to output the pathname found in the note,
like this:

warning: Can't open file /var/lib/docker/aufs/diff/d07c...e21/lib/x86_64-linux-gnu/libc-2.27.so during file-backed mapping note processing

(I've shortened one of the path elements above.)

gdb/ChangeLog:

	* corelow.c (core_target::build_file_mappings): Don't output
	null pathname in warning.
2020-08-05 18:57:53 -07:00
GDB Administrator
f5750f89e3 Automatic date update in version.in 2020-08-06 00:00:06 +00:00
Simon Marchi
ea946b861c gdb/testsuite: link some dwarf2 tests with nopie
I noticed some gdb.dwarf2 tests not running on my machine because of
this:

    Running /home/simark/src/binutils-gdb/gdb/testsuite/gdb.dwarf2/dw2-single-line-discriminators.exp ...
    gdb compile failed, /usr/bin/ld: /home/simark/build/binutils-gdb/gdb/testsuite/outputs/gdb.dwarf2/dw2-single-line-discriminators/dw2-single-line-discriminators0.o: relocation R_X86_64_32S against
     symbol `x' can not be used when making a PIE object; recompile with -fPIE
    collect2: error: ld returned 1 exit status

We get this when the target toolchain produces position-independent
executables by default.  These tests are built from some assembly which
produces some relocations incompatible with position-independent
executables.

Add `nopie` to the compilation flags of these tests to force the
toolchain to produce non-position-independent executables.  With this,
the changed tests run successfully on my machine.

gdb/ChangeLog:

	* gdb.dwarf2/clztest.exp, gdb.dwarf2/dw2-common-block.exp,
	gdb.dwarf2/dw2-dup-frame.exp, gdb.dwarf2/dw2-reg-undefined.exp,
	gdb.dwarf2/dw2-single-line-discriminators.exp,
	dw2-undefined-ret-addr.exp: Pass nopie to compilation options.

Change-Id: Ie06c946f8e56a6030be247d1c57f416fa8b67e4c
2020-08-05 17:38:28 -04:00
Tom Tromey
57d02173a2 Fix variant part regressions with older Rust compiler
Older Rust compilers used special field names, rather than DWARF
features, to express the variant parts of Rust enums.  This is handled
in gdb through a quirk recognizer that rewrites the types.

Tom de Vries pointed out in PR rust/26197 that the variant part
rewrite regressed this code.  This patch fixes the problems:

* Univariant enums were not handled properly.  Now we simply call
  alloc_rust_variant for these as well.

* There was an off-by-one error in the handling of ordinary enums.

* Ordinary enums should have the size of their member types reset to
  match the size of the enclosing enum.  (It's not clear to me if this
  is truly necessary, but it placates a test, and this is just legacy
  handling in any case.)

Tested with Rust 1.12.0, 1.14.0, 1.19.0, 1.36.0, and 1.45.0 on x86-64
Fedora 32.  There were some unrelated failures with 1.14.0 and 1.19,0;
but considering that these are fairly old releases, I don't plan to
look into them unless someone complains.

Note that this patch will not fix all the issues in the PR.  In that
PR, Tom is using a somewhat unusual build of Rust -- in particular it
uses an older (pre-DWARF variant part) LLVM with a newer Rust.  I
believe this compiler doesn't correctly implement the old-style name
fallback; the details are in the bug.

gdb/ChangeLog
2020-08-05  Tom Tromey  <tromey@adacore.com>

	PR rust/26197:
	* dwarf2/read.c (alloc_rust_variant): Handle univariant case.
	(quirk_rust_enum): Call alloc_rust_variant for univariant case.
	Fix off-by-one and type size errors in ordinary case.
2020-08-05 09:52:55 -06:00
Jozef Lawrynowicz
e8a387fb5f MSP430: sim: Fix incorrect simulation of unsigned widening multiply
Operand sizes used for simulation of MSP430 hardware multiply
operations are not aligned with the sizes used on the target, resulting
in the simulator storing signed operands with too much precision.

Additionally, simulation of unsigned multiplication is missing explicit
casts to prevent any implicit sign extension.

gcc.c-torture/execute/pr91450-1.c uses unsigned widening multiplication
of 32-bit operands -4 and 2, to produce a 64-bit result:
0xffff fffc * 0x2 = 0x1 ffff fff8

If -4 is stored in 64-bit precision, then the multiplication is
essentially signed and the result is -8 in 64-bit precision
(0xffff ffff ffff fffc), which is not correct.

sim/msp430/ChangeLog:

	* msp430-sim.c (put_op): For unsigned multiplication, explicitly cast
	operands to the unsigned type before multiplying.
	* msp430-sim.h (struct msp430_cpu_state): Fix types used to store hwmult
	operands.

sim/testsuite/sim/msp430/ChangeLog:

	* mpyull_hwmult.s: New test.
2020-08-05 15:02:30 +01:00