FreeChainXenon/binutils-gdb
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x86: simplify control register check

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... as is already done elsewhere: There's no need for the use of
operand_type_equal() here - the bit identifying control registers isn't
used for any other purposes.
This commit is contained in:
Jan Beulich 2018-06-01 08:39:08 +02:00 • committed by Jan Beulich
parent e0c7f90025
commit 4787f4a586
2 changed files with 7 additions and 5 deletions
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5
gas/ChangeLog
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@ -1,3 +1,8 @@
2018-06-01 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (control): Delete.
(parse_real_register): Simply check "control" bit. Re-wrap.
2018-06-01 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (build_modrm_byte): Drop REX_B from condition

7
gas/config/tc-i386.c
View file

@ -1832,7 +1832,6 @@ operand_type_xor (i386_operand_type x, i386_operand_type y)
static const i386_operand_type acc32 = OPERAND_TYPE_ACC32;
static const i386_operand_type acc64 = OPERAND_TYPE_ACC64;
static const i386_operand_type control = OPERAND_TYPE_CONTROL;
static const i386_operand_type inoutportreg
= OPERAND_TYPE_INOUTPORTREG;
static const i386_operand_type reg16_inoutportreg
@ -10274,10 +10273,8 @@ parse_real_register (char *reg_string, char **end_op)
i.vec_encoding = vex_encoding_evex;
}
if (((r->reg_flags & (RegRex64 | RegRex))
|| r->reg_type.bitfield.qword)
&& (!cpu_arch_flags.bitfield.cpulm
|| !operand_type_equal (&r->reg_type, &control))
if (((r->reg_flags & (RegRex64 | RegRex)) || r->reg_type.bitfield.qword)
&& (!cpu_arch_flags.bitfield.cpulm || !r->reg_type.bitfield.control)
&& flag_code != CODE_64BIT)
return (const reg_entry *) NULL;