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x86: tighten condition for emitting LOCK on control register accesses

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The control register is never expressed by REX.B; this bit only affects
the involved GPR. Also only one of the operands can have its "control"
flag set, so only check the correct operand.
This commit is contained in:
Jan Beulich 2018-06-01 08:38:36 +02:00 • committed by Jan Beulich
parent 6479571075
commit e0c7f90025
2 changed files with 9 additions and 4 deletions
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6
gas/ChangeLog
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@ -1,3 +1,9 @@
2018-06-01 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (build_modrm_byte): Drop REX_B from condition
checking for the need of emitting LOCK. Check "control" bit just
once.
2018-06-01 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/invpcid.s,

7
gas/config/tc-i386.c
View file

@ -6894,12 +6894,11 @@ build_modrm_byte (void)
if ((i.op[source].regs->reg_flags & RegVRex) != 0)
i.vrex |= REX_R;
}
if (flag_code != CODE_64BIT && (i.rex & (REX_R | REX_B)))
if (flag_code != CODE_64BIT && (i.rex & REX_R))
{
if (!i.types[0].bitfield.control
&& !i.types[1].bitfield.control)
if (!i.types[i.tm.operand_types[0].bitfield.regmem].bitfield.control)
abort ();
i.rex &= ~(REX_R | REX_B);
i.rex &= ~REX_R;
add_prefix (LOCK_PREFIX_OPCODE);
}
}