ca11c37c5d
* Makefile.in (INCLUDES): Remove -I$(srcdir)/config. * config.gcc (*-*-openbsd): Don't set tm_file. (alpha*-*-openbsd, arm*-*-coff*, arm*-wince-pe*, arm-*-pe*, avr-*-*, h8300-*-rtems*, h8300-*-elf*, h8300-*-*, hppa*-*-osf*, hppa*-*-bsd*, hppa*-*-hpux*, i370-*-opened*, i370-*-mvs*, i370-*-linux*, i?86-*-openbsd*, i?86-*-lynxos, i?86-*-nto-qnx*, iq2000*-*-elf*, m68000-hp-hpux*, m68k-hp-hpux*, m68k-*-aout*, m68k-*-coff*, m68020-*-elf*, m68k-*-elf*, m68k*-*-netbsd*, m68k*-*-openbsd*, m68k-*-sysv4*, m68k-*-linux*, m68k-*-rtems*, mcore-*-pe*, mips*-*-netbsd*, mips*-*-openbsd*, rs6000-*-lynxos*, sh*-*-elf*, sh*-*-ka, sh-*-rtemself, sparc-*-openbsd*, strongarm-*-pe, vax-*-openbsd*, xscale-*-coff): Use explicit and complete lists of target headers to include. Move definitions to tm_defines where appropriate. (hppa*-*-openbsd*, powerpc-*-openbsd*): Comment out stanza for not-yet-contributed configuration. * config/lynx.h, config/alpha/openbsd.h, config/arm/coff.h * config/avr/avr.h, config/frv/frv.h, config/h8300/elf.h * config/i370/linux.h, config/i370/mvs.h, config/i370/oe.h * config/i386/nto.h, config/iq2000/iq2000.h, * config/m68k/coff.h, config/m68k/hp310.h, config/m68k/hp320.h * config/m68k/linux.h, config/m68k/m68k-aout.h * config/m68k/m68k-none.h, config/m68k/m68kv4.h * config/m68k/netbsd.h, config/m68k/openbsd.h * config/m68k/sgs.h, config/mcore/mcore-pe.h, * config/mips/netbsd.h, config/mips/openbsd.h, config/pa/pa.h, * config/rs6000/lynx.h, config/sh/embed-elf.h, config/sparc/openbsd.h: Remove includes of other target config headers, and definitions of macros moved to tm_defines lists. Add #undefs where now necessary to prevent redefinition warnings. * config/h8300/coff.h: New file split out of... * config/h8300/elf.h: ...here. * config/m68k/hp320base.h: New file split out of... * config/m68k/hp320.h: ...here. * config/rs6000/lynxbase.h: New file split out of... * config/rs6000/lynx.h: ...here. * config/m68k/hp310g.h, config/m68k/hp320g.h, config/m68k/hpux7.h * config/m68k/m68k-coff.h, config/mips/openbsd-be.h: Delete file. * config/sol2.h: Remove #if 0-ed #include of sys/mman.h. * config/m68k/m68kelf.h: Remove commented out #include of m68k/sgs.h. * config/mcore/mcore.h: Don't include hwint.h nor machmode.h. Remove unnecessary #ifndef. * config/s390/s390.h: Prefix #include of s390/fixdfdi.h [under IN_LIBGCC2] with config/. From-SVN: r70651
367 lines
13 KiB
C
367 lines
13 KiB
C
/* Definitions of target machine for GNU compiler for m68k targets using
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assemblers derived from AT&T "SGS" releases.
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Copyright (C) 1991, 1993, 1996, 2000, 2003 Free Software Foundation, Inc.
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Written by Fred Fish (fnf@cygnus.com)
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This file is part of GNU CC.
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#undef INT_OP_GROUP
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#define INT_OP_GROUP INT_OP_STANDARD
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/* SGS specific assembler pseudo ops. */
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#define SPACE_ASM_OP "\t.space "
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#define ALIGN_ASM_OP "\t.align "
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#undef GLOBAL_ASM_OP
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#define GLOBAL_ASM_OP "\t.global "
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#define SWBEG_ASM_OP "\t.swbeg "
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#define SET_ASM_OP "\t.set "
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#define ASM_PN_FORMAT "%s_%lu" /* Format for private names */
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/* Here are four prefixes that are used by asm_fprintf to
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facilitate customization for alternate assembler syntaxes.
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Machines with no likelihood of an alternate syntax need not
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define these and need not use asm_fprintf. */
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/* The prefix for register names. Note that REGISTER_NAMES
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is supposed to include this prefix. Also note that this is NOT an
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fprintf format string, it is a literal string */
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#undef REGISTER_PREFIX
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#define REGISTER_PREFIX "%"
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/* The prefix for local (compiler generated) labels.
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These labels will not appear in the symbol table. */
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#undef LOCAL_LABEL_PREFIX
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#define LOCAL_LABEL_PREFIX "."
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/* The prefix to add to user-visible assembler symbols. */
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#undef USER_LABEL_PREFIX
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#define USER_LABEL_PREFIX ""
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/* The prefix for immediate operands. */
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#undef IMMEDIATE_PREFIX
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#define IMMEDIATE_PREFIX "&"
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/* How to refer to registers in assembler output.
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This sequence is indexed by compiler's hard-register-number.
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Motorola format uses different register names than defined in m68k.h.
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We also take this chance to convert 'a6' to 'fp' */
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#undef REGISTER_NAMES
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#define REGISTER_NAMES \
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{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
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"%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
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"%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" }
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/* This is how to output an assembler line that says to advance the
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location counter to a multiple of 2**LOG bytes. */
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#undef ASM_OUTPUT_ALIGN
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#define ASM_OUTPUT_ALIGN(FILE,LOG) \
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do { \
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if ((LOG) > 0) \
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fprintf ((FILE), "%s%u\n", ALIGN_ASM_OP, 1 << (LOG)); \
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else if ((LOG) > 31) \
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abort (); \
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} while (0)
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/* The routine used to output null terminated string literals. We cannot
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use the ".string" pseudo op, because it silently truncates strings to
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1023 bytes. There is no "partial string op" which works like ".string"
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but doesn't append a null byte, so we can't chop the input string up
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into small pieces and use that. Our only remaining alternative is to
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output the string one byte at a time. */
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#define ASM_OUTPUT_ASCII(FILE,PTR,LEN) \
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do { \
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register size_t sp = 0, limit = (LEN); \
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fputs (integer_asm_op (1, TRUE), (FILE)); \
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do { \
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int ch = (PTR)[sp]; \
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if (ch > ' ' && ! (ch & 0x80) && ch != '\\') \
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{ \
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fprintf ((FILE), "'%c", ch); \
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} \
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else \
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{ \
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fprintf ((FILE), "0x%x", ch); \
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} \
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if (++sp < limit) \
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{ \
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if ((sp % 10) == 0) \
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{ \
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fprintf ((FILE), "\n%s", integer_asm_op (1, TRUE)); \
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} \
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else \
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{ \
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putc (',', (FILE)); \
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} \
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} \
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} while (sp < limit); \
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putc ('\n', (FILE)); \
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} while (0)
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/* SGS based assemblers don't understand #NO_APP and #APP, so just don't
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bother emitting them. */
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#undef ASM_APP_ON
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#define ASM_APP_ON ""
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#undef ASM_APP_OFF
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#define ASM_APP_OFF ""
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/* When using SGS derived assemblers, change the "MIT" or "MOTOROLA"
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to "SGS/AT&T" */
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#undef TARGET_VERSION
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#define TARGET_VERSION fprintf (stderr, " (68k, SGS/AT&T syntax)");
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/* Use proper assembler syntax for these macros. */
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#undef ASM_OUTPUT_REG_PUSH
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#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
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asm_fprintf (FILE, "\t%Omove.l %s,-(%Rsp)\n", reg_names[REGNO])
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#undef ASM_OUTPUT_REG_POP
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#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
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asm_fprintf (FILE, "\t%Omove.l (%Rsp)+,%s\n", reg_names[REGNO])
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#undef ASM_OUTPUT_FLOAT_OPERAND
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#define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \
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do { long l; \
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REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
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asm_fprintf ((FILE), "%I0x%lx", l); \
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} while (0)
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#undef ASM_OUTPUT_DOUBLE_OPERAND
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#define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
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do { long l[2]; \
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REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
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asm_fprintf ((FILE), "%I0x%lx%08lx", l[0], l[1]);\
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} while (0)
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/* How to output a block of SIZE zero bytes. Note that the `space' pseudo,
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when used in the text segment, causes SGS assemblers to output nop insns
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rather than 0s, so we set ASM_NO_SKIP_IN_TEXT to prevent this. */
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#define ASM_NO_SKIP_IN_TEXT 1
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#undef ASM_OUTPUT_SKIP
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#define ASM_OUTPUT_SKIP(FILE,SIZE) \
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fprintf (FILE, "%s%u\n", SPACE_ASM_OP, (int)(SIZE))
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/* Translate Motorola opcodes such as `jbeq' into SGS opcodes such
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as `beq.w'.
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Delete the `e' in `move...' and `fmove'.
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Change `ftst' to `ftest'.
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Change `fbne' to `fbneq'
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Change `fsne' to `fsneq'
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Change `divsl' to `tdivs' (32/32 -> 32r:32q)
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Change `divul' to `tdivu' (32/32 -> 32r:32q)
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Optionally change swap to swap.w.
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*/
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#ifdef SGS_SWAP_W
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#define ASM_OUTPUT_OPCODE(FILE, PTR) \
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{ \
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extern int flag_pic; \
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if (!strncmp ((PTR), "jbsr", 4)) \
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{ if (flag_pic) \
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fprintf ((FILE), "bsr"); \
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else \
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fprintf ((FILE), "jsr"); \
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(PTR) += 4; } \
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else if ((PTR)[0] == 'j' && (PTR)[1] == 'b') \
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{ ++(PTR); \
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while (*(PTR) != ' ') \
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{ putc (*(PTR), (FILE)); ++(PTR); } \
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fprintf ((FILE), ".w"); } \
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else if ((PTR)[0] == 's') \
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{ \
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if (!strncmp ((PTR), "swap", 4)) \
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{ fprintf ((FILE), "swap.w"); (PTR) += 4; } \
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} \
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/* FMOVE ==> FMOV, (and F%& F%$ translations) */ \
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else if ((PTR)[0] == 'f') \
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{ \
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if (!strncmp ((PTR), "fmove", 5)) \
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{ fprintf ((FILE), "fmov"); (PTR) += 5; } \
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else if (!strncmp ((PTR), "ftst", 4)) \
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{ fprintf ((FILE), "ftest"); (PTR) += 4; } \
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else if (!strncmp ((PTR), "fbne", 4)) \
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{ fprintf ((FILE), "fbneq"); (PTR) += 4; } \
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else if (!strncmp ((PTR), "fsne", 4)) \
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{ fprintf ((FILE), "fsneq"); (PTR) += 4; } \
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else if (!strncmp ((PTR), "f%$move", 7)) \
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{ (PTR) += 7; \
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if (TARGET_68040_ONLY) \
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fprintf ((FILE), "fsmov"); \
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else fprintf ((FILE), "fmov"); } \
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else if (!strncmp ((PTR), "f%&move", 7)) \
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{ (PTR) += 7; \
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if (TARGET_68040_ONLY) \
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fprintf ((FILE), "fdmov"); \
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else fprintf ((FILE), "fmov"); } \
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} \
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/* MOVE, MOVEA, MOVEQ, MOVEC ==> MOV */ \
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else if ((PTR)[0] == 'm' && (PTR)[1] == 'o' \
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&& (PTR)[2] == 'v' && (PTR)[3] == 'e') \
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{ fprintf ((FILE), "mov"); (PTR) += 4; \
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if ((PTR)[0] == 'q' || (PTR)[0] == 'a' \
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|| (PTR)[0] == 'c') (PTR)++; } \
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/* SUB, SUBQ, SUBA, SUBI ==> SUB */ \
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else if ((PTR)[0] == 's' && (PTR)[1] == 'u' \
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&& (PTR)[2] == 'b') \
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{ fprintf ((FILE), "sub"); (PTR) += 3; \
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if ((PTR)[0] == 'q' || (PTR)[0] == 'i' \
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|| (PTR)[0] == 'a') (PTR)++; } \
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/* CMP, CMPA, CMPI, CMPM ==> CMP */ \
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else if ((PTR)[0] == 'c' && (PTR)[1] == 'm' \
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&& (PTR)[2] == 'p') \
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{ fprintf ((FILE), "cmp"); (PTR) += 3; \
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if ((PTR)[0] == 'a' || (PTR)[0] == 'i' \
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|| (PTR)[0] == 'm') (PTR)++; } \
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/* DIVSL ==> TDIVS */ \
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else if ((PTR)[0] == 'd' && (PTR)[1] == 'i' \
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&& (PTR)[2] == 'v' && (PTR)[3] == 's' \
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&& (PTR)[4] == 'l') \
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{ fprintf ((FILE), "tdivs"); (PTR) += 5; } \
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/* DIVUL ==> TDIVU */ \
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else if ((PTR)[0] == 'd' && (PTR)[1] == 'i' \
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&& (PTR)[2] == 'v' && (PTR)[3] == 'u' \
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&& (PTR)[4] == 'l') \
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{ fprintf ((FILE), "tdivu"); (PTR) += 5; } \
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}
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#else /* not SGS_SWAP_W */
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#define ASM_OUTPUT_OPCODE(FILE, PTR) \
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{ \
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extern int flag_pic; \
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if (!strncmp ((PTR), "jbsr", 4)) \
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{ if (flag_pic) \
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fprintf ((FILE), "bsr"); \
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else \
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fprintf ((FILE), "jsr"); \
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(PTR) += 4; } \
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else if ((PTR)[0] == 'j' && (PTR)[1] == 'b') \
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{ ++(PTR); \
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while (*(PTR) != ' ') \
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{ putc (*(PTR), (FILE)); ++(PTR); } \
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fprintf ((FILE), ".w"); } \
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/* FMOVE ==> FMOV, (and F%& F%$ translations) */ \
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else if ((PTR)[0] == 'f') \
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{ \
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if (!strncmp ((PTR), "fmove", 5)) \
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{ fprintf ((FILE), "fmov"); (PTR) += 5; } \
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else if (!strncmp ((PTR), "ftst", 4)) \
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{ fprintf ((FILE), "ftest"); (PTR) += 4; } \
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else if (!strncmp ((PTR), "fbne", 4)) \
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{ fprintf ((FILE), "fbneq"); (PTR) += 4; } \
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else if (!strncmp ((PTR), "fsne", 4)) \
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{ fprintf ((FILE), "fsneq"); (PTR) += 4; } \
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else if (!strncmp ((PTR), "f%$move", 7)) \
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{ (PTR) += 7; \
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if (TARGET_68040_ONLY) \
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fprintf ((FILE), "fsmov"); \
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else fprintf ((FILE), "fmov"); } \
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else if (!strncmp ((PTR), "f%&move", 7)) \
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{ (PTR) += 7; \
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if (TARGET_68040_ONLY) \
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fprintf ((FILE), "fdmov"); \
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else fprintf ((FILE), "fmov"); } \
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} \
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/* MOVE, MOVEA, MOVEQ, MOVEC ==> MOV */ \
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else if ((PTR)[0] == 'm' && (PTR)[1] == 'o' \
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&& (PTR)[2] == 'v' && (PTR)[3] == 'e') \
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{ fprintf ((FILE), "mov"); (PTR) += 4; \
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if ((PTR)[0] == 'q' || (PTR)[0] == 'a' \
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|| (PTR)[0] == 'c') (PTR)++; } \
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/* SUB, SUBQ, SUBA, SUBI ==> SUB */ \
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else if ((PTR)[0] == 's' && (PTR)[1] == 'u' \
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&& (PTR)[2] == 'b') \
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{ fprintf ((FILE), "sub"); (PTR) += 3; \
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if ((PTR)[0] == 'q' || (PTR)[0] == 'i' \
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|| (PTR)[0] == 'a') (PTR)++; } \
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/* CMP, CMPA, CMPI, CMPM ==> CMP */ \
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else if ((PTR)[0] == 'c' && (PTR)[1] == 'm' \
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&& (PTR)[2] == 'p') \
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{ fprintf ((FILE), "cmp"); (PTR) += 3; \
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if ((PTR)[0] == 'a' || (PTR)[0] == 'i' \
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|| (PTR)[0] == 'm') (PTR)++; } \
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/* DIVSL ==> TDIVS */ \
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else if ((PTR)[0] == 'd' && (PTR)[1] == 'i' \
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&& (PTR)[2] == 'v' && (PTR)[3] == 's' \
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&& (PTR)[4] == 'l') \
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{ fprintf ((FILE), "tdivs"); (PTR) += 5; } \
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/* DIVUL ==> TDIVU */ \
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else if ((PTR)[0] == 'd' && (PTR)[1] == 'i' \
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&& (PTR)[2] == 'v' && (PTR)[3] == 'u' \
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&& (PTR)[4] == 'l') \
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{ fprintf ((FILE), "tdivu"); (PTR) += 5; } \
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}
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#endif /* not SGS_SWAP_W */
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/* This macro outputs the label at the start of a switch table. The
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".swbeg <N>" is an assembler directive that causes the switch table
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size to be inserted into the object code so that disassemblers, for
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example, can identify that it is the start of a switch table. */
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#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
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fprintf ((FILE), "%s&%d\n", SWBEG_ASM_OP, XVECLEN (PATTERN (TABLE), 1));
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#define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
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do { \
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ASM_OUTPUT_BEFORE_CASE_LABEL((FILE),(PREFIX),(NUM),(TABLE)); \
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(*targetm.asm_out.internal_label)((FILE),(PREFIX),(NUM)); \
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} while (0)
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/* At end of a switch table, define LDnnn iff the symbol LInnn was defined.
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Some SGS assemblers have a bug such that "Lnnn-LInnn-2.b(pc,d0.l*2)"
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fails to assemble. Luckily "LDnnn(pc,d0.l*2)" produces the results
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we want. This difference can be accommodated by making the assembler
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define such "LDnnn" to be either "Lnnn-LInnn-2.b", "Lnnn", or any other
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string, as necessary. This is accomplished via the ASM_OUTPUT_CASE_END
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macro. */
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#undef ASM_OUTPUT_CASE_END
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#define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \
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{ if (switch_table_difference_label_flag) \
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asm_fprintf (FILE, "%s%LLD%d,%LL%d-%LLI%d-2.b\n",\
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SET_ASM_OP, (NUM), (NUM), (NUM)); \
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switch_table_difference_label_flag = 0; }
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extern int switch_table_difference_label_flag;
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/* This is how to output an element of a case-vector that is relative. */
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#undef ASM_OUTPUT_ADDR_DIFF_ELT
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#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
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asm_fprintf (FILE, "%s%LL%d-%LL%d\n", integer_asm_op (2, TRUE), VALUE, REL)
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/* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
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keep switch tables in the text section. */
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#define JUMP_TABLES_IN_TEXT_SECTION 1
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