GCC modified for the FreeChainXenon project
c99116aeeb
The combination of several my recent nvptx patches has revealed an interesting RTL optimization opportunity. This patch to simplify-rtx.c simplifies (sign_extend:HI (truncate:QI (?shiftrt:HI x 8))) to just (ashiftrt:HI x 8), as the inner shift already sets the high bits appropriately. The equivalent zero_extend variant appears to already be implemented in simplify_unary_operation_1. These result from RTL expansion generating a reasonable arithmetic right shift and truncation to char, only to then discover the backend doesn't support QImode comparisons, so the next optab widens this result/operand back to HImode. In this sequence the truncate and sign extend are redundant as the original arithmetic shift has already set the high bits appropriately. The one oddity of the patch is that it tests for LSHIFTRT as inner shift, as simplify/combine has already canonicalized this to a logical shift, assuming that the distinction is unimportant following the truncatation. 2020-08-16 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog * simplify-rtx.c (simplify_unary_operation_1) [SIGN_EXTEND]: Simplify (sign_extend:M (truncate:N (lshiftrt:M x C))) to (ashiftrt:M x C) when the shift sets the high bits appropriately. |
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