P0624R2 - Default constructible and assignable stateless lambdas
* method.c (synthesized_method_walk): For C++2a don't mark
sfk_constructor or sfk_copy_assignment as deleted if lambda has
no lambda-captures.
* g++.dg/cpp2a/lambda1.C: New test.
* g++.dg/cpp0x/lambda/lambda-ice2.C: Adjust expected diagnostics
for -std=c++2a.
From-SVN: r261605
Defining std::tuple_element_t in <utility> makes it available wherever
std::tuple_element is available.
* include/std/tuple (__cpp_lib_tuple_element_t, tuple_element_t):
Move back to <utility>.
* include/std/utility (__cpp_lib_tuple_element_t. tuple_element_t):
Restore to here.
From-SVN: r261604
* include/std/tuple (__cpp_lib_tuple_element_t): Move feature test
macro from <utility> and change type to long.
* include/std/utility (__cpp_lib_tuple_element_t): Remove.
* testsuite/20_util/tuple/tuple_element_t.cc: Check for feature test
macro.
From-SVN: r261596
PR target/85945
* lower-subreg.c (find_decomposable_subregs): Don't decompose float
subregs of multi-word pseudos unless the float mode has word size.
* gcc.c-torture/compile/pr85945.c: New test.
From-SVN: r261593
Construct new elements before moving existing ones, so that if a default
constructor throws, the existing elements are not left in a moved-from
state.
2018-06-14 Daniel Trebbien <dtrebbien@gmail.com>
Jonathan Wakely <jwakely@redhat.com>
PR libstdc++/83982
* include/bits/vector.tcc (vector::_M_default_append(size_type)):
Default-construct new elements before moving existing ones.
* testsuite/23_containers/vector/capacity/resize/strong_guarantee.cc:
New.
Co-Authored-By: Jonathan Wakely <jwakely@redhat.com>
From-SVN: r261585
Common systems like glibc and FreeBSD define int32_t to int. This means
a lot of third party code works well in these cases:
#include <stdint.h>
void f(int32_t);
void f(int);
void g(int32_t *);
void h(void)
{
int i;
g(&i);
}
On RTEMS you got however in C
test.c:5:6: error: conflicting types for 'f'
void f(int);
^
test.c:3:6: note: previous declaration of 'f' was here
void f(int32_t);
^
test.c: In function 'h':
test.c:12:4: warning: passing argument 1 of 'g' from incompatible
pointer type [-Wincompatible-pointer-types]
g(&i);
^
test.c:7:6: note: expected 'int32_t * {aka long int *}' but argument
is of type 'int *' void g(int32_t *);
and C++
test.c: In function 'void h()':
test.c:12:4: error: invalid conversion from 'int*' to 'int32_t* {aka
long int*}' [-fpermissive]
g(&i);
^~
test.c:7:6: note: initializing argument 1 of 'void g(int32_t*)'
void g(int32_t *);
^
This was due to a Newlib speciality which uses long for int32_t if long
is a 32-bit type. To ease the use of third party software in RTEMS we
override this Newlib option now and use int for int32_t if int is a
32-bit type.
gcc/
* config/rtems.h (STDINT_LONG32): Define.
From-SVN: r261582
The traversal used by the write barrier insertion phase can sometimes
wind up visiting new statements inserted during the traversal, which
then results in duplicate / redundant write barrier guards. Example
program to reproduce:
package small
type S struct {
N *S
K int
}
var G *S = &S{N: nil, K: 101}
This patch changes the traversal code to keep track of statements
already added and avoid processing them again later in the traversal.
Fixesgolang/go#25867
Reviewed-on: https://go-review.googlesource.com/118637
From-SVN: r261568
gcc/c-family/
* c-opts.c (c_common_post_options): Bump the current ABI version to
13. Set warn_abi_version and flag_abi_compat_version to the current
version rather than 0. Fix defaulting flag_abi_compat_version from
warn_abi_version.
gcc/cp/
* class.c (classtype_has_non_deleted_move_ctor): New.
* tree.c (maybe_warn_parm_abi, type_has_nontrivial_copy_init):
Handle v12 breakage.
From-SVN: r261562
Dump out the blocks corresponding to variable pre-inits when
-fgo-dump-ast is in effect. Each preinit block is prefixed with a
comment indicating the variable it is initializing.
Reviewed-on: https://go-review.googlesource.com/118636
From-SVN: r261555
There is no need to use an allocator of the correct value_type when
calling allocator_traits::construct and allocator_traits::destroy. The
existing node allocator can be used, instead of constructing a new
allocator object every time.
There's also no benefit to using __gnu_cxx::__alloc_traits instead of
std::allocator_traits to get the pointer and const_pointer types.
std::forward_list is only available for C++11 and later, when
std::allocator_traits is available too.
PR libstdc++/86127
* include/bits/forward_list.h (_Fwd_list_base::_Tp_alloc_type): Remove
unused typedef.
(_Fwd_list_base::_Node_alloc_traits): Use allocator_traits instead of
__gnu_cxx::__alloc_traits.
(_Fwd_list_base::_M_create_node, _Fwd_list_base::_M_erase_after):
Use node allocator to create and destroy elements.
(forward_list::_Tp_alloc_type): Remove unused typedef.
(forward_list::_Alloc_traits): Use allocator_traits instead of
__gnu_cxx::__alloc_traits.
From-SVN: r261554
2018-06-13 Richard Biener <rguenther@suse.de>
* tree-vect-patterns.c (vect_recog_vector_vector_shift_pattern):
Properly set vector type of the intermediate stmt.
* tree-vect-stmts.c (vectorizable_operation): The destination
var always has vectype_out type.
From-SVN: r261553
This patch converts various rtx to rtx_insn * (or rtx_code_label *).
It also convert the various "_loc" params from int to location_t
gcc/ChangeLog:
* config/arc/arc.c (hwloop_optimize): Strengthen local "end_label"
from rtx to rtx_insn *.
* config/bfin/bfin.c (hwloop_optimize): Likewise for local
"label".
(add_sched_insns_for_speculation): Likewise for local "target",
converting usage of JUMP_LABEL to JUMP_LABEL_AS_INSN.
* config/c6x/c6x.c (reorg_split_calls): Strengthen param "call_labels"
from rtx_insn ** to rtx_code_label **.
(reorg_emit_nops): Likewise.
(c6x_reorg): Likewise for local "call_labels".
* config/sh/sh-protos.h (get_dest_uid): Strengthen 1st param from
rtx to rtx_insn *.
* config/sh/sh.c (dump_table): Strengthen local "lab" from rtx to
rtx_code_label *, adding safe_as_a <rtx_code_label *> casts to
the loops over LABEL_REFS.
(fixup_addr_diff_vecs): Add as_a <rtx_insn *> to usage of
braf_label.
(barrier_align): Convert usage of JUMP_LABEL to JUMP_LABEL_AS_INSN.
(get_dest_uid): Strengthen param "label" from rtx to rtx_insn *.
(split_branches): Strengthen local "olabel" from rtx to
rtx_insn *, adding a safe_as_a cast.
* emit-rtl.c (next_real_insn): Strengthen param from "rtx"
to "rtx_insn *".
(add_insn_after): Likewise for first two params.
(add_insn_before): Likewise.
(remove_insn): Likewise for param.
(emit_pattern_before_noloc): Likewise for second and third params.
(emit_jump_insn_before_noloc): Convert NULL_RTX to NULL.
(emit_call_insn_before_noloc): Likewise.
(emit_debug_insn_before_noloc): Strengthen "before" param from "rtx"
to "rtx_insn *".
(emit_barrier_before): Likewise.
(emit_label_before): Strengthen "label" param from "rtx" to
"rtx_code_label *". Strengthen "before" param from "rtx" to
"rtx_insn *".
(emit_insn_after_1): Strengthen "after" param from "rtx" to
"rtx_insn *".
(emit_pattern_after_noloc): Likewise.
(emit_insn_after_noloc): Likewise.
(emit_jump_insn_after_noloc): Likewise.
(emit_call_insn_after_noloc): Likewise.
(emit_debug_insn_after_noloc): Likewise.
(emit_barrier_after): Likewise.
(emit_label_after): Likewise for both params.
(emit_pattern_after_setloc): Likewise for "after" param. Convert
"loc" param from "int" to "location_t".
(emit_insn_after_setloc): Likewise.
(emit_jump_insn_after_setloc): Likewise.
(emit_call_insn_after_setloc): Likewise.
(emit_debug_insn_after_setloc): Likewise.
(emit_pattern_before_setloc): Likewise for "before" param. Convert
"loc" param from "int" to "location_t".
(emit_pattern_before): Convert NULL_RTX to NULL.
(emit_insn_before_setloc): Convert "loc" param from "int" to
"location_t".
(emit_jump_insn_before_setloc): Likewise.
(emit_call_insn_before_setloc): Likewise.
(emit_debug_insn_before_setloc): Strengthen "before" param from rtx to
rtx_insn *. Convert "loc" param from "int" to "location_t".
* rtl.h (emit_insn_before_setloc, emit_jump_insn_before_setloc,
emit_call_insn_before_setloc, emit_debug_insn_before_setloc):
Convert 3rd param from "int" to "location_t".
(emit_barrier_before, emit_barrier_after, next_real_insn):
Strengthen param from rtx to rtx_insn *.
(emit_label_before): Strengthen 1st param from "rtx" to
"rtx_code_label *". Strengthen 2nd param from "rtx" to
"rtx_insn *".
(emit_insn_after_noloc, emit_jump_insn_after_noloc,
emit_call_insn_after_noloc, emit_debug_insn_after_noloc):
Strengthen 2nd param from "rtx" to "rtx_insn *".
(emit_insn_after_setloc, emit_jump_insn_after_setloc)
emit_call_insn_after_setloc, emit_debug_insn_after_setloc):
Likewise. Convert 3rd param from "int" to "location_t".
(emit_label_after): Strengthen 1st param from "rtx" to
"rtx_code_label *".
(next_real_insn, remove_insn): Strengthen param from "rtx" to
"rtx_insn *".
(add_insn_before, add_insn_after): Strengthen 1st and 2nd params
from "rtx" to "rtx_insn *".
From-SVN: r261547
PR target/86048
* config/i386/winnt.c (i386_pe_seh_cold_init): Do not emit negative
offsets for register save directives. Emit a second batch of save
directives, if need be, when the function accesses prior frames.
From-SVN: r261544
Accept at most a single constant for fma patterns.
gcc/
2018-03-21 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/fpu.md (fmasf4): Force operand to register.
(fnmasf4): Likewise.
gcc/testsuite
2018-03-21 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/fma-1.c: New test.
From-SVN: r261543
For ARC700, adding padding if necessary to avoid a mispredict. A
return could happen immediately after the function start. A
call/return and return/return must be 6 bytes apart to avoid
mispredict.
The old implementation was doing this operation very late in the
compilation process, and the additional nop instructions and/or
forcing some other instruction to take their long form was not taken
into account when generating brcc instructions. Thus, wrong code could
be generated.
gcc/
2017-03-24 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (arc_pad_return): Remove.
* config/arc/arc.c (machine_function): Remove force_short_suffix
and size_reason.
(arc_print_operand): Adjust printing of '&'.
(arc_verify_short): Remove conditional printing of short suffix.
(arc_final_prescan_insn): Remove reference to size_reason.
(pad_return): New function.
(arc_reorg): Call pad_return.
(arc_pad_return): Remove.
(arc_init_machine_status): Remove reference to force_short_suffix.
* config/arc/arc.md (vunspec): Add VUNSPEC_ARC_BLOCKAGE.
(attr length): When attribute iscompact is true force to 2
regardless; in the case of maybe check if we want to force the
instruction to have 4 bytes length.
(nopv): Change it to generate 4 byte long nop as well.
(blockage): New pattern.
(simple_return): Remove call to arc_pad_return.
(p_return_i): Likewise.
gcc/testsuite/
2017-03-24 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/pr9001107555.c: New file.
From-SVN: r261542
gcc/
2017-05-02 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (atomic_exchangesi): EX instruction is default
for ARC700 and ARCv2.
From-SVN: r261539
This patch fixes an LRA cycling problem on the attached testcase.
The original insn was:
(insn 74 72 76 8 (set (reg:V2DI 287 [ _166 ])
(subreg:V2DI (reg/v/f:DI 112 [ d ]) 0)) 1060 {*aarch64_simd_movv2di}
(nil))
which IRA converted to:
(insn 74 72 580 8 (set (reg:V2DI 287 [ _166 ])
(subreg:V2DI (reg/v/f:DI 517 [orig:112 d ] [112]) 0)) 1060 {*aarch64_simd_movv2di}
(nil))
after creating loop allocnos. It happens that the ALLOCNO_WMODEs for
both 112 and 517 were not set to V2DI due to another bug that I'll post
a separate patch for, but we nevertheless got a valid allocation of
register 1.
LRA's first try at constraining the instruction gave:
Choosing alt 5 in insn 74: (0) ?w (1) r {*aarch64_simd_movv2di}
at which point all was good. But LRA later decided it needed
to spill r517:
Spill r517 after risky transformations
so the next constraint attempt gave:
Choosing alt 0 in insn 74: (0) =w (1) m {*aarch64_simd_movv2di}
which was still good. Then during inheritance we had:
Creating newreg=672 from oldreg=517, assigning class GENERAL_REGS to inheritance r672
Original reg change 517->672 (bb8):
74: r287:V2DI=r672:DI#0
Add inheritance<-original before:
939: r672:DI=r517:DI
Inheritance reuse change 517->672 (bb8):
620: r572:DI=r672:DI
REG_DEAD r672:DI
Use smallest class of POINTER_REGS and GENERAL_REGS
Creating newreg=673 from oldreg=517, assigning class POINTER_REGS to inheritance r673
Original reg change 517->673 (bb8):
936: r669:DI=r673:DI
Add inheritance<-original before:
940: r673:DI=r517:DI
("Use smallest class of POINTER_REGS and GENERAL_REGS" ought to
give GENERAL_REGS. That might be a missed optimisation, and probably
due to both classes having the same number of allocatable registers.
I'll look at that as a follow-on.)
Thus LRA created two inheritance registers for r517, one (r673)
that included the unallocatable x31 and another (r672) that didn't.
The r672 references included the paradoxical subreg in insn 74 but the
r673 ones didn't. LRA then allocated x30 to r673, which was a valid
choice.
Later LRA decided to "undo" the inheritance for insn 620, but because
of the double inheritance, it got confused as to what the original
situation was, and made insn 74 use the other inheritance register
instead of r517:
********** Undoing inheritance #2: **********
Inherit 11 out of 12 (91.67%)
Insn after restoring regs:
620: r572:DI=r517:DI
REG_DEAD r517:DI
Change reload insn:
74: r287:V2DI=r673:DI#0 <-------------------
Insn after restoring regs:
939: r517:DI=r673:DI
REG_DEAD r673:DI
This might be a bug in itself: we should probably look through sets
of other inheritance pseudos to find the "real" origin.
Either way, at this point we had a situation in which r673 was used in an
insn whose subreg was larger than the biggest_mode that r673 had when it
was allocated. While x30 was valid for the original biggest_mode, it
wasn't valid for this subreg use.
The next attempt to constrain insn 74 was:
Choosing alt 5 in insn 74: (0) ?w (1) r {*aarch64_simd_movv2di}
Creating newreg=684, assigning class GENERAL_REGS to r684
74: r287:V2DI=r684:V2DI
Inserting insn reload before:
951: r684:V2DI=r673:DI#0
where LRA reloaded the SUBREG rather than the SUBREG_REG. And it
then cycled trying the same thing when reloading the reload (and the
reload of the reload, etc.).
What it should be doing here is reloading the SUBREG_REG instead.
There's already code to cope with this case when the paradoxical
subreg falls outside the class (which isn't true here, since r673
is POINTER_REGS and POINTER_REGS includes x31). But I think we
should also test whether LRA is entitled to allocate the spanned
registers. Not doing that seems like a bug regardless of the above
missed optimisation and the mix-up undoing inheritance.
2018-05-30 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* lra-constraints.c (simplify_operand_subreg): In the paradoxical
case, check whether the outer register overlaps an unallocatable
register, not just whether it fits the required class.
gcc/testsuite/
* g++.dg/torture/aarch64-vect-init-1.C: New test.
From-SVN: r261531
This patch generalises various places that used hwi rtx accessors so
that they can handle poly_ints instead. In many cases these changes
are by inspection rather than because something had shown them to be
necessary.
2018-06-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* poly-int.h (can_div_trunc_p): Add new overload in which all values
are poly_ints.
* alias.c (get_addr): Extend CONST_INT handling to poly_int_rtx_p.
(memrefs_conflict_p): Likewise.
(init_alias_analysis): Likewise.
* cfgexpand.c (expand_debug_expr): Likewise.
* combine.c (combine_simplify_rtx, force_int_to_mode): Likewise.
* cse.c (fold_rtx): Likewise.
* explow.c (adjust_stack, anti_adjust_stack): Likewise.
* expr.c (emit_block_move_hints): Likewise.
(clear_storage_hints, push_block, emit_push_insn): Likewise.
(store_expr_with_bounds, reduce_to_bit_field_precision): Likewise.
(emit_group_load_1): Use rtx_to_poly_int64 for group offsets.
(emit_group_store): Likewise.
(find_args_size_adjust): Use strip_offset. Use rtx_to_poly_int64
to read the PRE/POST_MODIFY increment.
* calls.c (store_one_arg): Use strip_offset.
* rtlanal.c (rtx_addr_can_trap_p_1): Extend CONST_INT handling to
poly_int_rtx_p.
(set_noop_p): Use rtx_to_poly_int64 for the elements selected
by a VEC_SELECT.
* simplify-rtx.c (avoid_constant_pool_reference): Use strip_offset.
(simplify_binary_operation_1): Extend CONST_INT handling to
poly_int_rtx_p.
* var-tracking.c (compute_cfa_pointer): Take a poly_int64 rather
than a HOST_WIDE_INT.
(hard_frame_pointer_adjustment): Change from HOST_WIDE_INT to
poly_int64.
(adjust_mems, add_stores): Update accodingly.
(vt_canonicalize_addr): Track polynomial offsets.
(emit_note_insn_var_location): Likewise.
(vt_add_function_parameter): Likewise.
(vt_initialize): Likewise.
From-SVN: r261530
Core issue 1331 - const mismatch with defaulted copy constructor
* class.c (check_bases_and_members): When checking a defaulted
function, mark it as deleted rather than giving an error.
* g++.dg/cpp0x/defaulted15.C (struct F): Remove dg-error.
* g++.dg/cpp0x/defaulted52.C: New test.
* g++.dg/cpp0x/defaulted53.C: New test.
* g++.dg/cpp0x/defaulted54.C: New test.
* g++.dg/cpp0x/defaulted55.C: New test.
* g++.dg/cpp0x/defaulted56.C: New test.
* g++.dg/cpp0x/defaulted57.C: New test.
* g++.dg/cpp0x/defaulted58.C: New test.
* g++.dg/cpp0x/defaulted59.C: New test.
* g++.dg/cpp0x/defaulted60.C: New test.
From-SVN: r261526
