diff --git a/ChangeLog b/ChangeLog index 308df0e93db..740844bca6d 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,7 @@ +2023-05-17 Eugene Rozenfeld + + * Makefile.in: Disable warnings as errors for STAGEautofeedback + 2023-05-11 Robin Dapp * MAINTAINERS: Sort. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1af113d10e8..84bb660fa68 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,187 @@ +2023-05-17 Jin Ma + + * genrecog.cc (print_nonbool_test): Fix type error of + switch (SUBREG_BYTE (op))'. + +2023-05-17 Jin Ma + + * common/config/riscv/riscv-common.cc: Remove + trailing spaces on lines. + * config/riscv/riscv.cc (riscv_legitimize_move): Likewise. + * config/riscv/riscv.h (enum reg_class): Likewise. + * config/riscv/riscv.md: Likewise. + +2023-05-17 John David Anglin + + * config/pa/pa.md (clear_cache): New. + +2023-05-17 Arsen Arsenović + + * doc/extend.texi (C++ Concepts) : Remove extraneous + parenthesis. Fix misnamed index entry. + : Fix misnamed index entry. + +2023-05-17 Jivan Hakobyan + + * config/riscv/riscv.md (*3_mask): New pattern, + combined from ... + (*si3_mask, *di3_mask): Here. + (*si3_mask_1, *di3_mask_1): And here. + * config/riscv/bitmanip.md (*3_mask): New + pattern. + (*si3_sext_mask): Likewise. + * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand + and const_di_mask_operand. + (bitmanip_rotate): New iterator. + (bitmanip_optab): Add rotates. + * config/riscv/predicates.md (const_si_mask_operand): Renamed + from const31_operand. Generalize to handle more mask constants. + (const_di_mask_operand): Similarly. + +2023-05-17 Jakub Jelinek + + PR c++/109884 + * config/i386/i386-builtin-types.def (FLOAT128): Use + float128t_type_node rather than float128_type_node. + +2023-05-17 Alexander Monakov + + * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for + FP_CONTRACT_FAST (no functional change). + +2023-05-17 Uros Bizjak + + * config/i386/i386.cc (ix86_multiplication_cost): Correct + calcuation of integer vector mode costs to reflect generated + instruction sequences of different integer vector modes and + different target ABIs. + +2023-05-17 Juzhe-Zhong + + * config/riscv/riscv-opts.h (enum riscv_entity): New enum. + * config/riscv/riscv.cc (riscv_emit_mode_set): New function. + (riscv_mode_needed): Ditto. + (riscv_mode_after): Ditto. + (riscv_mode_entry): Ditto. + (riscv_mode_exit): Ditto. + (riscv_mode_priority): Ditto. + (TARGET_MODE_EMIT): New target hook. + (TARGET_MODE_NEEDED): Ditto. + (TARGET_MODE_AFTER): Ditto. + (TARGET_MODE_ENTRY): Ditto. + (TARGET_MODE_EXIT): Ditto. + (TARGET_MODE_PRIORITY): Ditto. + * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto. + (NUM_MODES_FOR_MODE_SWITCHING): Ditto. + * config/riscv/riscv.md: Add csrwvxrm. + * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute. + (vxrmsi): New pattern. + +2023-05-17 Juzhe-Zhong + + * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode. + * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto. + (struct narrow_alu_def): Ditto. + * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto. + (function_expander::use_exact_insn): Ditto. + * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function. + (function_base::has_rounding_mode_operand_p): New function. + +2023-05-17 Andrew Pinski + + * tree-ssa-forwprop.cc (simplify_builtin_call): Check + against 0 instead of calling integer_zerop. + +2023-05-17 Juzhe-Zhong + + * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function. + (DEF_RVV_VXRM_ENUM): New macro. + (handle_pragma_vector): Add vxrm enum register. + * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro. + (RNU): Ditto. + (RNE): Ditto. + (RDN): Ditto. + (ROD): Ditto. + +2023-05-17 Aldy Hernandez + + * value-range.h (Value_Range::operator=): New. + +2023-05-17 Aldy Hernandez + + * value-range.cc (vrange::operator=): Add a stub to copy + unsupported ranges. + * value-range.h (is_a ): New. + (Value_Range::operator=): Support copying unsupported ranges. + +2023-05-17 Aldy Hernandez + + * data-streamer-in.cc (streamer_read_real_value): New. + (streamer_read_value_range): New. + * data-streamer-out.cc (streamer_write_real_value): New. + (streamer_write_vrange): New. + * data-streamer.h (streamer_write_vrange): New. + (streamer_read_value_range): New. + +2023-05-17 Jonathan Wakely + + PR c++/109532 + * doc/invoke.texi (Code Gen Options): Note that -fshort-enums + is ignored for a fixed underlying type. + (C++ Dialect Options): Likewise for -fstrict-enums. + +2023-05-17 Tobias Burnus + + * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran + special case. + +2023-05-17 Stefan Schulze Frielinghaus + + * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE): + New. + (s390_atomic_align_for_mode): New. + +2023-05-17 Jakub Jelinek + + * wide-int.cc (wi::from_array): Add missing closing paren in function + comment. + +2023-05-17 Kewen Lin + + * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with + suggested unroll factor once the previous analysis fails. + +2023-05-17 Pan Li + + * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New + macro. + (main): Add bool1 to the type indexer. + * config/riscv/riscv-vector-builtins-functions.def + (vreinterpret): Register vbool1 interpret function. + * config/riscv/riscv-vector-builtins-types.def + (DEF_RVV_BOOL1_INTERPRET_OPS): New macro. + (vint8m1_t): Add the type to bool1_interpret_ops. + (vint16m1_t): Ditto. + (vint32m1_t): Ditto. + (vint64m1_t): Ditto. + (vuint8m1_t): Ditto. + (vuint16m1_t): Ditto. + (vuint32m1_t): Ditto. + (vuint64m1_t): Ditto. + * config/riscv/riscv-vector-builtins.cc + (DEF_RVV_BOOL1_INTERPRET_OPS): New macro. + (required_extensions_p): Add bool1 interpret case. + * config/riscv/riscv-vector-builtins.def + (bool1_interpret): Add bool1 interpret to base type. + * config/riscv/vector.md (@vreinterpret): Add new expand + with VB dest for vreinterpret. + +2023-05-17 Jiufu Guo + + PR target/106708 + * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building + constants through "lis; xoris". + 2023-05-16 Ajit Kumar Agarwal * common/config/rs6000/rs6000-common.cc: Add REE pass as a diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index e2f60e4d429..460c1ea9af3 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20230517 +20230518 diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index df1112d979b..47d7f73a9ae 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,7 @@ +2023-05-18 Joseph Myers + + * c-format.cc (print_char_table): Handle %B like %b. + 2023-05-15 Joseph Myers * c-lex.cc (c_common_has_attribute): Use 202311 as diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index d4b4c77e9dd..d33e9ac9025 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,9 @@ +2023-05-17 Jakub Jelinek + + PR c++/109868 + * init.cc (build_zero_init_1): Don't initialize zero-width bitfields. + For unions only initialize the first FIELD_DECL. + 2023-05-16 Marek Polacek PR c++/109774 diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 696eaa07566..8686b24a64f 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,20 @@ +2023-05-17 Harald Anlauf + + PR fortran/95374 + PR fortran/104352 + * decl.cc (add_init_expr_to_sym): Set shape of initializer also for + zero-sized arrays, so that bounds violations can be detected later. + +2023-05-17 Tobias Burnus + + * trans-decl.cc (gfc_get_symbol_decl): Add attributes + such as 'declare target' also to hidden artificial + variable for deferred-length character variables. + * trans-openmp.cc (gfc_trans_omp_array_section, + gfc_trans_omp_clauses, gfc_trans_omp_target_exit_data): + Improve mapping of array descriptors and deferred-length + string variables. + 2023-05-16 Paul Thomas PR fortran/105152 diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog index 270935faaf8..df478794b1c 100644 --- a/gcc/m2/ChangeLog +++ b/gcc/m2/ChangeLog @@ -1,3 +1,14 @@ +2023-05-17 Gaius Mulley + + * gm2-libs-iso/LongWholeIO.mod (WriteInt): Only request a + sign if the value is < 0. + * gm2-libs-iso/ShortWholeIO.mod (WriteInt): Only request a + sign if the value is < 0. + * gm2-libs-iso/WholeIO.mod (WriteInt): Only request a sign + if the value is < 0. + * gm2-libs-iso/WholeStr.mod (WriteInt): Only request a sign + if the value is < 0. + 2023-05-16 Gaius Mulley PR modula2/109879 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2629ca4ffdc..b084516cf5c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,124 @@ +2023-05-18 Joseph Myers + + * gcc.dg/format/c2x-printf-1.c: Test %B here. + * gcc.dg/format/ext-9.c: Do not test %B here. + +2023-05-17 Harald Anlauf + + PR fortran/95374 + PR fortran/104352 + * gfortran.dg/zero_sized_13.f90: New test. + +2023-05-17 Jivan Hakobyan + + * gcc.target/riscv/shift-and-2.c: Fixed test + * gcc.target/riscv/zbb-rol-ror-01.c: New test + * gcc.target/riscv/zbb-rol-ror-02.c: New test + * gcc.target/riscv/zbb-rol-ror-03.c: New test + * gcc.target/riscv/zbb-rol-ror-04.c: New test + * gcc.target/riscv/zbb-rol-ror-05.c: New test + * gcc.target/riscv/zbb-rol-ror-06.c: New test + * gcc.target/riscv/zbb-rol-ror-07.c: New test + +2023-05-17 Jakub Jelinek + + PR c++/109884 + * c-c++-common/pr109884.c: New test. + +2023-05-17 Juzhe-Zhong + + * gcc.target/riscv/rvv/base/vxrm-10.c: New test. + * gcc.target/riscv/rvv/base/vxrm-6.c: New test. + * gcc.target/riscv/rvv/base/vxrm-7.c: New test. + * gcc.target/riscv/rvv/base/vxrm-8.c: New test. + * gcc.target/riscv/rvv/base/vxrm-9.c: New test. + +2023-05-17 Juzhe-Zhong + + * g++.target/riscv/rvv/base/bug-11.C: Adapt testcase. + * g++.target/riscv/rvv/base/bug-12.C: Ditto. + * g++.target/riscv/rvv/base/bug-14.C: Ditto. + * g++.target/riscv/rvv/base/bug-15.C: Ditto. + * g++.target/riscv/rvv/base/bug-16.C: Ditto. + * g++.target/riscv/rvv/base/bug-17.C: Ditto. + * g++.target/riscv/rvv/base/bug-18.C: Ditto. + * g++.target/riscv/rvv/base/bug-19.C: Ditto. + * g++.target/riscv/rvv/base/bug-20.C: Ditto. + * g++.target/riscv/rvv/base/bug-21.C: Ditto. + * g++.target/riscv/rvv/base/bug-22.C: Ditto. + * g++.target/riscv/rvv/base/bug-23.C: Ditto. + * g++.target/riscv/rvv/base/bug-3.C: Ditto. + * g++.target/riscv/rvv/base/bug-5.C: Ditto. + * g++.target/riscv/rvv/base/bug-6.C: Ditto. + * g++.target/riscv/rvv/base/bug-8.C: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-100.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-101.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-102.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-103.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-104.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-105.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-106.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-107.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-108.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-109.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-110.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-111.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-112.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-113.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-114.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-115.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-116.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-117.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-118.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-119.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-122.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-97.c: Ditto. + * gcc.target/riscv/rvv/base/binop_vx_constraint-98.c: Ditto. + * gcc.target/riscv/rvv/base/merge_constraint-1.c: Ditto. + * gcc.target/riscv/rvv/base/narrow_constraint-6.c: Ditto. + * gcc.target/riscv/rvv/base/narrow_constraint-7.c: Ditto. + * gcc.target/riscv/rvv/base/narrow_constraint-8.c: Ditto. + * gcc.target/riscv/rvv/base/narrow_constraint-9.c: Ditto. + * gcc.target/riscv/rvv/base/vxrm-2.c: New test. + * gcc.target/riscv/rvv/base/vxrm-3.c: New test. + * gcc.target/riscv/rvv/base/vxrm-4.c: New test. + * gcc.target/riscv/rvv/base/vxrm-5.c: New test. + +2023-05-17 Juzhe-Zhong + + * gcc.target/riscv/rvv/base/vxrm-1.c: New test. + +2023-05-17 Tobias Burnus + + * gfortran.dg/goacc/finalize-1.f: Update dg-tree; shows a fix + for 'finalize' as a ptr is now 'delete' instead of 'release'. + * gfortran.dg/gomp/pr78260-2.f90: Likewise as elem-size calc moved + to if (allocated) block + * gfortran.dg/gomp/target-exit-data.f90: Likewise as a var is now a + replaced by a MEM< _25 > expression. + * gfortran.dg/gomp/map-9.f90: Update dg-scan-tree-dump. + * gfortran.dg/gomp/map-10.f90: New test. + +2023-05-17 Stefan Schulze Frielinghaus + + * g++.target/s390/atomic-align-1.C: New test. + * gcc.target/s390/atomic-align-1.c: New test. + * gcc.target/s390/atomic-align-2.c: New test. + +2023-05-17 Jakub Jelinek + + PR c++/109868 + * g++.dg/init/pr109868.C: New test. + +2023-05-17 Pan Li + + * gcc.target/riscv/rvv/base/misc_vreinterpret_vbool_vint.c: New test. + +2023-05-17 Jiufu Guo + + PR target/106708 + * gcc.target/powerpc/pr106708.c: Add test function. + 2023-05-16 Joseph Myers * gcc.dg/c11-fordecl-1.c, gcc.dg/c11-fordecl-2.c, diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog index d650ffdec20..8c0ed36fc05 100644 --- a/libgomp/ChangeLog +++ b/libgomp/ChangeLog @@ -1,3 +1,12 @@ +2023-05-17 Tobias Burnus + + * testsuite/libgomp.fortran/target-enter-data-3.f90: Uncomment + 'target exit data'. + * testsuite/libgomp.fortran/target-enter-data-4.f90: New test. + * testsuite/libgomp.fortran/target-enter-data-5.f90: New test. + * testsuite/libgomp.fortran/target-enter-data-6.f90: New test. + * testsuite/libgomp.fortran/target-enter-data-7.f90: New test. + 2023-05-15 Thomas Schwinge PR testsuite/66005 diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index cd9771439b6..9a685763986 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,46 @@ +2023-05-17 Jakub Jelinek + + PR libstdc++/109883 + * testsuite/26_numerics/headers/cmath/constexpr_std_c++23.cc: New test. + +2023-05-17 Jakub Jelinek + + PR libstdc++/109883 + * include/c_global/cmath (atan2, fmod, pow): Move + __gnu_cxx::__promote_2 using templates after _Float{16,32,64,128} and + __gnu_cxx::__bfloat16_t overloads. + (copysign, fdim, fmax, fmin, hypot, nextafter, remainder, remquo): + Likewise. + (fma): Move __gnu_cxx::__promote_3 using template after + _Float{16,32,64,128} and __gnu_cxx::__bfloat16_t overloads. + +2023-05-17 Jonathan Wakely + + * testsuite/18_support/headers/limits/synopsis.cc: Uncomment + checks for float_round_style and float_denorm_style. + +2023-05-17 Jonathan Wakely + + * include/bits/c++config: Add system_header pragma. + +2023-05-17 Jonathan Wakely + + * include/std/expected (expected::and_then, expected::or_else) + (expected::transform, expected::transform_error): Fix exception + specifications as per LWG 3877. + (expected::and_then, expected::transform): + Likewise. + * testsuite/20_util/expected/lwg3877.cc: New test. + +2023-05-17 Ken Matsui + + * include/std/type_traits: Use __bool_constant instead of + integral_constant. + +2023-05-17 Jonathan Wakely + + * configure: Regenerate. + 2023-05-16 Jonathan Wakely PR libstdc++/109741