From fda935a2da8e5c3c371fc44977bd9083c18d8423 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Mon, 5 Apr 2004 18:41:19 +0200 Subject: [PATCH] PR optimization/13424 (hppa), bootstrap/14462, c/14828 PR optimization/13424 (hppa), bootstrap/14462, c/14828 * pa.md: Use replace_equiv_address to retain the attributes of the memory operands used in the split and peephole2 patterns for optimizing the pre-reload movstrsi, movstrdi, clrstrsi and clrstrdi patterns. Co-Authored-By: John David Anglin From-SVN: r80433 --- gcc/ChangeLog | 8 ++ gcc/config/pa/pa.md | 276 +++++++++++++++++++++++++++----------------- 2 files changed, 180 insertions(+), 104 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4c20840d28a..db54eaa3932 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2004-04-05 Jakub Jelinek + John David Anglin + + PR optimization/13424 (hppa), bootstrap/14462, c/14828 + * pa.md: Use replace_equiv_address to retain the attributes of the + memory operands used in the split and peephole2 patterns for optimizing + the pre-reload movstrsi, movstrdi, clrstrsi and clrstrdi patterns. + 2004-04-05 Richard Kenner * c-decl.c (build_compound_literal): Use TYPE_READONLY. diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index f13a7a84a88..96355248d22 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -3206,8 +3206,8 @@ [(set_attr "type" "multi,multi")]) (define_split - [(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" "")) - (mem:BLK (match_operand:SI 1 "register_operand" ""))) + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") + (match_operand:BLK 1 "memory_operand" "")) (clobber (match_operand:SI 2 "register_operand" "")) (clobber (match_operand:SI 3 "register_operand" "")) (clobber (match_operand:SI 6 "register_operand" "")) @@ -3215,32 +3215,14 @@ (clobber (match_operand:SI 8 "register_operand" "")) (use (match_operand:SI 4 "arith_operand" "")) (use (match_operand:SI 5 "const_int_operand" ""))])] - "!TARGET_64BIT && reload_completed && !flag_peephole2" - [(set (match_dup 7) (match_dup 0)) - (set (match_dup 8) (match_dup 1)) - (parallel [(set (mem:BLK (match_dup 7)) (mem:BLK (match_dup 8))) - (clobber (match_dup 2)) - (clobber (match_dup 3)) - (clobber (match_dup 6)) - (clobber (match_dup 7)) - (clobber (match_dup 8)) - (use (match_dup 4)) - (use (match_dup 5)) - (const_int 0)])] - "") - -(define_peephole2 - [(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" "")) - (mem:BLK (match_operand:SI 1 "register_operand" ""))) - (clobber (match_operand:SI 2 "register_operand" "")) - (clobber (match_operand:SI 3 "register_operand" "")) - (clobber (match_operand:SI 6 "register_operand" "")) - (clobber (match_operand:SI 7 "register_operand" "")) - (clobber (match_operand:SI 8 "register_operand" "")) - (use (match_operand:SI 4 "arith_operand" "")) - (use (match_operand:SI 5 "const_int_operand" ""))])] - "!TARGET_64BIT" - [(parallel [(set (mem:BLK (match_dup 7)) (mem:BLK (match_dup 8))) + "!TARGET_64BIT && reload_completed && !flag_peephole2 + && GET_CODE (operands[0]) == MEM + && register_operand (XEXP (operands[0], 0), SImode) + && GET_CODE (operands[1]) == MEM + && register_operand (XEXP (operands[1], 0), SImode)" + [(set (match_dup 7) (match_dup 9)) + (set (match_dup 8) (match_dup 10)) + (parallel [(set (match_dup 0) (match_dup 1)) (clobber (match_dup 2)) (clobber (match_dup 3)) (clobber (match_dup 6)) @@ -3251,15 +3233,55 @@ (const_int 0)])] " { - if (dead_or_set_p (curr_insn, operands[0])) - operands[7] = operands[0]; - else - emit_insn (gen_rtx_SET (VOIDmode, operands[7], operands[0])); + operands[9] = XEXP (operands[0], 0); + operands[10] = XEXP (operands[1], 0); + operands[0] = replace_equiv_address (operands[0], operands[7]); + operands[1] = replace_equiv_address (operands[1], operands[8]); +}") - if (dead_or_set_p (curr_insn, operands[1])) - operands[8] = operands[1]; +(define_peephole2 + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") + (match_operand:BLK 1 "memory_operand" "")) + (clobber (match_operand:SI 2 "register_operand" "")) + (clobber (match_operand:SI 3 "register_operand" "")) + (clobber (match_operand:SI 6 "register_operand" "")) + (clobber (match_operand:SI 7 "register_operand" "")) + (clobber (match_operand:SI 8 "register_operand" "")) + (use (match_operand:SI 4 "arith_operand" "")) + (use (match_operand:SI 5 "const_int_operand" ""))])] + "!TARGET_64BIT + && GET_CODE (operands[0]) == MEM + && register_operand (XEXP (operands[0], 0), SImode) + && GET_CODE (operands[1]) == MEM + && register_operand (XEXP (operands[1], 0), SImode)" + [(parallel [(set (match_dup 0) (match_dup 1)) + (clobber (match_dup 2)) + (clobber (match_dup 3)) + (clobber (match_dup 6)) + (clobber (match_dup 7)) + (clobber (match_dup 8)) + (use (match_dup 4)) + (use (match_dup 5)) + (const_int 0)])] + " +{ + rtx addr = XEXP (operands[0], 0); + if (dead_or_set_p (curr_insn, addr)) + operands[7] = addr; else - emit_insn (gen_rtx_SET (VOIDmode, operands[8], operands[1])); + { + emit_insn (gen_rtx_SET (VOIDmode, operands[7], addr)); + operands[0] = replace_equiv_address (operands[0], operands[7]); + } + + addr = XEXP (operands[1], 0); + if (dead_or_set_p (curr_insn, addr)) + operands[8] = addr; + else + { + emit_insn (gen_rtx_SET (VOIDmode, operands[8], addr)); + operands[1] = replace_equiv_address (operands[1], operands[8]); + } }") (define_insn "movstrsi_postreload" @@ -3372,8 +3394,8 @@ [(set_attr "type" "multi,multi")]) (define_split - [(parallel [(set (mem:BLK (match_operand:DI 0 "register_operand" "")) - (mem:BLK (match_operand:DI 1 "register_operand" ""))) + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") + (match_operand:BLK 1 "memory_operand" "")) (clobber (match_operand:DI 2 "register_operand" "")) (clobber (match_operand:DI 3 "register_operand" "")) (clobber (match_operand:DI 6 "register_operand" "")) @@ -3381,32 +3403,14 @@ (clobber (match_operand:DI 8 "register_operand" "")) (use (match_operand:DI 4 "arith_operand" "")) (use (match_operand:DI 5 "const_int_operand" ""))])] - "TARGET_64BIT && reload_completed && !flag_peephole2" - [(set (match_dup 7) (match_dup 0)) - (set (match_dup 8) (match_dup 1)) - (parallel [(set (mem:BLK (match_dup 7)) (mem:BLK (match_dup 8))) - (clobber (match_dup 2)) - (clobber (match_dup 3)) - (clobber (match_dup 6)) - (clobber (match_dup 7)) - (clobber (match_dup 8)) - (use (match_dup 4)) - (use (match_dup 5)) - (const_int 0)])] - "") - -(define_peephole2 - [(parallel [(set (mem:BLK (match_operand:DI 0 "register_operand" "")) - (mem:BLK (match_operand:DI 1 "register_operand" ""))) - (clobber (match_operand:DI 2 "register_operand" "")) - (clobber (match_operand:DI 3 "register_operand" "")) - (clobber (match_operand:DI 6 "register_operand" "")) - (clobber (match_operand:DI 7 "register_operand" "")) - (clobber (match_operand:DI 8 "register_operand" "")) - (use (match_operand:DI 4 "arith_operand" "")) - (use (match_operand:DI 5 "const_int_operand" ""))])] - "TARGET_64BIT" - [(parallel [(set (mem:BLK (match_dup 7)) (mem:BLK (match_dup 8))) + "TARGET_64BIT && reload_completed && !flag_peephole2 + && GET_CODE (operands[0]) == MEM + && register_operand (XEXP (operands[0], 0), DImode) + && GET_CODE (operands[1]) == MEM + && register_operand (XEXP (operands[1], 0), DImode)" + [(set (match_dup 7) (match_dup 9)) + (set (match_dup 8) (match_dup 10)) + (parallel [(set (match_dup 0) (match_dup 1)) (clobber (match_dup 2)) (clobber (match_dup 3)) (clobber (match_dup 6)) @@ -3417,15 +3421,55 @@ (const_int 0)])] " { - if (dead_or_set_p (curr_insn, operands[0])) - operands[7] = operands[0]; - else - emit_insn (gen_rtx_SET (VOIDmode, operands[7], operands[0])); + operands[9] = XEXP (operands[0], 0); + operands[10] = XEXP (operands[1], 0); + operands[0] = replace_equiv_address (operands[0], operands[7]); + operands[1] = replace_equiv_address (operands[1], operands[8]); +}") - if (dead_or_set_p (curr_insn, operands[1])) - operands[8] = operands[1]; +(define_peephole2 + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") + (match_operand:BLK 1 "memory_operand" "")) + (clobber (match_operand:DI 2 "register_operand" "")) + (clobber (match_operand:DI 3 "register_operand" "")) + (clobber (match_operand:DI 6 "register_operand" "")) + (clobber (match_operand:DI 7 "register_operand" "")) + (clobber (match_operand:DI 8 "register_operand" "")) + (use (match_operand:DI 4 "arith_operand" "")) + (use (match_operand:DI 5 "const_int_operand" ""))])] + "TARGET_64BIT + && GET_CODE (operands[0]) == MEM + && register_operand (XEXP (operands[0], 0), DImode) + && GET_CODE (operands[1]) == MEM + && register_operand (XEXP (operands[1], 0), DImode)" + [(parallel [(set (match_dup 0) (match_dup 1)) + (clobber (match_dup 2)) + (clobber (match_dup 3)) + (clobber (match_dup 6)) + (clobber (match_dup 7)) + (clobber (match_dup 8)) + (use (match_dup 4)) + (use (match_dup 5)) + (const_int 0)])] + " +{ + rtx addr = XEXP (operands[0], 0); + if (dead_or_set_p (curr_insn, addr)) + operands[7] = addr; else - emit_insn (gen_rtx_SET (VOIDmode, operands[8], operands[1])); + { + emit_insn (gen_rtx_SET (VOIDmode, operands[7], addr)); + operands[0] = replace_equiv_address (operands[0], operands[7]); + } + + addr = XEXP (operands[1], 0); + if (dead_or_set_p (curr_insn, addr)) + operands[8] = addr; + else + { + emit_insn (gen_rtx_SET (VOIDmode, operands[8], addr)); + operands[1] = replace_equiv_address (operands[1], operands[8]); + } }") (define_insn "movstrdi_postreload" @@ -3491,31 +3535,17 @@ [(set_attr "type" "multi,multi")]) (define_split - [(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" "")) + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") (const_int 0)) (clobber (match_operand:SI 1 "register_operand" "")) (clobber (match_operand:SI 4 "register_operand" "")) (use (match_operand:SI 2 "arith_operand" "")) (use (match_operand:SI 3 "const_int_operand" ""))])] - "!TARGET_64BIT && reload_completed && !flag_peephole2" - [(set (match_dup 4) (match_dup 0)) - (parallel [(set (mem:BLK (match_dup 4)) (const_int 0)) - (clobber (match_dup 1)) - (clobber (match_dup 4)) - (use (match_dup 2)) - (use (match_dup 3)) - (const_int 0)])] - "") - -(define_peephole2 - [(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" "")) - (const_int 0)) - (clobber (match_operand:SI 1 "register_operand" "")) - (clobber (match_operand:SI 4 "register_operand" "")) - (use (match_operand:SI 2 "arith_operand" "")) - (use (match_operand:SI 3 "const_int_operand" ""))])] - "!TARGET_64BIT" - [(parallel [(set (mem:BLK (match_dup 4)) (const_int 0)) + "!TARGET_64BIT && reload_completed && !flag_peephole2 + && GET_CODE (operands[0]) == MEM + && register_operand (XEXP (operands[0], 0), SImode)" + [(set (match_dup 4) (match_dup 5)) + (parallel [(set (match_dup 0) (const_int 0)) (clobber (match_dup 1)) (clobber (match_dup 4)) (use (match_dup 2)) @@ -3523,10 +3553,36 @@ (const_int 0)])] " { - if (dead_or_set_p (curr_insn, operands[0])) - operands[4] = operands[0]; + operands[5] = XEXP (operands[0], 0); + operands[0] = replace_equiv_address (operands[0], operands[4]); +}") + +(define_peephole2 + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") + (const_int 0)) + (clobber (match_operand:SI 1 "register_operand" "")) + (clobber (match_operand:SI 4 "register_operand" "")) + (use (match_operand:SI 2 "arith_operand" "")) + (use (match_operand:SI 3 "const_int_operand" ""))])] + "!TARGET_64BIT + && GET_CODE (operands[0]) == MEM + && register_operand (XEXP (operands[0], 0), SImode)" + [(parallel [(set (match_dup 0) (const_int 0)) + (clobber (match_dup 1)) + (clobber (match_dup 4)) + (use (match_dup 2)) + (use (match_dup 3)) + (const_int 0)])] + " +{ + rtx addr = XEXP (operands[0], 0); + if (dead_or_set_p (curr_insn, addr)) + operands[4] = addr; else - emit_insn (gen_rtx_SET (VOIDmode, operands[4], operands[0])); + { + emit_insn (gen_rtx_SET (VOIDmode, operands[4], addr)); + operands[0] = replace_equiv_address (operands[0], operands[4]); + } }") (define_insn "clrstrsi_postreload" @@ -3589,31 +3645,39 @@ [(set_attr "type" "multi,multi")]) (define_split - [(parallel [(set (mem:BLK (match_operand:DI 0 "register_operand" "")) + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") (const_int 0)) (clobber (match_operand:DI 1 "register_operand" "")) (clobber (match_operand:DI 4 "register_operand" "")) (use (match_operand:DI 2 "arith_operand" "")) (use (match_operand:DI 3 "const_int_operand" ""))])] - "TARGET_64BIT && reload_completed && !flag_peephole2" - [(set (match_dup 4) (match_dup 0)) - (parallel [(set (mem:BLK (match_dup 4)) (const_int 0)) + "TARGET_64BIT && reload_completed && !flag_peephole2 + && GET_CODE (operands[0]) == MEM + && register_operand (XEXP (operands[0], 0), DImode)" + [(set (match_dup 4) (match_dup 5)) + (parallel [(set (match_dup 0) (const_int 0)) (clobber (match_dup 1)) (clobber (match_dup 4)) (use (match_dup 2)) (use (match_dup 3)) (const_int 0)])] - "") + " +{ + operands[5] = XEXP (operands[0], 0); + operands[0] = replace_equiv_address (operands[0], operands[4]); +}") (define_peephole2 - [(parallel [(set (mem:BLK (match_operand:DI 0 "register_operand" "")) + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") (const_int 0)) (clobber (match_operand:DI 1 "register_operand" "")) (clobber (match_operand:DI 4 "register_operand" "")) (use (match_operand:DI 2 "arith_operand" "")) (use (match_operand:DI 3 "const_int_operand" ""))])] - "TARGET_64BIT" - [(parallel [(set (mem:BLK (match_dup 4)) (const_int 0)) + "TARGET_64BIT + && GET_CODE (operands[0]) == MEM + && register_operand (XEXP (operands[0], 0), DImode)" + [(parallel [(set (match_dup 0) (const_int 0)) (clobber (match_dup 1)) (clobber (match_dup 4)) (use (match_dup 2)) @@ -3621,10 +3685,14 @@ (const_int 0)])] " { - if (dead_or_set_p (curr_insn, operands[0])) - operands[4] = operands[0]; + rtx addr = XEXP (operands[0], 0); + if (dead_or_set_p (curr_insn, addr)) + operands[4] = addr; else - emit_insn (gen_rtx_SET (VOIDmode, operands[4], operands[0])); + { + emit_insn (gen_rtx_SET (VOIDmode, operands[4], addr)); + operands[0] = replace_equiv_address (operands[0], operands[4]); + } }") (define_insn "clrstrdi_postreload"