h8300-protos.h: Add prototypes for incdec_operand and eqne_operator.
* config/h8300/h8300-protos.h: Add prototypes for incdec_operand and eqne_operator. * config/h8300/h8300.c (incdec_operand): New. (eqne_operator): Likewise. * config/h8300/h8300.h (CONST_OK_FOR_M): Likewise. (CONST_OK_FOR_O): Likewise. (CONST_OK_FOR_LETTER_P): Use CONST_OK_FOR_M and CONST_OK_FOR_O. * config/h8300/h8300.md (UNSPEC_INCDEC): New. (addhi3_incdec): New. (addsi3_incdec): Likewise. (two peepholes): Likewise. From-SVN: r60375
This commit is contained in:
Kazu Hirata
Kazu Hirata
parent
b47900aa0b
commit
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5 changed files with 135 additions and 0 deletions
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@ -1,3 +1,18 @@
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2002-12-20 Kazu Hirata <kazu@cs.umass.edu>
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* config/h8300/h8300-protos.h: Add prototypes for
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incdec_operand and eqne_operator.
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* config/h8300/h8300.c (incdec_operand): New.
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(eqne_operator): Likewise.
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* config/h8300/h8300.h (CONST_OK_FOR_M): Likewise.
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(CONST_OK_FOR_O): Likewise.
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(CONST_OK_FOR_LETTER_P): Use CONST_OK_FOR_M and
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CONST_OK_FOR_O.
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* config/h8300/h8300.md (UNSPEC_INCDEC): New.
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(addhi3_incdec): New.
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(addsi3_incdec): Likewise.
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(two peepholes): Likewise.
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2002-12-20 Kazu Hirata <kazu@cs.umass.edu>
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* config/h8300/h8300.c (dosize): Remove warnings.
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@ -59,8 +59,10 @@ extern int small_call_insn_operand PARAMS ((rtx, enum machine_mode));
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extern int jump_address_operand PARAMS ((rtx, enum machine_mode));
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extern int bit_operand PARAMS ((rtx, enum machine_mode));
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extern int bit_memory_operand PARAMS ((rtx, enum machine_mode));
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extern int incdec_operand PARAMS ((rtx, enum machine_mode));
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extern int bit_operator PARAMS ((rtx, enum machine_mode));
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extern int nshift_operator PARAMS ((rtx, enum machine_mode));
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extern int eqne_operator PARAMS ((rtx, enum machine_mode));
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extern int h8300_eightbit_constant_address_p PARAMS ((rtx));
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extern int h8300_tiny_constant_address_p PARAMS ((rtx));
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@ -1806,6 +1806,30 @@ notice_update_cc (body, insn)
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}
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}
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/* Return nonzero if X is a constant suitable for inc/dec. */
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int
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incdec_operand (x, mode)
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rtx x;
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enum machine_mode mode ATTRIBUTE_UNUSED;
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{
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return (GET_CODE (x) == CONST_INT
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&& (CONST_OK_FOR_M (INTVAL (x))
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|| CONST_OK_FOR_O (INTVAL (x))));
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}
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/* Return nonzero if X is either EQ or NE. */
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int
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eqne_operator (x, mode)
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rtx x;
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enum machine_mode mode ATTRIBUTE_UNUSED;
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{
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enum rtx_code code = GET_CODE (x);
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return (code == EQ || code == NE);
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}
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/* Recognize valid operators for bit instructions. */
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int
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@ -466,16 +466,22 @@ enum reg_class {
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(TARGET_H8300H || TARGET_H8300S \
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? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 4 \
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: (VALUE) == 1 || (VALUE) == 2)
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#define CONST_OK_FOR_M(VALUE) \
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((VALUE) == 1 || (VALUE) == 2)
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#define CONST_OK_FOR_N(VALUE) \
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(TARGET_H8300H || TARGET_H8300S \
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? (VALUE) == -1 || (VALUE) == -2 || (VALUE) == -4 \
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: (VALUE) == -1 || (VALUE) == -2)
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#define CONST_OK_FOR_O(VALUE) \
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((VALUE) == -1 || (VALUE) == -2)
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#define CONST_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
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(C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
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(C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
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(C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
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(C) == 'N' ? CONST_OK_FOR_N (VALUE) : \
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(C) == 'O' ? CONST_OK_FOR_O (VALUE) : \
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0)
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/* Similar, but for floating constants, and defining letters G and H.
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@ -50,6 +50,9 @@
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;; CONSTANTS
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;; ----------------------------------------------------------------------
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(define_constants
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[(UNSPEC_INCDEC 0)])
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(define_constants
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[(SC_REG 3)
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(FP_REG 6)
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@ -794,6 +797,18 @@
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[(set_attr "length" "2,2,2,4,2")
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(set_attr "cc" "none_0hit,none_0hit,clobber,set_zn,set_zn")])
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(define_insn "addhi3_incdec"
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[(set (match_operand:HI 0 "register_operand" "=r,r")
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(unspec:HI [(match_operand:HI 1 "register_operand" "0,0")
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(match_operand:HI 2 "incdec_operand" "M,O")]
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UNSPEC_INCDEC))]
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"TARGET_H8300H || TARGET_H8300S"
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"@
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inc.w %2,%T0
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dec.w %G2,%T0"
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[(set_attr "length" "2,2")
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(set_attr "cc" "set_zn,set_zn")])
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(define_split
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[(set (match_operand:HI 0 "register_operand" "")
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(plus:HI (match_dup 0)
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@ -834,6 +849,18 @@
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[(set_attr "length" "2,2,6,2")
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(set_attr "cc" "none_0hit,none_0hit,set_zn,set_zn")])
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(define_insn "addsi3_incdec"
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[(set (match_operand:SI 0 "register_operand" "=r,r")
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(unspec:SI [(match_operand:SI 1 "register_operand" "0,0")
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(match_operand:SI 2 "incdec_operand" "M,O")]
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UNSPEC_INCDEC))]
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"TARGET_H8300H || TARGET_H8300S"
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"@
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inc.l %2,%S0
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dec.l %G2,%S0"
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[(set_attr "length" "2,2")
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(set_attr "cc" "set_zn,set_zn")])
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(define_split
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[(set (match_operand:SI 0 "register_operand" "")
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(plus:SI (match_dup 0)
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@ -2784,3 +2811,64 @@
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(plus:SI (match_dup 0)
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(match_dup 1)))]
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"")
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;; Turn
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;;
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;; subs #1,er4
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;; mov.w r4,r4
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;; bne .L2028
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;;
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;; into
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;;
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;; dec.w #1,r4
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;; bne .L2028
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(define_peephole2
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[(set (match_operand:HI 0 "register_operand" "")
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(plus:HI (match_dup 0)
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(match_operand 1 "incdec_operand" "")))
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(set (cc0)
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(match_dup 0))
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(set (pc)
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(if_then_else (match_operator 3 "eqne_operator"
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[(cc0) (const_int 0)])
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(label_ref (match_operand 2 "" ""))
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(pc)))]
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"TARGET_H8300H || TARGET_H8300S"
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[(set (match_operand:HI 0 "register_operand" "")
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(unspec:HI [(match_dup 0)
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(match_dup 1)]
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UNSPEC_INCDEC))
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(set (cc0)
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(match_dup 0))
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(set (pc)
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(if_then_else (match_op_dup 3 [(cc0) (const_int 0)])
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(label_ref (match_dup 2))
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(pc)))]
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"")
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;; The SImode version of the previous pattern.
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(define_peephole2
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[(set (match_operand:SI 0 "register_operand" "")
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(plus:SI (match_dup 0)
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(match_operand 1 "incdec_operand" "")))
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(set (cc0)
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(match_dup 0))
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(set (pc)
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(if_then_else (match_operator 3 "eqne_operator"
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[(cc0) (const_int 0)])
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(label_ref (match_operand 2 "" ""))
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(pc)))]
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"TARGET_H8300H || TARGET_H8300S"
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[(set (match_operand:SI 0 "register_operand" "")
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(unspec:SI [(match_dup 0)
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(match_dup 1)]
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UNSPEC_INCDEC))
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(set (cc0)
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(match_dup 0))
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(set (pc)
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(if_then_else (match_op_dup 3 [(cc0) (const_int 0)])
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(label_ref (match_dup 2))
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(pc)))]
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"")
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