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sse.md (vec_initv4sf): Removed.

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2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/sse.md (vec_initv4sf): Removed.
	(vec_initv2df): Likewise.
	(vec_initv2di): Likewise.
	(vec_initv4si): Likewise.
	(vec_initv8hi): Likewise.
	(vec_initv16qi): Likewise.
	(vec_init<mode>): New.

From-SVN: r135724
This commit is contained in:
H.J. Lu 2008-05-21 16:56:14 +00:00 • committed by H.J. Lu
parent 31579a2211
commit f8caa3a86c
2 changed files with 12 additions and 47 deletions
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10
gcc/ChangeLog
View file

@ -1,3 +1,13 @@
2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/sse.md (vec_initv4sf): Removed.
(vec_initv2df): Likewise.
(vec_initv2di): Likewise.
(vec_initv4si): Likewise.
(vec_initv8hi): Likewise.
(vec_initv16qi): Likewise.
(vec_init<mode>): New.
2008-05-21 Joseph Myers <joseph@codesourcery.com>
* collect2.c (find_a_file): Use IS_ABSOLUTE_PATH.

49
gcc/config/i386/sse.md
View file

@ -2304,8 +2304,8 @@
[(set_attr "type" "ssemov")
(set_attr "mode" "V4SF,V2SF")])
(define_expand "vec_initv4sf"
[(match_operand:V4SF 0 "register_operand" "")
(define_expand "vec_init<mode>"
[(match_operand:SSEMODE 0 "register_operand" "")
(match_operand 1 "" "")]
"TARGET_SSE"
{
@ -2808,15 +2808,6 @@
DONE;
})
(define_expand "vec_initv2df"
[(match_operand:V2DF 0 "register_operand" "")
(match_operand 1 "" "")]
"TARGET_SSE"
{
ix86_expand_vector_init (false, operands[0], operands[1]);
DONE;
})
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Parallel integral arithmetic
@ -4952,15 +4943,6 @@
DONE;
})
(define_expand "vec_initv2di"
[(match_operand:V2DI 0 "register_operand" "")
(match_operand 1 "" "")]
"TARGET_SSE"
{
ix86_expand_vector_init (false, operands[0], operands[1]);
DONE;
})
(define_expand "vec_setv4si"
[(match_operand:V4SI 0 "register_operand" "")
(match_operand:SI 1 "register_operand" "")
@ -4983,15 +4965,6 @@
DONE;
})
(define_expand "vec_initv4si"
[(match_operand:V4SI 0 "register_operand" "")
(match_operand 1 "" "")]
"TARGET_SSE"
{
ix86_expand_vector_init (false, operands[0], operands[1]);
DONE;
})
(define_expand "vec_setv8hi"
[(match_operand:V8HI 0 "register_operand" "")
(match_operand:HI 1 "register_operand" "")
@ -5014,15 +4987,6 @@
DONE;
})
(define_expand "vec_initv8hi"
[(match_operand:V8HI 0 "register_operand" "")
(match_operand 1 "" "")]
"TARGET_SSE"
{
ix86_expand_vector_init (false, operands[0], operands[1]);
DONE;
})
(define_expand "vec_setv16qi"
[(match_operand:V16QI 0 "register_operand" "")
(match_operand:QI 1 "register_operand" "")
@ -5045,15 +5009,6 @@
DONE;
})
(define_expand "vec_initv16qi"
[(match_operand:V16QI 0 "register_operand" "")
(match_operand 1 "" "")]
"TARGET_SSE"
{
ix86_expand_vector_init (false, operands[0], operands[1]);
DONE;
})
(define_expand "vec_unpacku_hi_v16qi"
[(match_operand:V8HI 0 "register_operand" "")
(match_operand:V16QI 1 "register_operand" "")]