[ARM] Add ACLE intrinsics vqrdmlah_lane and vqrdmlsh_lane
* config/arm/arm_neon.h (vqrdmlahq_lane_s16): New. (vqrdmlahq_lane_s32): New. (vqrdmlah_lane_s16): New. (vqrdmlah_lane_s32): New. (vqrdmlshq_lane_s16): New. (vqrdmlshq_lane_s32): New. (vqrdmlsh_lane_s16): New. (vqrdmlsh_lane_s32): New. * config/arm/arm_neon_builtins.def: Add "vqrdmlah_lane" and "vqrdmlsh_lane". From-SVN: r231686
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@ -1,3 +1,16 @@
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2015-12-16 Matthew Wahab <matthew.wahab@arm.com>
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* config/arm/arm_neon.h (vqrdmlahq_lane_s16): New.
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(vqrdmlahq_lane_s32): New.
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(vqrdmlah_lane_s16): New.
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(vqrdmlah_lane_s32): New.
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(vqrdmlshq_lane_s16): New.
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(vqrdmlshq_lane_s32): New.
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(vqrdmlsh_lane_s16): New.
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(vqrdmlsh_lane_s32): New.
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* config/arm/arm_neon_builtins.def: Add "vqrdmlah_lane" and
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"vqrdmlsh_lane".
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2015-12-16 Matthew Wahab <matthew.wahab@arm.com>
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* config/arm/arm_neon.h (vqrdmlah_s16, vqrdmlah_s32): New.
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@ -7096,6 +7096,56 @@ vqrdmulh_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
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return (int32x2_t)__builtin_neon_vqrdmulh_lanev2si (__a, __b, __c);
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}
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#ifdef __ARM_FEATURE_QRDMX
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__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
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vqrdmlahq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
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{
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return (int16x8_t)__builtin_neon_vqrdmlah_lanev8hi (__a, __b, __c, __d);
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}
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__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
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vqrdmlahq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
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{
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return (int32x4_t)__builtin_neon_vqrdmlah_lanev4si (__a, __b, __c, __d);
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}
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__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
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vqrdmlah_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
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{
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return (int16x4_t)__builtin_neon_vqrdmlah_lanev4hi (__a, __b, __c, __d);
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}
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__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
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vqrdmlah_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
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{
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return (int32x2_t)__builtin_neon_vqrdmlah_lanev2si (__a, __b, __c, __d);
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}
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__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
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vqrdmlshq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
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{
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return (int16x8_t)__builtin_neon_vqrdmlsh_lanev8hi (__a, __b, __c, __d);
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}
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__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
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vqrdmlshq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
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{
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return (int32x4_t)__builtin_neon_vqrdmlsh_lanev4si (__a, __b, __c, __d);
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}
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__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
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vqrdmlsh_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
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{
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return (int16x4_t)__builtin_neon_vqrdmlsh_lanev4hi (__a, __b, __c, __d);
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}
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__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
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vqrdmlsh_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
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{
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return (int32x2_t)__builtin_neon_vqrdmlsh_lanev2si (__a, __b, __c, __d);
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}
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#endif
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__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
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vmul_n_s16 (int16x4_t __a, int16_t __b)
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{
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@ -60,6 +60,8 @@ VAR4 (BINOP, vqdmulh_n, v4hi, v2si, v8hi, v4si)
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VAR4 (BINOP, vqrdmulh_n, v4hi, v2si, v8hi, v4si)
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VAR4 (SETLANE, vqdmulh_lane, v4hi, v2si, v8hi, v4si)
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VAR4 (SETLANE, vqrdmulh_lane, v4hi, v2si, v8hi, v4si)
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VAR4 (MAC_LANE, vqrdmlah_lane, v4hi, v2si, v8hi, v4si)
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VAR4 (MAC_LANE, vqrdmlsh_lane, v4hi, v2si, v8hi, v4si)
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VAR2 (BINOP, vqdmull, v4hi, v2si)
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VAR8 (BINOP, vshls, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (BINOP, vshlu, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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