[ARM] Add ACLE intrinsics vqrdmlah_lane and vqrdmlsh_lane

* config/arm/arm_neon.h (vqrdmlahq_lane_s16): New.
	(vqrdmlahq_lane_s32): New.
	(vqrdmlah_lane_s16): New.
	(vqrdmlah_lane_s32): New.
	(vqrdmlshq_lane_s16): New.
	(vqrdmlshq_lane_s32): New.
	(vqrdmlsh_lane_s16): New.
	(vqrdmlsh_lane_s32): New.
	* config/arm/arm_neon_builtins.def: Add "vqrdmlah_lane" and
	"vqrdmlsh_lane".

From-SVN: r231686
This commit is contained in:
Matthew Wahab 2015-12-16 12:21:47 +00:00 committed by Matthew Wahab
parent 7fcaba1a9a
commit f392980c83
3 changed files with 65 additions and 0 deletions

View file

@ -1,3 +1,16 @@
2015-12-16 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm_neon.h (vqrdmlahq_lane_s16): New.
(vqrdmlahq_lane_s32): New.
(vqrdmlah_lane_s16): New.
(vqrdmlah_lane_s32): New.
(vqrdmlshq_lane_s16): New.
(vqrdmlshq_lane_s32): New.
(vqrdmlsh_lane_s16): New.
(vqrdmlsh_lane_s32): New.
* config/arm/arm_neon_builtins.def: Add "vqrdmlah_lane" and
"vqrdmlsh_lane".
2015-12-16 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm_neon.h (vqrdmlah_s16, vqrdmlah_s32): New.

View file

@ -7096,6 +7096,56 @@ vqrdmulh_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
return (int32x2_t)__builtin_neon_vqrdmulh_lanev2si (__a, __b, __c);
}
#ifdef __ARM_FEATURE_QRDMX
__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
vqrdmlahq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
{
return (int16x8_t)__builtin_neon_vqrdmlah_lanev8hi (__a, __b, __c, __d);
}
__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
vqrdmlahq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
{
return (int32x4_t)__builtin_neon_vqrdmlah_lanev4si (__a, __b, __c, __d);
}
__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
vqrdmlah_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
{
return (int16x4_t)__builtin_neon_vqrdmlah_lanev4hi (__a, __b, __c, __d);
}
__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
vqrdmlah_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
{
return (int32x2_t)__builtin_neon_vqrdmlah_lanev2si (__a, __b, __c, __d);
}
__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
vqrdmlshq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
{
return (int16x8_t)__builtin_neon_vqrdmlsh_lanev8hi (__a, __b, __c, __d);
}
__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
vqrdmlshq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
{
return (int32x4_t)__builtin_neon_vqrdmlsh_lanev4si (__a, __b, __c, __d);
}
__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
vqrdmlsh_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
{
return (int16x4_t)__builtin_neon_vqrdmlsh_lanev4hi (__a, __b, __c, __d);
}
__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
vqrdmlsh_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
{
return (int32x2_t)__builtin_neon_vqrdmlsh_lanev2si (__a, __b, __c, __d);
}
#endif
__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
vmul_n_s16 (int16x4_t __a, int16_t __b)
{

View file

@ -60,6 +60,8 @@ VAR4 (BINOP, vqdmulh_n, v4hi, v2si, v8hi, v4si)
VAR4 (BINOP, vqrdmulh_n, v4hi, v2si, v8hi, v4si)
VAR4 (SETLANE, vqdmulh_lane, v4hi, v2si, v8hi, v4si)
VAR4 (SETLANE, vqrdmulh_lane, v4hi, v2si, v8hi, v4si)
VAR4 (MAC_LANE, vqrdmlah_lane, v4hi, v2si, v8hi, v4si)
VAR4 (MAC_LANE, vqrdmlsh_lane, v4hi, v2si, v8hi, v4si)
VAR2 (BINOP, vqdmull, v4hi, v2si)
VAR8 (BINOP, vshls, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
VAR8 (BINOP, vshlu, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)