FreeChainXenon/gcc
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

aarch64: add armv9-a to -march

Browse source 
gcc/ChangeLog:

	* config/aarch64/aarch64-arches.def (AARCH64_ARCH): Added
	armv9-a.
	* config/aarch64/aarch64.h (AARCH64_FL_V9): New.
	(AARCH64_FL_FOR_ARCH9): New flags for Armv9-A.
	(AARCH64_ISA_V9): New ISA flag.
	* doc/invoke.texi: Update docs.
This commit is contained in:
Przemyslaw Wirkus 2021-10-01 10:06:45 +01:00
parent d0abfa815a
commit f0688d42c9
3 changed files with 9 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
gcc/config/aarch64/aarch64-arches.def
View file

@ -39,5 +39,6 @@ AARCH64_ARCH("armv8.5-a", generic, 8_5A, 8, AARCH64_FL_FOR_ARCH8_5)
AARCH64_ARCH("armv8.6-a", generic, 8_6A, 8, AARCH64_FL_FOR_ARCH8_6)
AARCH64_ARCH("armv8.7-a", generic, 8_7A, 8, AARCH64_FL_FOR_ARCH8_7)
AARCH64_ARCH("armv8-r", generic, 8R , 8, AARCH64_FL_FOR_ARCH8_R)
AARCH64_ARCH("armv9-a", generic, 9A , 9, AARCH64_FL_FOR_ARCH9)
#undef AARCH64_ARCH

5
gcc/config/aarch64/aarch64.h
View file

@ -230,6 +230,8 @@ extern unsigned aarch64_architecture_version;
/* Pointer Authentication (PAUTH) extension. */
#define AARCH64_FL_PAUTH (1ULL << 40)
/* Armv9.0-A. */
#define AARCH64_FL_V9 (1ULL << 41) /* Armv9.0-A Architecture. */
/* 64-byte atomic load/store extensions. */
#define AARCH64_FL_LS64 (1ULL << 41)
@ -266,6 +268,8 @@ extern unsigned aarch64_architecture_version;
#define AARCH64_FL_FOR_ARCH8_R \
(AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_R)
#define AARCH64_FL_FOR_ARCH9 \
(AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_V9)
/* Macros to test ISA flags. */
@ -304,6 +308,7 @@ extern unsigned aarch64_architecture_version;
#define AARCH64_ISA_SB (aarch64_isa_flags & AARCH64_FL_SB)
#define AARCH64_ISA_V8_R (aarch64_isa_flags & AARCH64_FL_V8_R)
#define AARCH64_ISA_PAUTH (aarch64_isa_flags & AARCH64_FL_PAUTH)
#define AARCH64_ISA_V9 (aarch64_isa_flags & AARCH64_FL_V9)
/* Crypto is an optional extension to AdvSIMD. */
#define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO)

4
gcc/doc/invoke.texi
View file

@ -18570,7 +18570,8 @@ and the features that they enable by default:
@item @samp{armv8.4-a} @tab Armv8.4-A @tab @samp{armv8.3-a}, @samp{+flagm}, @samp{+fp16fml}, @samp{+dotprod}
@item @samp{armv8.5-a} @tab Armv8.5-A @tab @samp{armv8.4-a}, @samp{+sb}, @samp{+ssbs}, @samp{+predres}
@item @samp{armv8.6-a} @tab Armv8.6-A @tab @samp{armv8.5-a}, @samp{+bf16}, @samp{+i8mm}
@item @samp{armv8.7-a} @tab Armv8.7-a @tab @samp{armv8.6-a}, @samp{+ls64}
@item @samp{armv8.7-a} @tab Armv8.7-A @tab @samp{armv8.6-a}, @samp{+ls64}
@item @samp{armv9-a} @tab Armv9-A @tab @samp{armv8.5-a}, @samp{+sve}, @samp{+sve2}
@item @samp{armv8-r} @tab Armv8-R @tab @samp{armv8-r}
@end multitable
@ -19989,6 +19990,7 @@ Permissible names are:
@samp{armv8.4-a},
@samp{armv8.5-a},
@samp{armv8.6-a},
@samp{armv9-a},
@samp{armv7-r},
@samp{armv8-r},
@samp{armv6-m}, @samp{armv6s-m},