rs6000: Byte reverse V8HI on Power8 by vector rotation.

gcc/
	PR target/100866
	* config/rs6000/altivec.md: (*altivec_vrl<VI_char>): Named to...
	(altivec_vrl<VI_char>): ...this.
	* config/rs6000/vsx.md (revb_<mode>): Call vspltish and vrlh when
	target is Power8 and mode is V8HI.

gcc/testsuite/
	PR target/100866
	* gcc.target/powerpc/pr100866-2.c: New.
This commit is contained in:
Xionghu Luo 2022-10-12 10:43:38 +08:00 committed by Haochen Gui
parent 74e904bdca
commit eaba55ffef
3 changed files with 29 additions and 7 deletions

View file

@ -1875,7 +1875,7 @@
}
[(set_attr "type" "vecperm")])
(define_insn "*altivec_vrl<VI_char>"
(define_insn "altivec_vrl<VI_char>"
[(set (match_operand:VI2 0 "register_operand" "=v")
(rotate:VI2 (match_operand:VI2 1 "register_operand" "v")
(match_operand:VI2 2 "register_operand" "v")))]

View file

@ -6087,12 +6087,21 @@
emit_insn (gen_p9_xxbr<VSX_XXBR>_<mode> (operands[0], operands[1]));
else
{
/* Want to have the elements in reverse order relative
to the endian mode in use, i.e. in LE mode, put elements
in BE order. */
rtx sel = swap_endian_selector_for_mode(<MODE>mode);
emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1],
operands[1], sel));
if (<MODE>mode == V8HImode)
{
rtx splt = gen_reg_rtx (V8HImode);
emit_insn (gen_altivec_vspltish (splt, GEN_INT (8)));
emit_insn (gen_altivec_vrlh (operands[0], operands[1], splt));
}
else
{
/* Want to have the elements in reverse order relative
to the endian mode in use, i.e. in LE mode, put elements
in BE order. */
rtx sel = swap_endian_selector_for_mode (<MODE>mode);
emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1],
operands[1], sel));
}
}
DONE;

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@ -0,0 +1,13 @@
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_p8vector_ok } */
/* { dg-options "-O2 -mdejagnu-cpu=power8" } */
/* { dg-final { scan-assembler {\mvspltish\M} } } */
/* { dg-final { scan-assembler {\mvrlh\M} } } */
#include <altivec.h>
vector unsigned short revb(vector unsigned short a)
{
return vec_revb(a);
}