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aarch64: Fix C++ ICEs with _Float16 and __fp16 [PR107080]

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On Fri, Sep 30, 2022 at 09:54:49AM -0400, Jason Merrill wrote:
> > Note, there is one further problem on aarch64/arm, types with HFmode
> > (_Float16 and __fp16) are there mangled as Dh (which is standard
> > Itanium mangling:
> >                   ::= Dh # IEEE 754r half-precision floating point (16 bits)
> >                   ::= DF <number> _ # ISO/IEC TS 18661 binary floating point type _FloatN (N bits)
> > so in theory is also ok, but DF16_ is more specific.  Should we just
> > change Dh to DF16_ in those backends, or should __fp16 there be distinct
> > type from _Float16 where __fp16 would mangle Dh and _Float16 DF16_ ?
>
> You argued for keeping __float128 separate from _Float128, does the same
> argument not apply to this case?

Actually, they already were distinct types that just mangled the same.
So the same issue that had to be solved on i?86, ia64 and rs6000 for
_Float64x vs. long double is a problem on arm and aarch64 with _Float16
vs. __fp16.
The following patch fixes it so far for aarch64.

2022-09-30  Jakub Jelinek  <jakub@redhat.com>

	PR c++/107080
	* config/aarch64/aarch64.cc (aarch64_mangle_type): Mangle just __fp16
	as Dh and _Float16 as DF16_.

	* g++.target/aarch64/pr107080.C: New test.
This commit is contained in:
Jakub Jelinek 2022-09-30 19:52:49 +02:00
parent a6d8c61a49
commit e564021e4c
2 changed files with 21 additions and 0 deletions
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2
gcc/config/aarch64/aarch64.cc
View file

@ -20664,6 +20664,8 @@ aarch64_mangle_type (const_tree type)
/* Half-precision floating point types. */
if (TREE_CODE (type) == REAL_TYPE && TYPE_PRECISION (type) == 16)
{
if (TYPE_MAIN_VARIANT (type) == float16_type_node)
return NULL;
if (TYPE_MODE (type) == BFmode)
return "u6__bf16";
else

19
gcc/testsuite/g++.target/aarch64/pr107080.C Normal file
View file

@ -0,0 +1,19 @@
// PR c++/107080
// { dg-do compile }
// { dg-options "" }
template <typename T, typename T1>
int
foo (T x, T1 y)
{
return 3;
}
int
main ()
{
return (foo (0.0f16, 0.0f16) + foo (0.0f16, (__fp16) 0.0)) != 6;
}
// { dg-final { scan-assembler "_Z3fooIDF16_DF16_EiT_T0_" } }
// { dg-final { scan-assembler "_Z3fooIDF16_DhEiT_T0_" } }