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re PR target/29852 (x86_64: SSE version missing for fmod{d,s,x}f3)

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PR target/29852
	* config/i386/i386.md (*truncxfsf2_mixed, *truncxfdf2_mixed): Enable
	insn patterns for TARGET_80387.
	(*truncxfsf2_i387, *truncxfdf2_i387): Remove.
	(*truncxfsf2_i387_1): Rename to *truncxfsf2_i387.
	(*truncxfdf2_i387_1): Rename to *truncxfdf2_i387.
	(fmod<mode>3, remainder<mode>3): Enable expaders for SSE math.
	Generate truncxf<mode>2 insn patterns for strict SSE math.

From-SVN: r119356
This commit is contained in:
Uros Bizjak 2006-11-30 07:54:47 +01:00 • committed by Uros Bizjak
parent 8002331ec5
commit e26feb2c60
2 changed files with 33 additions and 48 deletions
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11
gcc/ChangeLog
View file

@ -1,3 +1,14 @@
2006-11-30 Uros Bizjak <ubizjak@gmail.com>
PR target/29852
* config/i386/i386.md (*truncxfsf2_mixed, *truncxfdf2_mixed): Enable
insn patterns for TARGET_80387.
(*truncxfsf2_i387, *truncxfdf2_i387): Remove.
(*truncxfsf2_i387_1): Rename to *truncxfsf2_i387.
(*truncxfdf2_i387_1): Rename to *truncxfdf2_i387.
(fmod<mode>3, remainder<mode>3): Enable expaders for SSE math.
Generate truncxf<mode>2 insn patterns for strict SSE math.
2006-11-30 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (movsf_1): Enable pattern for standard

70
gcc/config/i386/i386.md
View file

@ -3947,7 +3947,7 @@
(float_truncate:SF
(match_operand:XF 1 "register_operand" "f,f,f,f")))
(clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m"))]
"TARGET_MIX_SSE_I387"
"TARGET_80387"
{
gcc_assert (!which_alternative);
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
@ -3968,23 +3968,6 @@
(set_attr "mode" "SF")])
(define_insn "*truncxfsf2_i387"
[(set (match_operand:SF 0 "nonimmediate_operand" "=m,?f,?r")
(float_truncate:SF
(match_operand:XF 1 "register_operand" "f,f,f")))
(clobber (match_operand:SF 2 "memory_operand" "=X,m,m"))]
"TARGET_80387"
{
gcc_assert (!which_alternative);
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return "fstp%z0\t%y0";
else
return "fst%z0\t%y0";
}
[(set_attr "type" "fmov,multi,multi")
(set_attr "unit" "*,i387,i387")
(set_attr "mode" "SF")])
(define_insn "*truncxfsf2_i387_1"
[(set (match_operand:SF 0 "memory_operand" "=m")
(float_truncate:SF
(match_operand:XF 1 "register_operand" "f")))]
@ -4043,7 +4026,7 @@
(float_truncate:DF
(match_operand:XF 1 "register_operand" "f,f,f,f")))
(clobber (match_operand:DF 2 "memory_operand" "=X,m,m,m"))]
"TARGET_SSE2 && TARGET_MIX_SSE_I387"
"TARGET_80387"
{
gcc_assert (!which_alternative);
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
@ -4064,23 +4047,6 @@
(set_attr "mode" "DF")])
(define_insn "*truncxfdf2_i387"
[(set (match_operand:DF 0 "nonimmediate_operand" "=m,?f,?r")
(float_truncate:DF
(match_operand:XF 1 "register_operand" "f,f,f")))
(clobber (match_operand:DF 2 "memory_operand" "=X,m,m"))]
"TARGET_80387"
{
gcc_assert (!which_alternative);
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return "fstp%z0\t%y0";
else
return "fst%z0\t%y0";
}
[(set_attr "type" "fmov,multi,multi")
(set_attr "unit" "*,i387,i387")
(set_attr "mode" "DF")])
(define_insn "*truncxfdf2_i387_1"
[(set (match_operand:DF 0 "memory_operand" "=m")
(float_truncate:DF
(match_operand:XF 1 "register_operand" "f")))]
@ -15674,23 +15640,27 @@
[(use (match_operand:X87MODEF12 0 "register_operand" ""))
(use (match_operand:X87MODEF12 1 "general_operand" ""))
(use (match_operand:X87MODEF12 2 "general_operand" ""))]
"TARGET_USE_FANCY_MATH_387
&& (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
|| TARGET_MIX_SSE_I387)"
"TARGET_USE_FANCY_MATH_387"
{
rtx label = gen_label_rtx ();
rtx op1 = gen_reg_rtx (XFmode);
rtx op2 = gen_reg_rtx (XFmode);
emit_insn(gen_extend<mode>xf2 (op1, operands[1]));
emit_insn(gen_extend<mode>xf2 (op2, operands[2]));
emit_insn (gen_extend<mode>xf2 (op1, operands[1]));
emit_insn (gen_extend<mode>xf2 (op2, operands[2]));
emit_label (label);
emit_insn (gen_fpremxf4_i387 (op1, op2, op1, op2));
ix86_emit_fp_unordered_jump (label);
emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
/* Truncate the result properly for strict SSE math. */
if (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
&& !TARGET_MIX_SSE_I387)
emit_insn (gen_truncxf<mode>2 (operands[0], op1));
else
emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
DONE;
})
@ -15731,24 +15701,28 @@
[(use (match_operand:X87MODEF12 0 "register_operand" ""))
(use (match_operand:X87MODEF12 1 "general_operand" ""))
(use (match_operand:X87MODEF12 2 "general_operand" ""))]
"TARGET_USE_FANCY_MATH_387
&& (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
|| TARGET_MIX_SSE_I387)"
"TARGET_USE_FANCY_MATH_387"
{
rtx label = gen_label_rtx ();
rtx op1 = gen_reg_rtx (XFmode);
rtx op2 = gen_reg_rtx (XFmode);
emit_insn(gen_extend<mode>xf2 (op1, operands[1]));
emit_insn(gen_extend<mode>xf2 (op2, operands[2]));
emit_insn (gen_extend<mode>xf2 (op1, operands[1]));
emit_insn (gen_extend<mode>xf2 (op2, operands[2]));
emit_label (label);
emit_insn (gen_fprem1xf4_i387 (op1, op2, op1, op2));
ix86_emit_fp_unordered_jump (label);
emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
/* Truncate the result properly for strict SSE math. */
if (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
&& !TARGET_MIX_SSE_I387)
emit_insn (gen_truncxf<mode>2 (operands[0], op1));
else
emit_insn (gen_truncxf<mode>2_i387_noop_unspec (operands[0], op1));
DONE;
})