FreeChainXenon/gcc
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

aarch64: Add command-line support for Armv8.7-a

Browse source 
This patch adds support for -march=armv8.7-a in GCC.
It adds the +ls64 extension that's included in this architecture revision.
Currently this is just the command-line option and +ls64 allows the relevant instructions
to be used in inline assembly. The ACLE defines some intrinsics for them but those can be
added separately later (together with the appropriate __ARM_FEATURE_* predefine).

2021-09-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64.h (AARCH64_FL_LS64): Define
	(AARCH64_FL_V8_7): Likewise.
	(AARCH64_FL_FOR_ARCH8_7): Likewise.
	* config/aarch64/aarch64-arches.def (armv8.7-a): Define.
	* config/aarch64/aarch64-option-extensions.def (ls64): Define.
	* doc/invoke.texi: Document the above.
This commit is contained in:
Kyrylo Tkachov 2021-09-28 16:13:26 +01:00
parent 0400ca17f3
commit e159c0aa10
4 changed files with 17 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
gcc/config/aarch64/aarch64-arches.def
View file

@ -37,6 +37,7 @@ AARCH64_ARCH("armv8.3-a", generic, 8_3A, 8, AARCH64_FL_FOR_ARCH8_3)
AARCH64_ARCH("armv8.4-a", generic, 8_4A, 8, AARCH64_FL_FOR_ARCH8_4)
AARCH64_ARCH("armv8.5-a", generic, 8_5A, 8, AARCH64_FL_FOR_ARCH8_5)
AARCH64_ARCH("armv8.6-a", generic, 8_6A, 8, AARCH64_FL_FOR_ARCH8_6)
AARCH64_ARCH("armv8.7-a", generic, 8_7A, 8, AARCH64_FL_FOR_ARCH8_7)
AARCH64_ARCH("armv8-r", generic, 8R , 8, AARCH64_FL_FOR_ARCH8_R)
#undef AARCH64_ARCH

3
gcc/config/aarch64/aarch64-option-extensions.def
View file

@ -232,4 +232,7 @@ AARCH64_OPT_EXTENSION("flagm", AARCH64_FL_FLAGM, 0, 0, false, "flagm")
/* Enabling/Disabling "pauth" only changes "pauth". */
AARCH64_OPT_EXTENSION("pauth", AARCH64_FL_PAUTH, 0, 0, false, "paca pacg")
/* Enabling/Disabling "ls64" only changes "ls64". */
AARCH64_OPT_EXTENSION("ls64", AARCH64_FL_LS64, 0, 0, false, "")
#undef AARCH64_OPT_EXTENSION

9
gcc/config/aarch64/aarch64.h
View file

@ -231,6 +231,12 @@ extern unsigned aarch64_architecture_version;
/* Pointer Authentication (PAUTH) extension. */
#define AARCH64_FL_PAUTH (1ULL << 40)
/* 64-byte atomic load/store extensions. */
#define AARCH64_FL_LS64 (1ULL << 41)
/* Armv8.7-a architecture extensions. */
#define AARCH64_FL_V8_7 (1ULL << 42)
/* Has FP and SIMD. */
#define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD)
@ -255,6 +261,9 @@ extern unsigned aarch64_architecture_version;
#define AARCH64_FL_FOR_ARCH8_6 \
(AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_V8_6 | AARCH64_FL_FPSIMD \
| AARCH64_FL_I8MM | AARCH64_FL_BF16)
#define AARCH64_FL_FOR_ARCH8_7 \
(AARCH64_FL_FOR_ARCH8_6 | AARCH64_FL_V8_7 | AARCH64_FL_LS64)
#define AARCH64_FL_FOR_ARCH8_R \
(AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_R)

4
gcc/doc/invoke.texi
View file

@ -18570,6 +18570,7 @@ and the features that they enable by default:
@item @samp{armv8.4-a} @tab Armv8.4-A @tab @samp{armv8.3-a}, @samp{+flagm}, @samp{+fp16fml}, @samp{+dotprod}
@item @samp{armv8.5-a} @tab Armv8.5-A @tab @samp{armv8.4-a}, @samp{+sb}, @samp{+ssbs}, @samp{+predres}
@item @samp{armv8.6-a} @tab Armv8.6-A @tab @samp{armv8.5-a}, @samp{+bf16}, @samp{+i8mm}
@item @samp{armv8.7-a} @tab Armv8.7-a @tab @samp{armv8.6-a}, @samp{+ls64}
@item @samp{armv8-r} @tab Armv8-R @tab @samp{armv8-r}
@end multitable
@ -18856,6 +18857,9 @@ Enable brain half-precision floating-point instructions. This also enables
Advanced SIMD and floating-point instructions. This option is enabled by
default for @option{-march=armv8.6-a}. Use of this option with architectures
prior to Armv8.2-A is not supported.
@item ls64
Enable the 64-byte atomic load and store instructions for accelerators.
This option is enabled by default for @option{-march=armv8.7-a}.
@item flagm
Enable the Flag Manipulation instructions Extension.
@item pauth