pdp11.md (movmemhi, movmemhi1): Correct constraints.
* config/pdp11/pdp11.md (movmemhi, movmemhi1): Correct constraints. * config/pdp11/pdp11.c (output_block_move): Rewrite. From-SVN: r168338
This commit is contained in:
Paul Koning
Paul Koning
parent
fd3ce292ae
commit
dea44e569d
3 changed files with 128 additions and 201 deletions
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@ -1,3 +1,9 @@
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2010-12-30 Paul Koning <ni1d@arrl.net>
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* config/pdp11/pdp11.md (movmemhi, movmemhi1): Correct
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constraints.
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* config/pdp11/pdp11.c (output_block_move): Rewrite.
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2010-12-30 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/47060
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@ -1167,236 +1167,157 @@ output_block_move(rtx *operands)
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{
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static int count = 0;
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char buf[200];
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int unroll;
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int lastbyte = 0;
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if (GET_CODE(operands[2]) == CONST_INT
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&& ! optimize_size)
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/* Move of zero bytes is a NOP. */
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if (operands[2] == const0_rtx)
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return "";
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/* Look for moves by small constant byte counts, those we'll
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expand to straight line code. */
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if (CONSTANT_P (operands[2]))
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{
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if (INTVAL(operands[2]) < 16
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&& INTVAL(operands[3]) == 1)
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if (INTVAL (operands[2]) < 16
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&& (!optimize_size || INTVAL (operands[2]) < 5)
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&& INTVAL (operands[3]) == 1)
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{
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register int i;
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for (i = 1; i <= INTVAL(operands[2]); i++)
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for (i = 1; i <= INTVAL (operands[2]); i++)
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output_asm_insn("movb (%1)+, (%0)+", operands);
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return "";
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}
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else if (INTVAL(operands[2]) < 32)
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else if (INTVAL(operands[2]) < 32
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&& (!optimize_size || INTVAL (operands[2]) < 9)
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&& INTVAL (operands[3]) >= 2)
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{
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register int i;
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for (i = 1; i <= INTVAL(operands[2])/2; i++)
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output_asm_insn("mov (%1)+, (%0)+", operands);
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for (i = 1; i <= INTVAL (operands[2]) / 2; i++)
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output_asm_insn ("mov (%1)+, (%0)+", operands);
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if (INTVAL (operands[2]) & 1)
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output_asm_insn ("movb (%1), (%0)", operands);
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/* may I assume that moved quantity is
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multiple of alignment ???
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I HOPE SO !
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*/
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return "";
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}
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/* can do other clever things, maybe... */
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}
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if (CONSTANT_P(operands[2]) )
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/* Ideally we'd look for moves that are multiples of 4 or 8
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bytes and handle those by unrolling the move loop. That
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makes for a lot of code if done at run time, but it's ok
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for constant counts. Also, for variable counts we have
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to worry about odd byte count with even aligned pointers.
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On 11/40 and up we handle that case; on older machines
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we don't and just use byte-wise moves all the time. */
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if (CONSTANT_P (operands[2]) )
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{
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/* just move count to scratch */
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output_asm_insn("mov %2, %4", operands);
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if (INTVAL (operands[3]) < 2)
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unroll = 0;
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else
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{
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lastbyte = INTVAL (operands[2]) & 1;
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if (optimize_size || INTVAL (operands[2]) & 2)
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unroll = 1;
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else if (INTVAL (operands[2]) & 4)
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unroll = 2;
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else
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unroll = 3;
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}
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/* Loop count is byte count scaled by unroll. */
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operands[2] = GEN_INT (INTVAL (operands[2]) >> unroll);
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output_asm_insn ("mov %2, %4", operands);
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}
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else
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{
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/* just clobber the register */
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/* Variable byte count; use the input register
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as the scratch. */
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operands[4] = operands[2];
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}
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/* switch over alignment */
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switch (INTVAL(operands[3]))
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{
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case 1:
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/*
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x:
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movb (%1)+, (%0)+
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if (TARGET_45)
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sob %4,x
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else
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dec %4
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bgt x
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*/
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sprintf(buf, "\nmovestrhi%d:", count);
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output_asm_insn(buf, NULL);
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output_asm_insn("movb (%1)+, (%0)+", operands);
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if (TARGET_45)
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{
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sprintf(buf, "sob %%4, movestrhi%d", count);
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output_asm_insn(buf, operands);
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}
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/* Decide whether to move by words, and check
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the byte count for zero. */
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if (TARGET_40_PLUS && INTVAL (operands[3]) > 1)
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{
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unroll = 1;
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output_asm_insn ("asr %4", operands);
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}
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else
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{
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output_asm_insn("dec %4", operands);
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sprintf(buf, "bgt movestrhi%d", count);
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output_asm_insn(buf, NULL);
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}
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{
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unroll = 0;
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output_asm_insn ("tst %4", operands);
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}
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sprintf (buf, "beq movestrhi%d", count + 1);
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output_asm_insn (buf, NULL);
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}
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/* Output the loop label. */
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sprintf (buf, "\nmovestrhi%d:", count);
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output_asm_insn (buf, NULL);
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/* Output the appropriate move instructions. */
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switch (unroll)
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{
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case 0:
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output_asm_insn ("movb (%1)+, (%0)+", operands);
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break;
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count ++;
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case 1:
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output_asm_insn ("mov (%1)+, (%0)+", operands);
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break;
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case 2:
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/*
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asr %4
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x:
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mov (%1)+, (%0)+
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if (TARGET_45)
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sob %4, x
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else
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dec %4
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bgt x
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*/
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generate_compact_code:
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output_asm_insn("asr %4", operands);
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sprintf(buf, "\nmovestrhi%d:", count);
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output_asm_insn(buf, NULL);
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output_asm_insn("mov (%1)+, (%0)+", operands);
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if (TARGET_45)
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{
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sprintf(buf, "sob %%4, movestrhi%d", count);
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output_asm_insn(buf, operands);
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}
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else
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{
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output_asm_insn("dec %4", operands);
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sprintf(buf, "bgt movestrhi%d", count);
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output_asm_insn(buf, NULL);
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}
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count ++;
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output_asm_insn ("mov (%1)+, (%0)+", operands);
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output_asm_insn ("mov (%1)+, (%0)+", operands);
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break;
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case 4:
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/*
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asr %4
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asr %4
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x:
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mov (%1)+, (%0)+
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mov (%1)+, (%0)+
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if (TARGET_45)
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sob %4, x
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else
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dec %4
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bgt x
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*/
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if (optimize_size)
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goto generate_compact_code;
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output_asm_insn("asr %4", operands);
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output_asm_insn("asr %4", operands);
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sprintf(buf, "\nmovestrhi%d:", count);
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output_asm_insn(buf, NULL);
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output_asm_insn("mov (%1)+, (%0)+", operands);
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output_asm_insn("mov (%1)+, (%0)+", operands);
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if (TARGET_45)
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{
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sprintf(buf, "sob %%4, movestrhi%d", count);
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output_asm_insn(buf, operands);
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}
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else
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{
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output_asm_insn("dec %4", operands);
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sprintf(buf, "bgt movestrhi%d", count);
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output_asm_insn(buf, NULL);
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}
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count ++;
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break;
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default:
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/*
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asr %4
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asr %4
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asr %4
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x:
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mov (%1)+, (%0)+
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mov (%1)+, (%0)+
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mov (%1)+, (%0)+
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mov (%1)+, (%0)+
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if (TARGET_45)
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sob %4, x
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else
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dec %4
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bgt x
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*/
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if (optimize_size)
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goto generate_compact_code;
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output_asm_insn("asr %4", operands);
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output_asm_insn("asr %4", operands);
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output_asm_insn("asr %4", operands);
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sprintf(buf, "\nmovestrhi%d:", count);
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output_asm_insn(buf, NULL);
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output_asm_insn("mov (%1)+, (%0)+", operands);
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output_asm_insn("mov (%1)+, (%0)+", operands);
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output_asm_insn("mov (%1)+, (%0)+", operands);
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output_asm_insn("mov (%1)+, (%0)+", operands);
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if (TARGET_45)
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{
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sprintf(buf, "sob %%4, movestrhi%d", count);
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output_asm_insn(buf, operands);
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}
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else
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{
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output_asm_insn("dec %4", operands);
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sprintf(buf, "bgt movestrhi%d", count);
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output_asm_insn(buf, NULL);
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}
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count ++;
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output_asm_insn ("mov (%1)+, (%0)+", operands);
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output_asm_insn ("mov (%1)+, (%0)+", operands);
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output_asm_insn ("mov (%1)+, (%0)+", operands);
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output_asm_insn ("mov (%1)+, (%0)+", operands);
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break;
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;
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}
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/* Output the decrement and test. */
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if (TARGET_40_PLUS)
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{
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sprintf (buf, "sob %%4, movestrhi%d", count);
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output_asm_insn (buf, operands);
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}
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else
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{
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output_asm_insn ("dec %4", operands);
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sprintf (buf, "bgt movestrhi%d", count);
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output_asm_insn (buf, NULL);
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}
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count ++;
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/* If constant odd byte count, move the last byte. */
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if (lastbyte)
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output_asm_insn ("movb (%1), (%0)", operands);
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else if (!CONSTANT_P (operands[2]))
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{
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/* Output the destination label for the zero byte count check. */
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sprintf (buf, "\nmovestrhi%d:", count);
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output_asm_insn (buf, NULL);
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count++;
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/* If we did word moves, check for trailing last byte. */
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if (unroll)
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{
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sprintf (buf, "bcc movestrhi%d", count);
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output_asm_insn (buf, NULL);
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output_asm_insn ("movb (%1), (%0)", operands);
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sprintf (buf, "\nmovestrhi%d:", count);
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output_asm_insn (buf, NULL);
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count++;
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}
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}
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return "";
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}
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@ -321,7 +321,7 @@
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(define_expand "movmemhi"
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[(parallel [(set (match_operand:BLK 0 "general_operand" "=g,g")
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(match_operand:BLK 1 "general_operand" "g,g"))
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(use (match_operand:HI 2 "general_operand" "n,&mr"))
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(use (match_operand:HI 2 "general_operand" "n,mr"))
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(use (match_operand:HI 3 "immediate_operand" "i,i"))
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(clobber (match_scratch:HI 4 "=&r,X"))
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(clobber (match_dup 5))
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@ -342,10 +342,10 @@
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}")
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(define_insn "" ; "movmemhi"
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[(set (mem:BLK (match_operand 0 "pmode_register_operand" "+r,r"))
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(mem:BLK (match_operand 1 "pmode_register_operand" "+r,r")))
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(use (match_operand:HI 2 "general_operand" "+n,&r"))
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(define_insn "movmemhi1"
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[(set (mem:BLK (match_operand:HI 0 "register_operand" "r,r"))
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(mem:BLK (match_operand:HI 1 "register_operand" "r,r")))
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(use (match_operand:HI 2 "general_operand" "n,r"))
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(use (match_operand:HI 3 "immediate_operand" "i,i"))
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(clobber (match_scratch:HI 4 "=&r,X"))
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(clobber (match_dup 0))
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