[AArch64, 3/4] Reimplement multiply by element to get rid of inline assembly
gcc/ * config/aarch64/aarch64-simd.md (vmul_n_f32): Remove inline assembly. Use builtin. (vmul_n_s16): Likewise. (vmul_n_s32): Likewise. (vmul_n_u16): Likewise. (vmul_n_u32): Likewise. (vmulq_n_f32): Likewise. (vmulq_n_f64): Likewise. (vmulq_n_s16): Likewise. (vmulq_n_s32): Likewise. (vmulq_n_u16): Likewise. (vmulq_n_u32): Likewise. gcc/testsuite/ * gcc.target/aarch64/simd/vmul_elem_1.c: Use intrinsics. From-SVN: r236333
This commit is contained in:
Jiong Wang
Jiong Wang
parent
2233003338
commit
daab456213
4 changed files with 131 additions and 165 deletions
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@ -1,3 +1,18 @@
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2016-05-17 Jiong Wang <jiong.wang@arm.com>
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* config/aarch64/aarch64-simd.md (vmul_n_f32): Remove inline assembly.
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Use builtin.
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(vmul_n_s16): Likewise.
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(vmul_n_s32): Likewise.
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(vmul_n_u16): Likewise.
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(vmul_n_u32): Likewise.
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(vmulq_n_f32): Likewise.
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(vmulq_n_f64): Likewise.
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(vmulq_n_s16): Likewise.
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(vmulq_n_s32): Likewise.
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(vmulq_n_u16): Likewise.
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(vmulq_n_u32): Likewise.
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2016-05-17 Jiong Wang <jiong.wang@arm.com>
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* config/aarch64/aarch64-simd.md (*aarch64_mul3_elt_to_128df): Extend to
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@ -7938,61 +7938,6 @@ vmovn_u64 (uint64x2_t a)
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return result;
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}
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__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
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vmul_n_f32 (float32x2_t a, float32_t b)
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{
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float32x2_t result;
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__asm__ ("fmul %0.2s,%1.2s,%2.s[0]"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
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vmul_n_s16 (int16x4_t a, int16_t b)
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{
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int16x4_t result;
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__asm__ ("mul %0.4h,%1.4h,%2.h[0]"
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: "=w"(result)
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: "w"(a), "x"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
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vmul_n_s32 (int32x2_t a, int32_t b)
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{
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int32x2_t result;
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__asm__ ("mul %0.2s,%1.2s,%2.s[0]"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
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vmul_n_u16 (uint16x4_t a, uint16_t b)
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{
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uint16x4_t result;
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__asm__ ("mul %0.4h,%1.4h,%2.h[0]"
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: "=w"(result)
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: "w"(a), "x"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
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vmul_n_u32 (uint32x2_t a, uint32_t b)
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{
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uint32x2_t result;
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__asm__ ("mul %0.2s,%1.2s,%2.s[0]"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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#define vmull_high_lane_s16(a, b, c) \
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__extension__ \
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({ \
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@ -8443,72 +8388,6 @@ vmull_u32 (uint32x2_t a, uint32x2_t b)
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return result;
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}
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__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
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vmulq_n_f32 (float32x4_t a, float32_t b)
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{
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float32x4_t result;
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__asm__ ("fmul %0.4s,%1.4s,%2.s[0]"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
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vmulq_n_f64 (float64x2_t a, float64_t b)
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{
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float64x2_t result;
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__asm__ ("fmul %0.2d,%1.2d,%2.d[0]"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
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vmulq_n_s16 (int16x8_t a, int16_t b)
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{
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int16x8_t result;
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__asm__ ("mul %0.8h,%1.8h,%2.h[0]"
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: "=w"(result)
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: "w"(a), "x"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
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vmulq_n_s32 (int32x4_t a, int32_t b)
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{
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int32x4_t result;
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__asm__ ("mul %0.4s,%1.4s,%2.s[0]"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
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vmulq_n_u16 (uint16x8_t a, uint16_t b)
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{
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uint16x8_t result;
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__asm__ ("mul %0.8h,%1.8h,%2.h[0]"
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: "=w"(result)
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: "w"(a), "x"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vmulq_n_u32 (uint32x4_t a, uint32_t b)
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{
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uint32x4_t result;
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__asm__ ("mul %0.4s,%1.4s,%2.s[0]"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
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vmvn_p8 (poly8x8_t a)
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{
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@ -18924,6 +18803,74 @@ vmulq_laneq_u32 (uint32x4_t __a, uint32x4_t __b, const int __lane)
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return __a * __aarch64_vget_lane_any (__b, __lane);
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}
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/* vmul_n. */
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__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
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vmul_n_f32 (float32x2_t __a, float32_t __b)
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{
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return __a * __b;
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}
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__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
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vmulq_n_f32 (float32x4_t __a, float32_t __b)
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{
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return __a * __b;
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}
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__extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
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vmulq_n_f64 (float64x2_t __a, float64_t __b)
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{
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return __a * __b;
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}
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__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
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vmul_n_s16 (int16x4_t __a, int16_t __b)
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{
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return __a * __b;
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}
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__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
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vmulq_n_s16 (int16x8_t __a, int16_t __b)
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{
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return __a * __b;
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}
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__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
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vmul_n_s32 (int32x2_t __a, int32_t __b)
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{
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return __a * __b;
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}
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__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
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vmulq_n_s32 (int32x4_t __a, int32_t __b)
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{
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return __a * __b;
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}
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__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
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vmul_n_u16 (uint16x4_t __a, uint16_t __b)
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{
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return __a * __b;
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}
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__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
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vmulq_n_u16 (uint16x8_t __a, uint16_t __b)
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{
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return __a * __b;
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}
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__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
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vmul_n_u32 (uint32x2_t __a, uint32_t __b)
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{
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return __a * __b;
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}
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vmulq_n_u32 (uint32x4_t __a, uint32_t __b)
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{
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return __a * __b;
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}
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/* vneg */
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__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
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@ -1,3 +1,7 @@
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2016-05-17 Jiong Wang <jiong.wang@arm.com>
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* gcc.target/aarch64/simd/vmul_elem_1.c: Use intrinsics.
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2016-05-17 Jiong Wang <jiong.wang@arm.com>
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* gcc.target/aarch64/simd/vmul_elem_1.c: New.
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@ -142,13 +142,13 @@ check_v2sf (float32_t elemA, float32_t elemB)
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int32_t indx;
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const float32_t vec32x2_buf[2] = {A, B};
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float32x2_t vec32x2_src = vld1_f32 (vec32x2_buf);
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float32x2_t vec32x2_res = vec32x2_src * elemA;
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float32x2_t vec32x2_res = vmul_n_f32 (vec32x2_src, elemA);
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for (indx = 0; indx < 2; indx++)
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if (* (uint32_t *) &vec32x2_res[indx] != * (uint32_t *) &expected2_1[indx])
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abort ();
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vec32x2_res = vec32x2_src * elemB;
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vec32x2_res = vmul_n_f32 (vec32x2_src, elemB);
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for (indx = 0; indx < 2; indx++)
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if (* (uint32_t *) &vec32x2_res[indx] != * (uint32_t *) &expected2_2[indx])
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@ -163,25 +163,25 @@ check_v4sf (float32_t elemA, float32_t elemB, float32_t elemC, float32_t elemD)
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int32_t indx;
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const float32_t vec32x4_buf[4] = {A, B, C, D};
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float32x4_t vec32x4_src = vld1q_f32 (vec32x4_buf);
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float32x4_t vec32x4_res = vec32x4_src * elemA;
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float32x4_t vec32x4_res = vmulq_n_f32 (vec32x4_src, elemA);
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for (indx = 0; indx < 4; indx++)
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if (* (uint32_t *) &vec32x4_res[indx] != * (uint32_t *) &expected4_1[indx])
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abort ();
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vec32x4_res = vec32x4_src * elemB;
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vec32x4_res = vmulq_n_f32 (vec32x4_src, elemB);
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for (indx = 0; indx < 4; indx++)
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if (* (uint32_t *) &vec32x4_res[indx] != * (uint32_t *) &expected4_2[indx])
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abort ();
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vec32x4_res = vec32x4_src * elemC;
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vec32x4_res = vmulq_n_f32 (vec32x4_src, elemC);
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for (indx = 0; indx < 4; indx++)
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if (* (uint32_t *) &vec32x4_res[indx] != * (uint32_t *) &expected4_3[indx])
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abort ();
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vec32x4_res = vec32x4_src * elemD;
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vec32x4_res = vmulq_n_f32 (vec32x4_src, elemD);
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for (indx = 0; indx < 4; indx++)
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if (* (uint32_t *) &vec32x4_res[indx] != * (uint32_t *) &expected4_4[indx])
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@ -196,13 +196,13 @@ check_v2df (float64_t elemdC, float64_t elemdD)
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int32_t indx;
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const float64_t vec64x2_buf[2] = {AD, BD};
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float64x2_t vec64x2_src = vld1q_f64 (vec64x2_buf);
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float64x2_t vec64x2_res = vec64x2_src * elemdC;
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float64x2_t vec64x2_res = vmulq_n_f64 (vec64x2_src, elemdC);
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for (indx = 0; indx < 2; indx++)
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if (* (uint64_t *) &vec64x2_res[indx] != * (uint64_t *) &expectedd2_1[indx])
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abort ();
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vec64x2_res = vec64x2_src * elemdD;
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vec64x2_res = vmulq_n_f64 (vec64x2_src, elemdD);
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for (indx = 0; indx < 2; indx++)
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if (* (uint64_t *) &vec64x2_res[indx] != * (uint64_t *) &expectedd2_2[indx])
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@ -217,13 +217,13 @@ check_v2si (int32_t elemsA, int32_t elemsB)
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int32_t indx;
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const int32_t vecs32x2_buf[2] = {AS, BS};
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int32x2_t vecs32x2_src = vld1_s32 (vecs32x2_buf);
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int32x2_t vecs32x2_res = vecs32x2_src * elemsA;
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int32x2_t vecs32x2_res = vmul_n_s32 (vecs32x2_src, elemsA);
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for (indx = 0; indx < 2; indx++)
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if (vecs32x2_res[indx] != expecteds2_1[indx])
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abort ();
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vecs32x2_res = vecs32x2_src * elemsB;
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vecs32x2_res = vmul_n_s32 (vecs32x2_src, elemsB);
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for (indx = 0; indx < 2; indx++)
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if (vecs32x2_res[indx] != expecteds2_2[indx])
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@ -236,13 +236,13 @@ check_v2si_unsigned (uint32_t elemusA, uint32_t elemusB)
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int indx;
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const uint32_t vecus32x2_buf[2] = {AUS, BUS};
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uint32x2_t vecus32x2_src = vld1_u32 (vecus32x2_buf);
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uint32x2_t vecus32x2_res = vecus32x2_src * elemusA;
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uint32x2_t vecus32x2_res = vmul_n_u32 (vecus32x2_src, elemusA);
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for (indx = 0; indx < 2; indx++)
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if (vecus32x2_res[indx] != expectedus2_1[indx])
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abort ();
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vecus32x2_res = vecus32x2_src * elemusB;
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vecus32x2_res = vmul_n_u32 (vecus32x2_src, elemusB);
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for (indx = 0; indx < 2; indx++)
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if (vecus32x2_res[indx] != expectedus2_2[indx])
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@ -257,25 +257,25 @@ check_v4si (int32_t elemsA, int32_t elemsB, int32_t elemsC, int32_t elemsD)
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int32_t indx;
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const int32_t vecs32x4_buf[4] = {AS, BS, CS, DS};
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int32x4_t vecs32x4_src = vld1q_s32 (vecs32x4_buf);
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int32x4_t vecs32x4_res = vecs32x4_src * elemsA;
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int32x4_t vecs32x4_res = vmulq_n_s32 (vecs32x4_src, elemsA);
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for (indx = 0; indx < 4; indx++)
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if (vecs32x4_res[indx] != expecteds4_1[indx])
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abort ();
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vecs32x4_res = vecs32x4_src * elemsB;
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vecs32x4_res = vmulq_n_s32 (vecs32x4_src, elemsB);
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for (indx = 0; indx < 4; indx++)
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if (vecs32x4_res[indx] != expecteds4_2[indx])
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abort ();
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vecs32x4_res = vecs32x4_src * elemsC;
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vecs32x4_res = vmulq_n_s32 (vecs32x4_src, elemsC);
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for (indx = 0; indx < 4; indx++)
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if (vecs32x4_res[indx] != expecteds4_3[indx])
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abort ();
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vecs32x4_res = vecs32x4_src * elemsD;
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vecs32x4_res = vmulq_n_s32 (vecs32x4_src, elemsD);
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for (indx = 0; indx < 4; indx++)
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if (vecs32x4_res[indx] != expecteds4_4[indx])
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@ -289,25 +289,25 @@ check_v4si_unsigned (uint32_t elemusA, uint32_t elemusB, uint32_t elemusC,
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int indx;
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const uint32_t vecus32x4_buf[4] = {AUS, BUS, CUS, DUS};
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uint32x4_t vecus32x4_src = vld1q_u32 (vecus32x4_buf);
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uint32x4_t vecus32x4_res = vecus32x4_src * elemusA;
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uint32x4_t vecus32x4_res = vmulq_n_u32 (vecus32x4_src, elemusA);
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for (indx = 0; indx < 4; indx++)
|
||||
if (vecus32x4_res[indx] != expectedus4_1[indx])
|
||||
abort ();
|
||||
|
||||
vecus32x4_res = vecus32x4_src * elemusB;
|
||||
vecus32x4_res = vmulq_n_u32 (vecus32x4_src, elemusB);
|
||||
|
||||
for (indx = 0; indx < 4; indx++)
|
||||
if (vecus32x4_res[indx] != expectedus4_2[indx])
|
||||
abort ();
|
||||
|
||||
vecus32x4_res = vecus32x4_src * elemusC;
|
||||
vecus32x4_res = vmulq_n_u32 (vecus32x4_src, elemusC);
|
||||
|
||||
for (indx = 0; indx < 4; indx++)
|
||||
if (vecus32x4_res[indx] != expectedus4_3[indx])
|
||||
abort ();
|
||||
|
||||
vecus32x4_res = vecus32x4_src * elemusD;
|
||||
vecus32x4_res = vmulq_n_u32 (vecus32x4_src, elemusD);
|
||||
|
||||
for (indx = 0; indx < 4; indx++)
|
||||
if (vecus32x4_res[indx] != expectedus4_4[indx])
|
||||
|
|
@ -323,25 +323,25 @@ check_v4hi (int16_t elemhA, int16_t elemhB, int16_t elemhC, int16_t elemhD)
|
|||
int32_t indx;
|
||||
const int16_t vech16x4_buf[4] = {AH, BH, CH, DH};
|
||||
int16x4_t vech16x4_src = vld1_s16 (vech16x4_buf);
|
||||
int16x4_t vech16x4_res = vech16x4_src * elemhA;
|
||||
int16x4_t vech16x4_res = vmul_n_s16 (vech16x4_src, elemhA);
|
||||
|
||||
for (indx = 0; indx < 4; indx++)
|
||||
if (vech16x4_res[indx] != expectedh4_1[indx])
|
||||
abort ();
|
||||
|
||||
vech16x4_res = vech16x4_src * elemhB;
|
||||
vech16x4_res = vmul_n_s16 (vech16x4_src, elemhB);
|
||||
|
||||
for (indx = 0; indx < 4; indx++)
|
||||
if (vech16x4_res[indx] != expectedh4_2[indx])
|
||||
abort ();
|
||||
|
||||
vech16x4_res = vech16x4_src * elemhC;
|
||||
vech16x4_res = vmul_n_s16 (vech16x4_src, elemhC);
|
||||
|
||||
for (indx = 0; indx < 4; indx++)
|
||||
if (vech16x4_res[indx] != expectedh4_3[indx])
|
||||
abort ();
|
||||
|
||||
vech16x4_res = vech16x4_src * elemhD;
|
||||
vech16x4_res = vmul_n_s16 (vech16x4_src, elemhD);
|
||||
|
||||
for (indx = 0; indx < 4; indx++)
|
||||
if (vech16x4_res[indx] != expectedh4_4[indx])
|
||||
|
|
@ -355,25 +355,25 @@ check_v4hi_unsigned (uint16_t elemuhA, uint16_t elemuhB, uint16_t elemuhC,
|
|||
int indx;
|
||||
const uint16_t vecuh16x4_buf[4] = {AUH, BUH, CUH, DUH};
|
||||
uint16x4_t vecuh16x4_src = vld1_u16 (vecuh16x4_buf);
|
||||
uint16x4_t vecuh16x4_res = vecuh16x4_src * elemuhA;
|
||||
uint16x4_t vecuh16x4_res = vmul_n_u16 (vecuh16x4_src, elemuhA);
|
||||
|
||||
for (indx = 0; indx < 4; indx++)
|
||||
if (vecuh16x4_res[indx] != expecteduh4_1[indx])
|
||||
abort ();
|
||||
|
||||
vecuh16x4_res = vecuh16x4_src * elemuhB;
|
||||
vecuh16x4_res = vmul_n_u16 (vecuh16x4_src, elemuhB);
|
||||
|
||||
for (indx = 0; indx < 4; indx++)
|
||||
if (vecuh16x4_res[indx] != expecteduh4_2[indx])
|
||||
abort ();
|
||||
|
||||
vecuh16x4_res = vecuh16x4_src * elemuhC;
|
||||
vecuh16x4_res = vmul_n_u16 (vecuh16x4_src, elemuhC);
|
||||
|
||||
for (indx = 0; indx < 4; indx++)
|
||||
if (vecuh16x4_res[indx] != expecteduh4_3[indx])
|
||||
abort ();
|
||||
|
||||
vecuh16x4_res = vecuh16x4_src * elemuhD;
|
||||
vecuh16x4_res = vmul_n_u16 (vecuh16x4_src, elemuhD);
|
||||
|
||||
for (indx = 0; indx < 4; indx++)
|
||||
if (vecuh16x4_res[indx] != expecteduh4_4[indx])
|
||||
|
|
@ -389,49 +389,49 @@ check_v8hi (int16_t elemhA, int16_t elemhB, int16_t elemhC, int16_t elemhD,
|
|||
int32_t indx;
|
||||
const int16_t vech16x8_buf[8] = {AH, BH, CH, DH, EH, FH, GH, HH};
|
||||
int16x8_t vech16x8_src = vld1q_s16 (vech16x8_buf);
|
||||
int16x8_t vech16x8_res = vech16x8_src * elemhA;
|
||||
int16x8_t vech16x8_res = vmulq_n_s16 (vech16x8_src, elemhA);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vech16x8_res[indx] != expectedh8_1[indx])
|
||||
abort ();
|
||||
|
||||
vech16x8_res = vech16x8_src * elemhB;
|
||||
vech16x8_res = vmulq_n_s16 (vech16x8_src, elemhB);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vech16x8_res[indx] != expectedh8_2[indx])
|
||||
abort ();
|
||||
|
||||
vech16x8_res = vech16x8_src * elemhC;
|
||||
vech16x8_res = vmulq_n_s16 (vech16x8_src, elemhC);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vech16x8_res[indx] != expectedh8_3[indx])
|
||||
abort ();
|
||||
|
||||
vech16x8_res = vech16x8_src * elemhD;
|
||||
vech16x8_res = vmulq_n_s16 (vech16x8_src, elemhD);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vech16x8_res[indx] != expectedh8_4[indx])
|
||||
abort ();
|
||||
|
||||
vech16x8_res = vech16x8_src * elemhE;
|
||||
vech16x8_res = vmulq_n_s16 (vech16x8_src, elemhE);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vech16x8_res[indx] != expectedh8_5[indx])
|
||||
abort ();
|
||||
|
||||
vech16x8_res = vech16x8_src * elemhF;
|
||||
vech16x8_res = vmulq_n_s16 (vech16x8_src, elemhF);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vech16x8_res[indx] != expectedh8_6[indx])
|
||||
abort ();
|
||||
|
||||
vech16x8_res = vech16x8_src * elemhG;
|
||||
vech16x8_res = vmulq_n_s16 (vech16x8_src, elemhG);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vech16x8_res[indx] != expectedh8_7[indx])
|
||||
abort ();
|
||||
|
||||
vech16x8_res = vech16x8_src * elemhH;
|
||||
vech16x8_res = vmulq_n_s16 (vech16x8_src, elemhH);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vech16x8_res[indx] != expectedh8_8[indx])
|
||||
|
|
@ -446,49 +446,49 @@ check_v8hi_unsigned (uint16_t elemuhA, uint16_t elemuhB, uint16_t elemuhC,
|
|||
int indx;
|
||||
const uint16_t vecuh16x8_buf[8] = {AUH, BUH, CUH, DUH, EUH, FUH, GUH, HUH};
|
||||
uint16x8_t vecuh16x8_src = vld1q_u16 (vecuh16x8_buf);
|
||||
uint16x8_t vecuh16x8_res = vecuh16x8_src * elemuhA;
|
||||
uint16x8_t vecuh16x8_res = vmulq_n_u16 (vecuh16x8_src, elemuhA);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vecuh16x8_res[indx] != expecteduh8_1[indx])
|
||||
abort ();
|
||||
|
||||
vecuh16x8_res = vecuh16x8_src * elemuhB;
|
||||
vecuh16x8_res = vmulq_n_u16 (vecuh16x8_src, elemuhB);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vecuh16x8_res[indx] != expecteduh8_2[indx])
|
||||
abort ();
|
||||
|
||||
vecuh16x8_res = vecuh16x8_src * elemuhC;
|
||||
vecuh16x8_res = vmulq_n_u16 (vecuh16x8_src, elemuhC);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vecuh16x8_res[indx] != expecteduh8_3[indx])
|
||||
abort ();
|
||||
|
||||
vecuh16x8_res = vecuh16x8_src * elemuhD;
|
||||
vecuh16x8_res = vmulq_n_u16 (vecuh16x8_src, elemuhD);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vecuh16x8_res[indx] != expecteduh8_4[indx])
|
||||
abort ();
|
||||
|
||||
vecuh16x8_res = vecuh16x8_src * elemuhE;
|
||||
vecuh16x8_res = vmulq_n_u16 (vecuh16x8_src, elemuhE);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vecuh16x8_res[indx] != expecteduh8_5[indx])
|
||||
abort ();
|
||||
|
||||
vecuh16x8_res = vecuh16x8_src * elemuhF;
|
||||
vecuh16x8_res = vmulq_n_u16 (vecuh16x8_src, elemuhF);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vecuh16x8_res[indx] != expecteduh8_6[indx])
|
||||
abort ();
|
||||
|
||||
vecuh16x8_res = vecuh16x8_src * elemuhG;
|
||||
vecuh16x8_res = vmulq_n_u16 (vecuh16x8_src, elemuhG);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vecuh16x8_res[indx] != expecteduh8_7[indx])
|
||||
abort ();
|
||||
|
||||
vecuh16x8_res = vecuh16x8_src * elemuhH;
|
||||
vecuh16x8_res = vmulq_n_u16 (vecuh16x8_src, elemuhH);
|
||||
|
||||
for (indx = 0; indx < 8; indx++)
|
||||
if (vecuh16x8_res[indx] != expecteduh8_8[indx])
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue