re PR target/77270 (Flag -mprftchw is shared with 3dnow for -march=k8)

PR target/77270
	* gcc.dg/tree-ssa/loop-28.c: Also compile on 32bit x86 targets.
	(dg-options): Use -march=amdfam10 instead of -march=athlon.
	* gcc.dg/tree-ssa/update-unroll-1.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-3.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-4.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-5.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-6.c: Ditto.  Do not require sse2
	effective target.  Remove scan-assembler-times directives.
	* gcc.dg/tree-ssa/prefetch-7.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-8.c: Ditto.
	* gcc.dg/tree-ssa/prefetch-9.c: Ditto.

From-SVN: r239737
This commit is contained in:
Uros Bizjak 2016-08-24 16:59:43 +02:00 committed by Uros Bizjak
parent b9553e20ad
commit d5b5d21260
10 changed files with 33 additions and 43 deletions

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@ -1,3 +1,18 @@
2016-08-24 Uros Bizjak <ubizjak@gmail.com>
PR target/77270
* gcc.dg/tree-ssa/loop-28.c: Also compile on 32bit x86 targets.
(dg-options): Use -march=amdfam10 instead of -march=athlon.
* gcc.dg/tree-ssa/update-unroll-1.c: Ditto.
* gcc.dg/tree-ssa/prefetch-3.c: Ditto.
* gcc.dg/tree-ssa/prefetch-4.c: Ditto.
* gcc.dg/tree-ssa/prefetch-5.c: Ditto.
* gcc.dg/tree-ssa/prefetch-6.c: Ditto. Do not require sse2
effective target. Remove scan-assembler-times directives.
* gcc.dg/tree-ssa/prefetch-7.c: Ditto.
* gcc.dg/tree-ssa/prefetch-8.c: Ditto.
* gcc.dg/tree-ssa/prefetch-9.c: Ditto.
2016-08-24 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
* gcc.c-torture/execute/pr71083.c: Use UINT32_TYPE instead

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@ -1,5 +1,5 @@
/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -fdump-tree-optimized -fdump-tree-aprefetch --param max-unrolled-insns=1000" } */
/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 -fdump-tree-optimized -fdump-tree-aprefetch --param max-unrolled-insns=1000" } */
char x[100000];

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@ -1,7 +1,7 @@
/* Prefetching used to prefer nonsensical unroll factor of 5 in this testcase. */
/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse -fdump-tree-aprefetch-details" } */
/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 -fdump-tree-aprefetch-details" } */
#define N 1000000

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@ -1,7 +1,7 @@
/* The loop rolls too little, hence the prefetching would not be useful. */
/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -fdump-tree-optimized" } */
/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 -fdump-tree-optimized" } */
int xxx[20];

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@ -1,5 +1,5 @@
/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
/* { dg-options "-O2 --param min-insn-to-prefetch-ratio=5 -fprefetch-loop-arrays -march=athlon -fdump-tree-aprefetch-details" } */
/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param min-insn-to-prefetch-ratio=5 -fdump-tree-aprefetch-details" } */
/* These are common idioms for writing variable-length arrays at the end
of structures. We should not deduce anything about the number of iterations

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@ -1,6 +1,5 @@
/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
/* { dg-require-effective-target sse2 } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 --param min-insn-to-prefetch-ratio=6 -fdump-tree-aprefetch-details" } */
/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param simultaneous-prefetches=100 --param min-insn-to-prefetch-ratio=6 -fdump-tree-aprefetch-details" } */
#define N 1000
#define K 900
@ -47,7 +46,3 @@ double test(void)
/* { dg-final { scan-tree-dump-times "Issued prefetch" 5 "aprefetch" } } */
/* { dg-final { scan-tree-dump-times "Issued nontemporal prefetch" 3 "aprefetch" } } */
/* { dg-final { scan-assembler-times "prefetcht" 5 } } */
/* { dg-final { scan-assembler-times "prefetchnta" 3 } } */

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@ -1,7 +1,5 @@
/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
/* { dg-require-effective-target sse2 } */
/* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */
/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */
#define K 1000000
int a[K];
@ -39,8 +37,3 @@ void test(int *p)
/* { dg-final { scan-tree-dump-times "a nontemporal store" 0 "aprefetch" } } */
/* { dg-final { scan-tree-dump-times "builtin_prefetch" 7 "optimized" } } */
/* { dg-final { scan-assembler-times "prefetchw" 5 } } */
/* { dg-final { scan-assembler-times "prefetcht" 1 } } */
/* { dg-final { scan-assembler-times "prefetchnta" 1 } } */

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@ -1,7 +1,5 @@
/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
/* { dg-require-effective-target sse2 } */
/* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */
/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */
#define K 1000000
int a[K];
@ -19,7 +17,3 @@ void test()
/* { dg-final { scan-tree-dump "=\\{nt\\}" "optimized" } } */
/* { dg-final { scan-tree-dump-times "__builtin_ia32_mfence" 1 "optimized" } } */
/* { dg-final { scan-assembler "movnti" } } */
/* { dg-final { scan-assembler-times "mfence" 1 } } */

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@ -1,7 +1,5 @@
/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
/* { dg-require-effective-target sse2 } */
/* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */
/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */
#define K 1000000
int a[K], b[K];
@ -22,8 +20,3 @@ void test()
/* { dg-final { scan-tree-dump-times "builtin_prefetch" 1 "optimized" } } */
/* { dg-final { scan-tree-dump "=\\{nt\\}" "optimized" } } */
/* { dg-final { scan-tree-dump-times "__builtin_ia32_mfence" 1 "optimized" } } */
/* { dg-final { scan-assembler-times "prefetchnta" 1 } } */
/* { dg-final { scan-assembler "movnti" } } */
/* { dg-final { scan-assembler-times "mfence" 1 } } */

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@ -1,5 +1,5 @@
/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
/* { dg-options "-O1 -fprefetch-loop-arrays -march=athlon -fdump-tree-aprefetch-blocks" } */
/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
/* { dg-options "-O1 -fprefetch-loop-arrays -march=amdfam10 -fdump-tree-aprefetch-blocks" } */
int a[10000];