LoongArch: Split loongarch_option_override_internal into smaller procedures
gcc/ChangeLog: * config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]recip as aliases to -mrecip={all,none}, respectively. * config/loongarch/loongarch.opt: Regenerate. * config/loongarch/loongarch-def.h (ABI_FPU_64): Rename to... (ABI_FPU64_P): ...this. (ABI_FPU_32): Rename to... (ABI_FPU32_P): ...this. (ABI_FPU_NONE): Rename to... (ABI_NOFPU_P): ...this. (ABI_LP64_P): Define. * config/loongarch/loongarch.cc (loongarch_init_print_operand_punct): Merged into loongarch_global_init. (loongarch_cpu_option_override): Renamed to loongarch_target_option_override. (loongarch_option_override_internal): Move the work after loongarch_config_target into loongarch_target_option_override. (loongarch_global_init): Define. (INIT_TARGET_FLAG): Move to loongarch-opts.cc. (loongarch_option_override): Call loongarch_global_init separately. * config/loongarch/loongarch-opts.cc (loongarch_parse_mrecip_scheme): Split the parsing of -mrecip=<string> from loongarch_option_override_internal. (loongarch_generate_mrecip_scheme): Define. Split from loongarch_option_override_internal. (loongarch_target_option_override): Define. Renamed from loongarch_cpu_option_override. (loongarch_init_misc_options): Define. Split from loongarch_option_override_internal. (INIT_TARGET_FLAG): Move from loongarch.cc. * config/loongarch/loongarch-opts.h (loongarch_target_option_override): New prototype. (loongarch_parse_mrecip_scheme): New prototype. (loongarch_init_misc_options): New prototype. (TARGET_ABI_LP64): Simplify with ABI_LP64_P. * config/loongarch/loongarch.h (TARGET_RECIP_DIV): Simplify. Do not reference specific CPU architecture (LA664). (TARGET_RECIP_SQRT): Same. (TARGET_RECIP_RSQRT): Same. (TARGET_RECIP_VEC_DIV): Same. (TARGET_RECIP_VEC_SQRT): Same. (TARGET_RECIP_VEC_RSQRT): Same.
This commit is contained in:
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7f424c3167
commit
d28ea8e5a7
7 changed files with 341 additions and 235 deletions
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@ -197,14 +197,14 @@ mexplicit-relocs
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Target Alias(mexplicit-relocs=, always, none)
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Use %reloc() assembly operators (for backward compatibility).
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mrecip
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Target RejectNegative Var(la_recip) Save
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Generate approximate reciprocal divide and square root for better throughput.
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mrecip=
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Target RejectNegative Joined Var(la_recip_name) Save
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Control generation of reciprocal estimates.
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mrecip
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Target Alias(mrecip=, all, none)
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Generate approximate reciprocal divide and square root for better throughput.
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; The code model option names for -mcmodel.
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Enum
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Name(cmodel) Type(int)
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@ -90,11 +90,16 @@ extern loongarch_def_array<const char *, N_ABI_BASE_TYPES>
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#define TO_LP64_ABI_BASE(C) (C)
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#define ABI_FPU_64(abi_base) \
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#define ABI_LP64_P(abi_base) \
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(abi_base == ABI_BASE_LP64D \
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|| abi_base == ABI_BASE_LP64F \
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|| abi_base == ABI_BASE_LP64S)
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#define ABI_FPU64_P(abi_base) \
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(abi_base == ABI_BASE_LP64D)
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#define ABI_FPU_32(abi_base) \
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#define ABI_FPU32_P(abi_base) \
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(abi_base == ABI_BASE_LP64F)
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#define ABI_FPU_NONE(abi_base) \
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#define ABI_NOFPU_P(abi_base) \
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(abi_base == ABI_BASE_LP64S)
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@ -25,6 +25,7 @@ along with GCC; see the file COPYING3. If not see
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#include "coretypes.h"
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#include "tm.h"
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#include "obstack.h"
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#include "opts.h"
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#include "diagnostic-core.h"
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#include "loongarch-cpu.h"
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@ -32,8 +33,12 @@ along with GCC; see the file COPYING3. If not see
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#include "loongarch-str.h"
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#include "loongarch-def.h"
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/* Target configuration */
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struct loongarch_target la_target;
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/* RTL cost information */
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const struct loongarch_rtx_cost_data *loongarch_cost;
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/* ABI-related configuration. */
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#define ABI_COUNT (sizeof(abi_priority_list)/sizeof(struct loongarch_abi))
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static const struct loongarch_abi
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@ -795,3 +800,251 @@ loongarch_update_gcc_opt_status (struct loongarch_target *target,
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/* ISA evolution features */
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opts->x_la_isa_evolution = target->isa.evolution;
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}
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/* -mrecip=<str> handling */
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static struct
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{
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const char *string; /* option name. */
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unsigned int mask; /* mask bits to set. */
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}
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const recip_options[] = {
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{ "all", RECIP_MASK_ALL },
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{ "none", RECIP_MASK_NONE },
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{ "div", RECIP_MASK_DIV },
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{ "sqrt", RECIP_MASK_SQRT },
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{ "rsqrt", RECIP_MASK_RSQRT },
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{ "vec-div", RECIP_MASK_VEC_DIV },
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{ "vec-sqrt", RECIP_MASK_VEC_SQRT },
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{ "vec-rsqrt", RECIP_MASK_VEC_RSQRT },
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};
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/* Parser for -mrecip=<recip_string>. */
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unsigned int
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loongarch_parse_mrecip_scheme (const char *recip_string)
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{
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unsigned int result_mask = RECIP_MASK_NONE;
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if (recip_string)
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{
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char *p = ASTRDUP (recip_string);
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char *q;
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unsigned int mask, i;
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bool invert;
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while ((q = strtok (p, ",")) != NULL)
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{
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p = NULL;
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if (*q == '!')
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{
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invert = true;
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q++;
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}
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else
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invert = false;
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if (!strcmp (q, "default"))
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mask = RECIP_MASK_ALL;
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else
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{
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for (i = 0; i < ARRAY_SIZE (recip_options); i++)
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if (!strcmp (q, recip_options[i].string))
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{
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mask = recip_options[i].mask;
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break;
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}
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if (i == ARRAY_SIZE (recip_options))
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{
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error ("unknown option for %<-mrecip=%s%>", q);
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invert = false;
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mask = RECIP_MASK_NONE;
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}
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}
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if (invert)
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result_mask &= ~mask;
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else
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result_mask |= mask;
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}
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}
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return result_mask;
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}
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/* Generate -mrecip= argument based on the mask. */
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const char*
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loongarch_generate_mrecip_scheme (unsigned int mask)
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{
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static char recip_scheme_str[128];
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int p = 0, tmp;
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switch (mask)
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{
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case RECIP_MASK_ALL:
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return "all";
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case RECIP_MASK_NONE:
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return "none";
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}
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for (unsigned long i = 2; i < ARRAY_SIZE (recip_options); i++)
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{
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if (mask & recip_options[i].mask)
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{
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if ((tmp = strlen (recip_options[i].string) + 1) >= 127 - p)
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gcc_unreachable ();
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recip_scheme_str[p] = ',';
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strcpy (recip_scheme_str + p + 1, recip_options[i].string);
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p += tmp;
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}
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}
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recip_scheme_str[p] = '\0';
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return recip_scheme_str + 1;
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}
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/* Refresh the switches acccording to the resolved loongarch_target struct. */
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void
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loongarch_target_option_override (struct loongarch_target *target,
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struct gcc_options *opts,
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struct gcc_options *opts_set)
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{
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loongarch_update_gcc_opt_status (target, opts, opts_set);
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/* alignments */
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if (opts->x_flag_align_functions && !opts->x_str_align_functions)
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opts->x_str_align_functions
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= loongarch_cpu_align[target->cpu_tune].function;
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if (opts->x_flag_align_labels && !opts->x_str_align_labels)
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opts->x_str_align_labels = loongarch_cpu_align[target->cpu_tune].label;
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/* Set up parameters to be used in prefetching algorithm. */
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int simultaneous_prefetches
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= loongarch_cpu_cache[target->cpu_tune].simultaneous_prefetches;
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SET_OPTION_IF_UNSET (opts, opts_set, param_simultaneous_prefetches,
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simultaneous_prefetches);
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SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_line_size,
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loongarch_cpu_cache[target->cpu_tune].l1d_line_size);
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SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_size,
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loongarch_cpu_cache[target->cpu_tune].l1d_size);
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SET_OPTION_IF_UNSET (opts, opts_set, param_l2_cache_size,
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loongarch_cpu_cache[target->cpu_tune].l2d_size);
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/* Other arch-specific overrides. */
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switch (target->cpu_arch)
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{
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case CPU_LA664:
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/* Enable -mrecipe=all for LA664 by default. */
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if (!opts_set->x_recip_mask)
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{
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opts->x_recip_mask = RECIP_MASK_ALL;
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opts_set->x_recip_mask = 1;
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}
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}
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/* -mrecip= */
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opts->x_la_recip_name
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= loongarch_generate_mrecip_scheme (opts->x_recip_mask);
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/* Decide which rtx_costs structure to use. */
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if (opts->x_optimize_size)
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loongarch_cost = &loongarch_rtx_cost_optimize_size;
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else
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loongarch_cost = &loongarch_cpu_rtx_cost_data[target->cpu_tune];
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/* If the user hasn't specified a branch cost, use the processor's
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default. */
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if (!opts_set->x_la_branch_cost)
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opts->x_la_branch_cost = loongarch_cost->branch_cost;
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/* other stuff */
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if (ABI_LP64_P (target->abi.base))
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opts->x_flag_pcc_struct_return = 0;
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switch (target->cmodel)
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{
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case CMODEL_EXTREME:
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if (opts->x_flag_plt)
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{
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if (opts_set->x_flag_plt)
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error ("code model %qs is not compatible with %s",
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"extreme", "-fplt");
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opts->x_flag_plt = 0;
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}
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break;
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case CMODEL_TINY_STATIC:
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case CMODEL_MEDIUM:
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case CMODEL_NORMAL:
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case CMODEL_TINY:
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case CMODEL_LARGE:
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break;
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default:
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gcc_unreachable ();
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}
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}
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/* Resolve options that's not covered by la_target. */
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void
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loongarch_init_misc_options (struct gcc_options *opts,
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struct gcc_options *opts_set)
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{
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if (opts->x_flag_pic)
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opts->x_g_switch_value = 0;
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/* -mrecip options. */
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opts->x_recip_mask = loongarch_parse_mrecip_scheme (opts->x_la_recip_name);
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#define INIT_TARGET_FLAG(NAME, INIT) \
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{ \
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if (!(opts_set->x_target_flags & MASK_##NAME)) \
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{ \
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if (INIT) \
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opts->x_target_flags |= MASK_##NAME; \
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else \
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opts->x_target_flags &= ~MASK_##NAME; \
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} \
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}
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/* Enable conditional moves for int and float by default. */
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INIT_TARGET_FLAG (COND_MOVE_INT, 1)
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INIT_TARGET_FLAG (COND_MOVE_FLOAT, 1)
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/* Set mrelax default. */
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INIT_TARGET_FLAG (LINKER_RELAXATION,
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HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION)
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#undef INIT_TARGET_FLAG
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/* Set mexplicit-relocs default. */
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if (opts->x_la_opt_explicit_relocs == M_OPT_UNSET)
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opts->x_la_opt_explicit_relocs = (HAVE_AS_EXPLICIT_RELOCS
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? (TARGET_LINKER_RELAXATION
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? EXPLICIT_RELOCS_AUTO
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: EXPLICIT_RELOCS_ALWAYS)
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: EXPLICIT_RELOCS_NONE);
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/* Enable sw prefetching at -O3 and higher. */
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if (opts->x_flag_prefetch_loop_arrays < 0
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&& (opts->x_optimize >= 3 || opts->x_flag_profile_use)
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&& !opts->x_optimize_size)
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opts->x_flag_prefetch_loop_arrays = 1;
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if (TARGET_DIRECT_EXTERN_ACCESS_OPTS_P (opts) && opts->x_flag_shlib)
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error ("%qs cannot be used for compiling a shared library",
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"-mdirect-extern-access");
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/* Enforce that interval is the same size as size so the mid-end does the
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right thing. */
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SET_OPTION_IF_UNSET (opts, opts_set,
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param_stack_clash_protection_probe_interval,
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param_stack_clash_protection_guard_size);
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}
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@ -30,6 +30,10 @@ along with GCC; see the file COPYING3. If not see
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/* Target configuration */
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extern struct loongarch_target la_target;
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/* RTL cost information */
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extern const struct loongarch_rtx_cost_data *loongarch_cost;
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/* Initialize loongarch_target from separate option variables. */
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void
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loongarch_init_target (struct loongarch_target *target,
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struct loongarch_flags *flags,
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int follow_multilib_list_p);
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/* Refresh the switches acccording to the resolved loongarch_target struct. */
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void
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loongarch_target_option_override (struct loongarch_target *target,
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struct gcc_options *opts,
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struct gcc_options *opts_set);
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/* option status feedback for "gcc --help=target -Q" */
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void
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loongarch_update_gcc_opt_status (struct loongarch_target *target,
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struct gcc_options *opts,
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struct gcc_options *opts_set);
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/* Parser for -mrecip=<recip_string>. */
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unsigned int
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loongarch_parse_mrecip_scheme (const char *recip_string);
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/* Resolve options that's not covered by la_target. */
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void
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loongarch_init_misc_options (struct gcc_options *opts,
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struct gcc_options *opts_set);
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#endif
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/* Flag status */
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@ -80,9 +103,7 @@ struct loongarch_flags {
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#define TARGET_DOUBLE_FLOAT_ABI (la_target.abi.base == ABI_BASE_LP64D)
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#define TARGET_64BIT (la_target.isa.base == ISA_BASE_LA64)
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#define TARGET_ABI_LP64 (la_target.abi.base == ABI_BASE_LP64D \
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|| la_target.abi.base == ABI_BASE_LP64F \
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|| la_target.abi.base == ABI_BASE_LP64S)
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#define TARGET_ABI_LP64 ABI_LP64_P(la_target.abi.base)
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#define ISA_HAS_LSX \
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(la_target.isa.simd == ISA_EXT_SIMD_LSX \
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@ -208,9 +208,6 @@ const enum reg_class loongarch_regno_to_class[FIRST_PSEUDO_REGISTER] = {
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FRAME_REGS, FRAME_REGS
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};
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/* Which cost information to use. */
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static const struct loongarch_rtx_cost_data *loongarch_cost;
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/* Information about a single argument. */
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struct loongarch_arg_info
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{
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@ -5911,17 +5908,6 @@ loongarch_print_operand_punctuation (FILE *file, int ch)
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}
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}
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/* Initialize loongarch_print_operand_punct. */
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static void
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loongarch_init_print_operand_punct (void)
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{
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const char *p;
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for (p = ".$"; *p; p++)
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loongarch_print_operand_punct[(unsigned char) *p] = true;
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}
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/* PRINT_OPERAND prefix LETTER refers to the integer branch instruction
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associated with condition CODE. Print the condition part of the
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opcode to FILE. */
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@ -7625,118 +7611,15 @@ loongarch_init_machine_status (void)
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}
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static void
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loongarch_cpu_option_override (struct loongarch_target *target,
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struct gcc_options *opts,
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struct gcc_options *opts_set)
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loongarch_global_init (void)
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{
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/* alignments */
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if (opts->x_flag_align_functions && !opts->x_str_align_functions)
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opts->x_str_align_functions
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= loongarch_cpu_align[target->cpu_tune].function;
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if (opts->x_flag_align_labels && !opts->x_str_align_labels)
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opts->x_str_align_labels = loongarch_cpu_align[target->cpu_tune].label;
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/* Set up parameters to be used in prefetching algorithm. */
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int simultaneous_prefetches
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= loongarch_cpu_cache[target->cpu_tune].simultaneous_prefetches;
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SET_OPTION_IF_UNSET (opts, opts_set, param_simultaneous_prefetches,
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simultaneous_prefetches);
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SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_line_size,
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loongarch_cpu_cache[target->cpu_tune].l1d_line_size);
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SET_OPTION_IF_UNSET (opts, opts_set, param_l1_cache_size,
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loongarch_cpu_cache[target->cpu_tune].l1d_size);
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SET_OPTION_IF_UNSET (opts, opts_set, param_l2_cache_size,
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loongarch_cpu_cache[target->cpu_tune].l2d_size);
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}
|
||||
|
||||
static void
|
||||
loongarch_option_override_internal (struct gcc_options *opts,
|
||||
struct gcc_options *opts_set)
|
||||
{
|
||||
int i, regno, mode;
|
||||
|
||||
if (flag_pic)
|
||||
g_switch_value = 0;
|
||||
|
||||
loongarch_init_target (&la_target,
|
||||
la_opt_cpu_arch, la_opt_cpu_tune, la_opt_fpu,
|
||||
la_opt_simd, la_opt_abi_base, la_opt_abi_ext,
|
||||
la_opt_cmodel, opts->x_la_isa_evolution,
|
||||
opts_set->x_la_isa_evolution);
|
||||
|
||||
/* Handle target-specific options: compute defaults/conflicts etc. */
|
||||
loongarch_config_target (&la_target, NULL, 0);
|
||||
|
||||
loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
|
||||
loongarch_cpu_option_override (&la_target, opts, opts_set);
|
||||
|
||||
if (TARGET_ABI_LP64)
|
||||
flag_pcc_struct_return = 0;
|
||||
|
||||
/* Decide which rtx_costs structure to use. */
|
||||
if (optimize_size)
|
||||
loongarch_cost = &loongarch_rtx_cost_optimize_size;
|
||||
else
|
||||
loongarch_cost = &loongarch_cpu_rtx_cost_data[la_target.cpu_tune];
|
||||
|
||||
/* If the user hasn't specified a branch cost, use the processor's
|
||||
default. */
|
||||
if (la_branch_cost == 0)
|
||||
la_branch_cost = loongarch_cost->branch_cost;
|
||||
|
||||
/* Enable sw prefetching at -O3 and higher. */
|
||||
if (opts->x_flag_prefetch_loop_arrays < 0
|
||||
&& (opts->x_optimize >= 3 || opts->x_flag_profile_use)
|
||||
&& !opts->x_optimize_size)
|
||||
opts->x_flag_prefetch_loop_arrays = 1;
|
||||
|
||||
if (TARGET_DIRECT_EXTERN_ACCESS && flag_shlib)
|
||||
error ("%qs cannot be used for compiling a shared library",
|
||||
"-mdirect-extern-access");
|
||||
|
||||
switch (la_target.cmodel)
|
||||
{
|
||||
case CMODEL_EXTREME:
|
||||
if (opts->x_flag_plt)
|
||||
{
|
||||
if (global_options_set.x_flag_plt)
|
||||
error ("code model %qs is not compatible with %s",
|
||||
"extreme", "-fplt");
|
||||
opts->x_flag_plt = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case CMODEL_TINY_STATIC:
|
||||
case CMODEL_MEDIUM:
|
||||
case CMODEL_NORMAL:
|
||||
case CMODEL_TINY:
|
||||
case CMODEL_LARGE:
|
||||
break;
|
||||
|
||||
default:
|
||||
gcc_unreachable ();
|
||||
}
|
||||
|
||||
/* Validate the guard size. */
|
||||
int guard_size = param_stack_clash_protection_guard_size;
|
||||
|
||||
/* Enforce that interval is the same size as size so the mid-end does the
|
||||
right thing. */
|
||||
SET_OPTION_IF_UNSET (opts, &global_options_set,
|
||||
param_stack_clash_protection_probe_interval,
|
||||
guard_size);
|
||||
|
||||
loongarch_init_print_operand_punct ();
|
||||
/* Initialize loongarch_print_operand_punct. */
|
||||
for (const char *p = ".$"; *p; p++)
|
||||
loongarch_print_operand_punct[(unsigned char) *p] = true;
|
||||
|
||||
/* Set up array to map GCC register number to debug register number.
|
||||
Ignore the special purpose register numbers. */
|
||||
|
||||
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
||||
for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
||||
{
|
||||
if (GP_REG_P (i) || FP_REG_P (i))
|
||||
loongarch_dwarf_regno[i] = i;
|
||||
|
@ -7745,115 +7628,53 @@ loongarch_option_override_internal (struct gcc_options *opts,
|
|||
}
|
||||
|
||||
/* Set up loongarch_hard_regno_mode_ok. */
|
||||
for (mode = 0; mode < MAX_MACHINE_MODE; mode++)
|
||||
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
||||
for (int mode = 0; mode < MAX_MACHINE_MODE; mode++)
|
||||
for (int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
||||
loongarch_hard_regno_mode_ok_p[mode][regno]
|
||||
= loongarch_hard_regno_mode_ok_uncached (regno, (machine_mode) mode);
|
||||
|
||||
/* Function to allocate machine-dependent function status. */
|
||||
init_machine_status = &loongarch_init_machine_status;
|
||||
};
|
||||
|
||||
/* -mrecip options. */
|
||||
static struct
|
||||
{
|
||||
const char *string; /* option name. */
|
||||
unsigned int mask; /* mask bits to set. */
|
||||
}
|
||||
const recip_options[] = {
|
||||
{ "all", RECIP_MASK_ALL },
|
||||
{ "none", RECIP_MASK_NONE },
|
||||
{ "div", RECIP_MASK_DIV },
|
||||
{ "sqrt", RECIP_MASK_SQRT },
|
||||
{ "rsqrt", RECIP_MASK_RSQRT },
|
||||
{ "vec-div", RECIP_MASK_VEC_DIV },
|
||||
{ "vec-sqrt", RECIP_MASK_VEC_SQRT },
|
||||
{ "vec-rsqrt", RECIP_MASK_VEC_RSQRT },
|
||||
};
|
||||
static void
|
||||
loongarch_option_override_internal (struct loongarch_target *target,
|
||||
struct gcc_options *opts,
|
||||
struct gcc_options *opts_set)
|
||||
{
|
||||
/* Handle options not covered by struct loongarch_target. */
|
||||
loongarch_init_misc_options (opts, opts_set);
|
||||
|
||||
if (la_recip_name)
|
||||
{
|
||||
char *p = ASTRDUP (la_recip_name);
|
||||
char *q;
|
||||
unsigned int mask, i;
|
||||
bool invert;
|
||||
/* Resolve the target struct. */
|
||||
loongarch_init_target (target,
|
||||
opts->x_la_opt_cpu_arch,
|
||||
opts->x_la_opt_cpu_tune,
|
||||
opts->x_la_opt_fpu,
|
||||
opts->x_la_opt_simd,
|
||||
opts->x_la_opt_abi_base,
|
||||
opts->x_la_opt_abi_ext,
|
||||
opts->x_la_opt_cmodel,
|
||||
opts->x_la_isa_evolution,
|
||||
opts_set->x_la_isa_evolution);
|
||||
|
||||
while ((q = strtok (p, ",")) != NULL)
|
||||
{
|
||||
p = NULL;
|
||||
if (*q == '!')
|
||||
{
|
||||
invert = true;
|
||||
q++;
|
||||
}
|
||||
else
|
||||
invert = false;
|
||||
loongarch_config_target (target, NULL, 0);
|
||||
|
||||
if (!strcmp (q, "default"))
|
||||
mask = RECIP_MASK_ALL;
|
||||
else
|
||||
{
|
||||
for (i = 0; i < ARRAY_SIZE (recip_options); i++)
|
||||
if (!strcmp (q, recip_options[i].string))
|
||||
{
|
||||
mask = recip_options[i].mask;
|
||||
break;
|
||||
}
|
||||
|
||||
if (i == ARRAY_SIZE (recip_options))
|
||||
{
|
||||
error ("unknown option for %<-mrecip=%s%>", q);
|
||||
invert = false;
|
||||
mask = RECIP_MASK_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
if (invert)
|
||||
recip_mask &= ~mask;
|
||||
else
|
||||
recip_mask |= mask;
|
||||
}
|
||||
}
|
||||
if (la_recip)
|
||||
recip_mask |= RECIP_MASK_ALL;
|
||||
if (!ISA_HAS_FRECIPE)
|
||||
recip_mask = RECIP_MASK_NONE;
|
||||
|
||||
#define INIT_TARGET_FLAG(NAME, INIT) \
|
||||
{ \
|
||||
if (!(target_flags_explicit & MASK_##NAME)) \
|
||||
{ \
|
||||
if (INIT) \
|
||||
target_flags |= MASK_##NAME; \
|
||||
else \
|
||||
target_flags &= ~MASK_##NAME; \
|
||||
} \
|
||||
}
|
||||
|
||||
/* Enable conditional moves for int and float by default. */
|
||||
INIT_TARGET_FLAG (COND_MOVE_INT, 1)
|
||||
INIT_TARGET_FLAG (COND_MOVE_FLOAT, 1)
|
||||
|
||||
/* Set mrelax default. */
|
||||
INIT_TARGET_FLAG (LINKER_RELAXATION,
|
||||
HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION)
|
||||
|
||||
#undef INIT_TARGET_FLAG
|
||||
|
||||
if (la_opt_explicit_relocs == M_OPT_UNSET)
|
||||
la_opt_explicit_relocs = (HAVE_AS_EXPLICIT_RELOCS
|
||||
? (TARGET_LINKER_RELAXATION
|
||||
? EXPLICIT_RELOCS_AUTO
|
||||
: EXPLICIT_RELOCS_ALWAYS)
|
||||
: EXPLICIT_RELOCS_NONE);
|
||||
/* Override some options according to the resolved target. */
|
||||
loongarch_target_option_override (target, opts, opts_set);
|
||||
}
|
||||
|
||||
|
||||
/* Implement TARGET_OPTION_OVERRIDE. */
|
||||
|
||||
static void
|
||||
loongarch_option_override (void)
|
||||
{
|
||||
loongarch_option_override_internal (&global_options, &global_options_set);
|
||||
/* Setting up the target configuration. */
|
||||
loongarch_option_override_internal (&la_target,
|
||||
&global_options,
|
||||
&global_options_set);
|
||||
|
||||
/* Global initializations. */
|
||||
loongarch_global_init ();
|
||||
}
|
||||
|
||||
/* Implement TARGET_OPTION_SAVE. */
|
||||
|
|
|
@ -710,12 +710,18 @@ enum reg_class
|
|||
| RECIP_MASK_RSQRT | RECIP_MASK_VEC_SQRT \
|
||||
| RECIP_MASK_VEC_DIV | RECIP_MASK_VEC_RSQRT)
|
||||
|
||||
#define TARGET_RECIP_DIV ((recip_mask & RECIP_MASK_DIV) != 0 || TARGET_uARCH_LA664)
|
||||
#define TARGET_RECIP_SQRT ((recip_mask & RECIP_MASK_SQRT) != 0 || TARGET_uARCH_LA664)
|
||||
#define TARGET_RECIP_RSQRT ((recip_mask & RECIP_MASK_RSQRT) != 0 || TARGET_uARCH_LA664)
|
||||
#define TARGET_RECIP_VEC_DIV ((recip_mask & RECIP_MASK_VEC_DIV) != 0 || TARGET_uARCH_LA664)
|
||||
#define TARGET_RECIP_VEC_SQRT ((recip_mask & RECIP_MASK_VEC_SQRT) != 0 || TARGET_uARCH_LA664)
|
||||
#define TARGET_RECIP_VEC_RSQRT ((recip_mask & RECIP_MASK_VEC_RSQRT) != 0 || TARGET_uARCH_LA664)
|
||||
#define TARGET_RECIP_DIV \
|
||||
((recip_mask & RECIP_MASK_DIV) != 0 && ISA_HAS_FRECIPE)
|
||||
#define TARGET_RECIP_SQRT \
|
||||
((recip_mask & RECIP_MASK_SQRT) != 0 && ISA_HAS_FRECIPE)
|
||||
#define TARGET_RECIP_RSQRT \
|
||||
((recip_mask & RECIP_MASK_RSQRT) != 0 && ISA_HAS_FRECIPE)
|
||||
#define TARGET_RECIP_VEC_DIV \
|
||||
((recip_mask & RECIP_MASK_VEC_DIV) != 0 && ISA_HAS_FRECIPE)
|
||||
#define TARGET_RECIP_VEC_SQRT \
|
||||
((recip_mask & RECIP_MASK_VEC_SQRT) != 0 && ISA_HAS_FRECIPE)
|
||||
#define TARGET_RECIP_VEC_RSQRT \
|
||||
((recip_mask & RECIP_MASK_VEC_RSQRT) != 0 && ISA_HAS_FRECIPE)
|
||||
|
||||
/* 1 if N is a possible register number for function argument passing.
|
||||
We have no FP argument registers when soft-float. */
|
||||
|
|
|
@ -205,14 +205,14 @@ mexplicit-relocs
|
|||
Target Alias(mexplicit-relocs=, always, none)
|
||||
Use %reloc() assembly operators (for backward compatibility).
|
||||
|
||||
mrecip
|
||||
Target RejectNegative Var(la_recip) Save
|
||||
Generate approximate reciprocal divide and square root for better throughput.
|
||||
|
||||
mrecip=
|
||||
Target RejectNegative Joined Var(la_recip_name) Save
|
||||
Control generation of reciprocal estimates.
|
||||
|
||||
mrecip
|
||||
Target Alias(mrecip=, all, none)
|
||||
Generate approximate reciprocal divide and square root for better throughput.
|
||||
|
||||
; The code model option names for -mcmodel.
|
||||
Enum
|
||||
Name(cmodel) Type(int)
|
||||
|
|
Loading…
Add table
Reference in a new issue