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re PR target/69577 (wrong code with -fno-forward-propagate -mavx and 128bit arithmetics since r215450)

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PR rtl-optimization/69577
	Revert:
	2015-10-29  Richard Henderson  <rth@redhat.com>

	PR target/68124
	PR rtl-opt/67609
	* config/i386/i386.c (ix86_cannot_change_mode_class): Tighten
	sse check to the exact conditions of PR 67609.

From-SVN: r233152
This commit is contained in:
Uros Bizjak 2016-02-04 23:10:56 +01:00 • committed by Uros Bizjak
parent 15ebf37974
commit cfca2d6deb
2 changed files with 12 additions and 14 deletions
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11
gcc/ChangeLog
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@ -1,3 +1,14 @@
2016-02-04 Uros Bizjak <ubizjak@gmail.com>
PR rtl-optimization/69577
Revert:
2015-10-29 Richard Henderson <rth@redhat.com>
PR target/68124
PR rtl-opt/67609
* config/i386/i386.c (ix86_cannot_change_mode_class): Tighten
sse check to the exact conditions of PR 67609.
2016-02-04 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/69667

15
gcc/config/i386/i386.c
View file

@ -43283,24 +43283,11 @@ ix86_cannot_change_mode_class (machine_mode from, machine_mode to,
if (MAYBE_SSE_CLASS_P (regclass) || MAYBE_MMX_CLASS_P (regclass))
{
int from_size = GET_MODE_SIZE (from);
int to_size = GET_MODE_SIZE (to);
/* Vector registers do not support QI or HImode loads. If we don't
disallow a change to these modes, reload will assume it's ok to
drop the subreg from (subreg:SI (reg:HI 100) 0). This affects
the vec_dupv4hi pattern. */
if (from_size < 4)
return true;
/* Further, we cannot allow word_mode subregs of full vector modes.
Otherwise the middle-end will assume it's ok to store to
(subreg:DI (reg:TI 100) 0) in order to modify only the low 64 bits
of the 128-bit register. However, after reload the subreg will
be dropped leaving a plain DImode store. This is indistinguishable
from a "normal" DImode move, and so we're justified to use movsd,
which modifies the entire 128-bit register. */
if (to_size == UNITS_PER_WORD && from_size > UNITS_PER_WORD)
if (GET_MODE_SIZE (from) < 4)
return true;
}