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C-SKY port: Backend implementation

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2018-08-17  Jojo  <jijie_rong@c-sky.com>
	    Huibin Wang  <huibin_wang@c-sky.com>
	    Sandra Loosemore  <sandra@codesourcery.com>
	    Chung-Lin Tang  <cltang@codesourcery.com>

	C-SKY port: Backend implementation

	gcc/
	* config/csky/*: New.
	* common/config/csky/*: New.

Co-Authored-By: Chung-Lin Tang <cltang@codesourcery.com>
Co-Authored-By: Huibin Wang <huibin_wang@c-sky.com>
Co-Authored-By: Sandra Loosemore <sandra@codesourcery.com>

From-SVN: r263628
This commit is contained in:
Jojo 2018-08-17 19:03:27 +00:00 • committed by Sandra Loosemore
parent 56856b587e
commit cc7232b999
28 changed files with 14577 additions and 0 deletions
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10
gcc/ChangeLog
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2018-08-17 Jojo <jijie_rong@c-sky.com>
Huibin Wang <huibin_wang@c-sky.com>
Sandra Loosemore <sandra@codesourcery.com>
Chung-Lin Tang <cltang@codesourcery.com>
C-SKY port: Backend implementation
* config/csky/*: New.
* common/config/csky/*: New.
2018-08-17 Jojo <jijie_rong@c-sky.com>
Huibin Wang <huibin_wang@c-sky.com>
Sandra Loosemore <sandra@codesourcery.com>

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/* Common hooks for CSKY.
Copyright (C) 2018 Free Software Foundation, Inc.
Contributed by C-SKY Microsystems and Mentor Graphics.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "common/common-target.h"
#include "common/common-target-def.h"
/* Set default optimization options. */
static const struct default_options csky_option_optimization_table[] =
{
/* Enable section anchors by default at -O1 or higher. */
{ OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
{ OPT_LEVELS_NONE, 0, NULL, 0 }
};
#undef TARGET_DEFAULT_TARGET_FLAGS
#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
#undef TARGET_OPTION_OPTIMIZATION_TABLE
#define TARGET_OPTION_OPTIMIZATION_TABLE csky_option_optimization_table
struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;

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;; Constraints for C-SKY.
;; Copyright (C) 2018 Free Software Foundation, Inc.
;; Contributed by C-SKY Microsystems and Mentor Graphics.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful, but
;; WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;; General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
;; Register constraints.
(define_register_constraint "a" "MINI_REGS" "r0 - r7")
(define_register_constraint "b" "LOW_REGS" "r0 - r15")
(define_register_constraint "c" "C_REGS" "C register")
(define_register_constraint "y" "HILO_REGS" "HI and LO registers")
(define_register_constraint "l" "LO_REGS" "LO register")
(define_register_constraint "h" "HI_REGS" "HI register")
(define_register_constraint "v" "V_REGS" "vector registers")
(define_register_constraint "z" "SP_REGS" "SP register")
;; Memory and misc constraints.
(define_memory_constraint "Q"
"Memory operands with base register, index register and short displacement for FPUV2"
(match_test "csky_valid_fpuv2_mem_operand (op)"))
(define_constraint "R"
"Memory operands whose address is a label_ref"
(and (match_code "mem")
(match_test "GET_CODE (XEXP (op, 0)) == LABEL_REF")))
(define_constraint "S"
"Symbol reference with optional offset"
(match_test "csky_symbolic_address_p (op)"))
;; Constant integer constraints.
(define_constraint "I"
"Constant in range [0, 65535]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_I (ival)")))
(define_constraint "J"
"Constant in range [1, 32]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_J (ival)")))
(define_constraint "K"
"Constant in range [0, 31]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_K (ival)")))
(define_constraint "L"
"Constant in range [1, 8]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_L (ival)")))
(define_constraint "M"
"Constant in range [1, 4096]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_M (ival)")))
(define_constraint "N"
"Constant in range [1, 256]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_N (ival)")))
(define_constraint "O"
"Constant in range [0, 4095]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_O (ival)")))
(define_constraint "P"
"Constant in range [4, 508] that is divisible by 4"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_P (ival)")))
(define_constraint "T"
"Constant in range [-256, -1]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_T (ival)")))
(define_constraint "Ua"
"Constant 0"
(and (match_code "const_int")
(match_test "ival == 0")))
(define_constraint "Ub"
"Unsigned int that is an exact power of 2"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_Ub (ival)")))
(define_constraint "Uc"
"Unsigned int X such that X+1 is an exact power of 2"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_Uc (ival)")))
(define_constraint "Ud"
"64-bit int whose high/low words separately satisfy I, Ub, or Uc"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_Ud (ival)")))
(define_constraint "Ug"
"Constant in range [-508, -4] that is divisible by 4"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_Ug (ival)")))
(define_constraint "Uh"
"Constant in range [-31, 0]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_Uh (ival)")))
(define_constraint "Uj"
"Constant in range [4, 1024] that is divisible by 4"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_Uj (ival)")))
(define_constraint "Uk"
"Constant in range [1, 65536]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_Uk (ival)")))
(define_constraint "Ul"
"Constant in range [-1024, -4] that is divisible by 4"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_Ul (ival)")))
(define_constraint "Um"
"Constant in range [-4096, -1]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_Um (ival)")))
(define_constraint "Un"
"Constant whose low 16 bits are all zeros"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_MOVIH (ival)")))
(define_constraint "Uo"
"Constant that can be synthesized with an extra instruction"
(and (match_code "const_int")
(match_test "csky_inlinable_constant (ival)")))
(define_constraint "Up"
"Constant in range [0, 255]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_N (ival + 1)")))
(define_constraint "Uq"
"Constant in range [0, 1020] that is divisible by 4"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_Uj (ival + 4)")))
(define_constraint "Ur"
"Constant in range [-1020, -4] that is divisible by 4"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_Uj (-ival + 4)")))
(define_constraint "Us"
"Constant in range [-8, -1]"
(and (match_code "const_int")
(match_test "CSKY_CONST_OK_FOR_US (ival)")))

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/* Declarations for bare-metal C-SKY targets.
Copyright (C) 2018 Free Software Foundation, Inc.
Contributed by C-SKY Microsystems and Mentor Graphics.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/******************************************************************
* Run-time Target Specification *
******************************************************************/
#undef STARTFILE_SPEC
#define STARTFILE_SPEC \
"crt0.o%s crti.o%s crtbegin.o%s"
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
#undef CC1_SPEC
#define CC1_SPEC \
"%{EB:-EB} \
%{EL:-EL} \
%{fpic|fPIC:-DPIC} \
%{march=ck803s:-march=ck803} \
"
#undef ASM_SPEC
#define ASM_SPEC \
"%{mbig-endian:-mbig-endian} \
%{EB:-EB} \
%{EL:-EL} \
%{fpic|fPIC:-pic} \
%{mcpu=*:-mcpu=%*} \
%{march=*:-march=%*} \
%{mhard-float:-mhard-float} \
%{melrw:-melrw} \
%{mno-elrw:-mno-elrw} \
%{mistack:-mistack} \
%{mno-istack:-mno-istack} \
%{mmp:-mmp} \
%{mcp:-mcp} \
%{mcache:-mcache} \
%{msecurity|mmac:-msecurity} \
%{mtrust:-mtrust} \
%{mdsp:-mdsp} \
%{medsp:-medsp} \
%{mvdsp:-mvdsp} \
"
#undef LINK_SPEC
#define LINK_SPEC \
"%{mbig-endian:-EB} \
%{EB:-EB} \
%{EL:-EL} -X"
#undef LIB_SPEC
#define LIB_SPEC \
"%{pthread:-lpthread} -lc %{mccrt:-lcc-rt}"
/* FIXME add this to LIB_SPEC when need */
/* %{!shared:%{profile:-lc_p}%{!profile:-lc}}" */
#define CPLUSPLUS_CPP_SPEC "-D_GNU_SOURCE %(cpp)"
/* Disable features only for Linux toolchains. */
#undef TARGET_POSIX_IO
#define TARGET_CSKY_LINUX 0

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/* Declarations for C-SKY targets running Linux.
Copyright (C) 2018 Free Software Foundation, Inc.
Contributed by C-SKY Microsystems and Mentor Graphics.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/******************************************************************
* Run-time Target Specification *
******************************************************************/
#undef STARTFILE_SPEC
#define STARTFILE_SPEC \
"%{!shared: %{pie:Scrt1.o%s;:crt1.o%s}} \
crti.o%s %{static:crtbeginT.o%s;shared|pie:crtbeginS.o%s;:crtbegin.o%s}"
#undef ENDFILE_SPEC
#define ENDFILE_SPEC \
"%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
#undef CC1_SPEC
#define CC1_SPEC \
"%{EB:-EB} \
%{EL:-EL} \
"
#undef ASM_SPEC
#define ASM_SPEC \
"%{mbig-endian:-mbig-endian} \
%{EB:-EB} \
%{EL:-EL} \
%{fpic|fPIC:-pic} \
%{mcpu=*:-mcpu=%*} \
%{march=*:-march=%*} \
%{mhard-float:-mhard-float} \
%{melrw:-melrw} \
%{mno-elrw:-mno-elrw} \
%{mistack:-mistack} \
%{mno-istack:-mno-istack} \
%{mmp:-mmp} \
%{mcp:-mcp} \
%{mcache:-mcache} \
%{msecurity|mmac:-msecurity} \
%{mtrust:-mtrust} \
%{mdsp:-mdsp} \
%{medsp:-medsp} \
%{mvdsp:-mvdsp} \
"
#define LINUX_DYNAMIC_LINKER "/lib/ld.so.1"
#define LINUX_TARGET_LINK_SPEC "%{h*} %{version:-v} \
%{b} \
%{static:-Bstatic} \
%{shared:-shared} \
%{symbolic:-Bsymbolic} \
%{!static: \
%{rdynamic:-export-dynamic} \
%{!shared:-dynamic-linker " LINUX_DYNAMIC_LINKER "}} \
-X \
%{mbig-endian:-EB} %{mlittle-endian:-EL} \
%{EB:-EB} %{EL:-EL}"
#undef LINK_SPEC
#define LINK_SPEC LINUX_TARGET_LINK_SPEC
#undef LIB_SPEC
#define LIB_SPEC \
"%{pthread:-lpthread} -lc %{mccrt:-lcc-rt}"
/* FIXME add this to LIB_SPEC when need */
/* %{!shared:%{profile:-lc_p}%{!profile:-lc}}" */
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
GNU_USER_TARGET_OS_CPP_BUILTINS (); \
} \
while (0)
/* In crtstuff.c to control section in where code resides.
We have to write it as asm code. */
#ifdef __PIC__
#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
asm (SECTION_OP "\n" \
"\tgrs\tr3, .Lgetpc_"#FUNC"\n\t" \
".Lgetpc_"#FUNC":\n\t" \
"\tlrw\tr2,\t.Lgetpc_"#FUNC"@GOTPC\n\t" \
"\taddu\tr3, r2\n\t" \
"\tlrw\tr2, "#FUNC"@GOTOFF\n\t" \
"\taddu\tr2, r3\n\t" \
"\tjsr\tr2\n\t"); \
FORCE_CODE_SECTION_ALIGN \
asm (TEXT_SECTION_ASM_OP);
#endif
#undef CPP_SPEC
#define CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}"
#undef FUNCTION_PROFILER
#define SAVE_LR \
"push\tlr"
#define FUNCTION_PROFILER(file, labelno) \
fprintf (file, "\t%s\n\tjbsr\t_mcount\n", SAVE_LR);
#define NO_PROFILE_COUNTERS 1
/* Enable features only for Linux toolchains. */
#define TARGET_CSKY_LINUX 1
/* Clear the instruction cache from `BEG' to `END'. */
#define CLEAR_INSN_CACHE(BEG, END) \
cacheflush (BEG, END-BEG, 3)
/* For __clear_cache in libgcc2.c. The declaration is copied from
<sys/cachectl.h>. */
#ifdef IN_LIBGCC2
extern int cacheflush (void *__addr, const int __nbytes, const int __op);
#endif

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/* Prototype declarations for the C-SKY back end.
Copyright (C) 2018 Free Software Foundation, Inc.
Contributed by C-SKY Microsystems and Mentor Graphics.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_CSKY_PROTOS_H
#define GCC_CSKY_PROTOS_H
extern bool csky_simple_addr_operand_p (rtx);
extern bool csky_symbolic_address_p (rtx);
extern bool csky_legitimate_pic_operand_p (rtx);
extern void csky_cpu_cpp_builtins (cpp_reader *);
extern bool csky_inlinable_constant (HOST_WIDE_INT value);
extern bool csky_shifted_imm8_constant (unsigned HOST_WIDE_INT,
unsigned int *, unsigned int *);
extern bool csky_valid_fpuv2_mem_operand (rtx);
extern bool csky_minipool_load_p (rtx_insn *);
extern const char *csky_output_move (rtx insn, rtx *, machine_mode);
extern const char *csky_output_movedouble (rtx *, machine_mode);
extern const char *csky_output_ck801_move (rtx, rtx *, machine_mode);
extern const char *csky_output_ck801_movedouble (rtx *, machine_mode);
extern char *csky_output_call (rtx *, int);
extern const char *csky_output_casesi (rtx *);
extern bool csky_split_and (rtx *);
extern bool csky_split_ior (rtx *);
extern bool csky_split_xor (rtx *);
#ifdef RTX_CODE
extern bool csky_emit_compare (enum rtx_code, rtx, rtx);
extern bool csky_emit_compare_float (enum rtx_code, rtx, rtx);
#endif /* RTX_CODE */
extern rtx csky_return_addr (int, rtx);
extern void csky_init_expanders (void);
extern HOST_WIDE_INT csky_initial_elimination_offset (int, int);
extern void csky_expand_prologue (void);
extern void csky_expand_epilogue (void);
extern const char *csky_output_return_instruction (void);
extern void csky_set_eh_return_address (rtx, rtx);
extern bool csky_symbol_mentioned_p (rtx);
extern bool csky_label_mentioned_p (rtx);
extern rtx csky_legitimize_pic_address (rtx, rtx, bool);
extern bool csky_tls_referenced_p (rtx);
extern rtx csky_legitimize_tls_address (rtx, rtx);
extern int csky_compute_pushpop_length (rtx *);
extern int csky_default_branch_cost (bool, bool);
extern bool csky_default_logical_op_non_short_circuit (void);
#endif /* GCC_CSKY_PROTOS_H */

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;; Command-line options for the C-SKY back end.
;; Copyright (C) 2018 Free Software Foundation, Inc.
;; Contributed by C-SKY Microsystems and Mentor Graphics.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it under
;; the terms of the GNU General Public License as published by the Free
;; Software Foundation; either version 3, or (at your option) any later
;; version.
;;
;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
;; WARRANTY; without even the implied warranty of MERCHANTABILITY or
;; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
;; for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>.
HeaderInclude
config/csky/csky_opts.h
;; Architecture/CPU options.
;; Normal CPU and arch enums are loaded from csky_tables.opt.
; For backward compatibility only.
march=ck803s
Target Report Var(flag_arch_ck803s) Undocumented
march=
Target RejectNegative ToLower Joined Enum(csky_arch) Var(csky_arch_option) Save
Specify the target architecture.
mcpu=
Target RejectNegative ToLower Joined Enum(csky_processor_type) Var(csky_cpu_option) Init(TARGET_CPU_csky_none) Save
Specify the target processor.
;; Endianness options.
mbig-endian
Target RejectNegative Report Mask(BIG_ENDIAN)
Generate big-endian code.
EB
Target RejectNegative Report Alias(mbig-endian) Undocumented
mlittle-endian
Target RejectNegative Report InverseMask(BIG_ENDIAN)
Generate little-endian code.
EL
Target RejectNegative Report Alias(mlittle-endian) Undocumented
;; Floating point options. These affect code generation but not
;; assembly.
mhard-float
Target Report RejectNegative Mask(HARD_FLOAT)
Enable hardware floating-point instructions.
msoft-float
Target Report RejectNegative InverseMask(HARD_FLOAT)
Use library calls to perform floating-point operations (default).
mfpu=
Target RejectNegative Joined Enum(csky_fpu) Var(csky_fpu_index) Init(TARGET_FPU_auto) Save
Specify the target floating-point hardware/format.
mdouble-float
Target Report Var(TARGET_DOUBLE_FLOAT) Init(-1)
Generate C-SKY FPU double float instructions (default for hard float).
mfdivdu
Target Report Var(TARGET_FDIVDU) Init(-1)
Generate frecipd/fsqrtd/fdivd instructions (default for hard float).
;; Instruction set extensions. Most of these don't affect code
;; generation, and are passed through to the assembler.
;; There are builtin preprocessor defines for each of these.
melrw
Target Report Var(TARGET_ELRW) Init(-1)
Enable the extended LRW instruction (default for CK801).
mistack
Target Report Mask(ISTACK)
Enable interrupt stack instructions.
mmp
Target Report RejectNegative Mask(MP)
Enable multiprocessor instructions.
mcp
Target Report RejectNegative Mask(CP)
Enable coprocessor instructions.
mcache
Target Report RejectNegative Mask(CACHE)
Enable cache prefetch instructions.
msecurity
Target Report RejectNegative Mask(SECURITY)
Enable C-SKY SECURE instructions.
mmac
Target Report RejectNegative Alias(msecurity) Undocumented
mtrust
Target Report RejectNegative Mask(TRUST)
Enable C-SKY TRUST instructions.
mdsp
Target Report RejectNegative Var(TARGET_DSP)
Enable C-SKY DSP instructions.
medsp
Target Report RejectNegative Mask(EDSP)
Enable C-SKY Enhanced DSP instructions.
mvdsp
Target Report RejectNegative Mask(VDSP)
Enable C-SKY Vector DSP instructions.
;; Code generation options not passed to the assembler.
mdiv
Target Report Var(TARGET_DIV) Init(-1)
Generate divide instructions.
msmart
Target Report Var(TARGET_MINI_REGISTERS) Init(-1)
Generate code for Smart Mode.
mhigh-registers
Target Report Var(TARGET_HIGH_REGISTERS) Init(-1)
Enable use of R16-R31 (default).
manchor
Target Report Var(TARGET_ANCHOR)
Generate code using global anchor symbol addresses.
mpushpop
Target Report Var(TARGET_PUSHPOP) Init(1)
Generate push/pop instructions (default).
mmultiple-stld
Target Report Var(TARGET_MULTIPLE_STLD) Init(-1)
Generate stm/ldm instructions (default).
mstm
Target Report Alias(mmultiple-stld) Undocumented
mconstpool
Target Report Var(TARGET_CONSTANT_POOL) Init(-1)
Generate constant pools in the compiler instead of assembler.
mstack-size
Target Report Var(TARGET_STACK_SIZE) Init(0)
Emit .stack_size directives.
mccrt
Target Report Var(TARGET_LIBCCRT) Init(0)
Generate code for C-SKY compiler runtime instead of libgcc.
mbranch-cost=
Target Report Joined RejectNegative UInteger Var(csky_branch_cost) Init(1)
Set the branch costs to roughly the specified number of instructions.
msched-prolog
Target Report Var(flag_sched_prolog) Init(0)
Permit scheduling of function prologue and epilogue sequences.

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/* Architecture and core descriptions for the C-SKY back end.
Copyright (C) 2018 Free Software Foundation, Inc.
Contributed by C-SKY Microsystems and Mentor Graphics.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Before using #include to read this file, define a macro:
CSKY_ARCH(NAME, CORE, ARCH, ISA)
The NAME is the name of the architecture, represented as a string
constant. The CORE is the identifier for a core representative of
this architecture. ARCH is the architecture revision. ISA is the
detailed architectural capabilities of the core. */
#ifdef CSKY_ARCH
CSKY_ARCH ("ck801", ck801, CK801,
CSKY_ISA_FEAT (CSKY_ISA_CK801))
CSKY_ARCH ("ck802", ck802, CK802,
CSKY_ISA_FEAT (CSKY_ISA_CK802))
CSKY_ARCH ("ck803", ck803, CK803,
CSKY_ISA_FEAT (CSKY_ISA_CK803))
CSKY_ARCH ("ck807", ck807, CK807,
CSKY_ISA_FEAT (CSKY_ISA_CK807) CSKY_ISA_FEAT (CSKY_ISA_DSP))
CSKY_ARCH ("ck810", ck810, CK810,
CSKY_ISA_FEAT (CSKY_ISA_CK810) CSKY_ISA_FEAT (CSKY_ISA_DSP))
#endif
/* Before using #include to read this file, define a macro:
CSKY_CORE(CORE_NAME, INTERNAL_IDENT, TUNE_IDENT, ARCH, ISA)
The isa features of core will inherit the ARCH.
The CORE_NAME is the name of the core, represented as a string constant.
The INTERNAL_IDENT is the name of the core represented as an identifier.
This must be unique for each entry in this table.
The TUNE_IDENT is the name of the core for which scheduling decisions
should be made, represented as an identifier.
The ARCH is the architecture revision implemented by the chip.
The ISA is the detailed architectural capabilities of the core. */
#ifdef CSKY_CORE
/* ck801 Architecture Processors */
CSKY_CORE ("ck801", ck801, ck801, CK801,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck801t", ck801t, ck801t, CK801,
CSKY_ISA_FEAT_NONE)
/* ck802 Architecture Processors */
CSKY_CORE ("ck802", ck802, ck802, CK802,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck802t", ck802t, ck802t, CK802,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck802j", ck802j, ck802j, CK802,
CSKY_ISA_FEAT (isa_bit_java))
/* ck803 Architecture Processors */
CSKY_CORE ("ck803", ck803, ck803, CK803,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck803h", ck803h, ck803h, CK803,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck803t", ck803t, ck803t, CK803,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck803ht", ck803ht, ck803ht, CK803,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck803f", ck803f, ck803f, CK803,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck803fh", ck803fh, ck803fh, CK803,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck803e", ck803e, ck803e, CK803,
CSKY_ISA_FEAT (CSKY_ISA_DSP))
CSKY_CORE ("ck803eh", ck803eh, ck803eh, CK803,
CSKY_ISA_FEAT (CSKY_ISA_DSP))
CSKY_CORE ("ck803et", ck803et, ck803et, CK803,
CSKY_ISA_FEAT (CSKY_ISA_DSP))
CSKY_CORE ("ck803eht", ck803eht, ck803eht, CK803,
CSKY_ISA_FEAT (CSKY_ISA_DSP))
CSKY_CORE ("ck803ef", ck803ef, ck803ef, CK803,
CSKY_ISA_FEAT (CSKY_ISA_DSP))
CSKY_CORE ("ck803efh", ck803efh, ck803efh, CK803,
CSKY_ISA_FEAT (CSKY_ISA_DSP))
CSKY_CORE ("ck803ft", ck803ft, ck803ft, CK803,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck803eft", ck803eft, ck803eft, CK803,
CSKY_ISA_FEAT (CSKY_ISA_DSP))
CSKY_CORE ("ck803efht", ck803efht, ck803efht, CK803,
CSKY_ISA_FEAT (CSKY_ISA_DSP))
CSKY_CORE ("ck803r1", ck803r1, ck803r1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803hr1", ck803hr1, ck803hr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803tr1", ck803tr1, ck803tr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803htr1", ck803htr1, ck803htr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803fr1", ck803fr1, ck803fr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803fhr1", ck803fhr1, ck803fhr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803er1", ck803er1, ck803er1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803ehr1", ck803ehr1, ck803ehr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803etr1", ck803etr1, ck803etr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803ehtr1", ck803ehtr1, ck803ehtr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803efr1", ck803efr1, ck803efr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803efhr1", ck803efhr1, ck803efhr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803ftr1", ck803ftr1, ck803ftr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803eftr1", ck803eftr1, ck803eftr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
CSKY_CORE ("ck803efhtr1", ck803efhtr1, ck803efhtr1, CK803,
CSKY_ISA_FEAT (isa_bit_3E3r1))
/* ck803s Architecture Processors */
CSKY_CORE ("ck803s", ck803s, ck803s, CK803,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck803st", ck803st, ck803st, CK803,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck803se", ck803se, ck803se, CK803,
CSKY_ISA_FEAT (CSKY_ISA_DSP))
CSKY_CORE ("ck803sf", ck803sf, ck803sf, CK803,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck803sef", ck803sef, ck803sef, CK803,
CSKY_ISA_FEAT (CSKY_ISA_DSP))
CSKY_CORE ("ck803seft", ck803seft, ck803seft, CK803,
CSKY_ISA_FEAT (CSKY_ISA_DSP))
/* ck807 Architecture Processors */
CSKY_CORE ("ck807e", ck807e, ck807e, CK807,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck807ef", ck807ef, ck807ef, CK807,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck807", ck807, ck807, CK807,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck807f", ck807f, ck807f, CK807,
CSKY_ISA_FEAT_NONE)
/* ck810 Architecture Processors */
CSKY_CORE ("ck810e", ck810e, ck810e, CK810,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck810et", ck810et, ck810et, CK810,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck810ef", ck810ef, ck810ef, CK810,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck810eft", ck810eft, ck810eft, CK810,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck810", ck810, ck810, CK810,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck810v", ck810v, ck810v, CK810,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck810f", ck810f, ck810f, CK810,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck810t", ck810t, ck810t, CK810,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck810fv", ck810fv, ck810fv, CK810,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck810tv", ck810tv, ck810tv, CK810,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck810ft", ck810ff, ck810ft, CK810,
CSKY_ISA_FEAT_NONE)
CSKY_CORE ("ck810ftv", ck810ftv, ck810ftv, CK810,
CSKY_ISA_FEAT_NONE)
#endif
/* Before using #include to read this file, define a macro:
CSKY_FPU(NAME, CNAME, ISA)
NAME is the publicly visible option name.
CNAME is a C-compatible variable name substring.
ISA is the list of feature bits that this FPU provides. */
#ifdef CSKY_FPU
CSKY_FPU ("fpv2_sf", fpv2_sf, CSKY_ISA_FEAT (CSKY_ISA_FPv2_SF))
CSKY_FPU ("fpv2", fpv2, CSKY_ISA_FEAT (CSKY_ISA_FPv2))
CSKY_FPU ("fpv2_divd", fpv2_divd, CSKY_ISA_FEAT (CSKY_ISA_FPv2_DIVD))
#endif

97
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#!/bin/sh
# Generate csky_tables.opt from the lists in *.def.
# Copyright (C) 2018 Free Software Foundation, Inc.
# Contributed by C-SKY Microsystems and Mentor Graphics.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
cat <<EOF
; -*- buffer-read-only: t -*-
; Generated automatically by csky_genopt.sh from csky_cores.def.
; Copyright (C) 2018 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
Enum
Name(csky_processor_type) Type(enum csky_processor_type)
Known CSKY CPUs (for use with the -mcpu= options):
EOF
awk -F'[(, ]+' '/^CSKY_CORE/ {
name = $2
enum = $3
gsub("\"", "", name)
print "EnumValue"
print "Enum(csky_processor_type) String(" name ") Value( TARGET_CPU_" enum ")"
print ""
}' $1/csky_cores.def
cat <<EOF
Enum
Name(csky_arch) Type(int)
Known CSKY architectures (for use with the -march= option):
EOF
awk -F'[(, ]+' 'BEGIN {
value = 0
}
/^CSKY_ARCH/ {
name = $2
gsub("\"", "", name)
print "EnumValue"
print "Enum(csky_arch) String(" name ") Value(" value ")"
print ""
value++
}' $1/csky_cores.def
cat <<EOF
Enum
Name(csky_fpu) Type(enum csky_fpu_type)
Known CSKY FPUs (for use with the -mfpu= option):
EOF
awk -F'[(, ]+' '
/^CSKY_FPU/ {
name = $2
enum = $3
gsub("\"", "", name)
print "EnumValue"
print "Enum(csky_fpu) String(" name ") Value(TARGET_FPU_" enum ")"
print ""
}
END {
print "EnumValue"
print "Enum(csky_fpu) String(auto) Value(TARGET_FPU_auto)"
}' $1/csky_cores.def

95
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;; C-SKY DSP instruction descriptions.
;; Copyright (C) 2018 Free Software Foundation, Inc.
;; Contributed by C-SKY Microsystems and Mentor Graphics.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful, but
;; WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;; General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
;; ------------------------------------------------------------
;; DSP insns
;; ------------------------------------------------------------
(define_insn "mulsidi3"
[(set (match_operand:DI 0 "register_operand" "=y")
(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
(sign_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
"TARGET_DSP"
"muls\t%1, %2"
)
(define_insn "umulsidi3"
[(set (match_operand:DI 0 "register_operand" "=y")
(mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
(zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
"TARGET_DSP"
"mulu\t%1, %2"
)
(define_insn "maddsidi4"
[(set (match_operand:DI 0 "register_operand" "=y")
(plus:DI (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
(sign_extend:DI (match_operand:SI 2 "register_operand" "r")))
(match_operand:DI 3 "register_operand" "0")))]
"TARGET_DSP"
"mulsa\t%1, %2"
)
(define_insn "umaddsidi4"
[(set (match_operand:DI 0 "register_operand" "=y")
(plus:DI (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
(zero_extend:DI (match_operand:SI 2 "register_operand" "r")))
(match_operand:DI 3 "register_operand" "0")))]
"TARGET_DSP"
"mulua\t%1, %2"
)
(define_insn "msubsidi4"
[(set (match_operand:DI 0 "register_operand" "=y")
(minus:DI (match_operand:DI 3 "register_operand" "0")
(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
(sign_extend:DI (match_operand:SI 2 "register_operand" "r")))))]
"TARGET_DSP"
"mulss\t%1, %2"
)
(define_insn "umsubsidi4"
[(set (match_operand:DI 0 "register_operand" "=y")
(minus:DI (match_operand:DI 3 "register_operand" "0")
(mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
(zero_extend:DI (match_operand:SI 2 "register_operand" "r")))))]
"TARGET_DSP"
"mulus\t%1, %2"
)
(define_insn "*mulall_s16_0"
[(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (match_operand:SI 3 "register_operand" " 0")
(mult:SI (match_operand:SI 1 "register_operand" " r")
(match_operand:SI 2 "register_operand" " r"))))]
"CSKY_ISA_FEATURE (3E3r1)"
"mula.32.l\t%0, %1, %2"
[(set_attr "type" "alu")
(set_attr "length" "4")])
(define_insn "*mulall_s16_1"
[(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (mult:SI (match_operand:SI 1 "register_operand" " r")
(match_operand:SI 2 "register_operand" " r"))
(match_operand:SI 3 "register_operand" " 0")))]
"CSKY_ISA_FEATURE (3E3r1)"
"mula.32.l\t%0, %1, %2"
[(set_attr "type" "alu")
(set_attr "length" "4")])

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;; C-SKY FPU instruction descriptions.
;; Copyright (C) 2018 Free Software Foundation, Inc.
;; Contributed by C-SKY Microsystems and Mentor Graphics.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful, but
;; WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;; General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
;; -------------------------------------------------------------------------
;; Float Abs instructions
;; -------------------------------------------------------------------------
(define_insn "abssf2"
[(set (match_operand:SF 0 "register_operand" "=v,r")
(abs:SF (match_operand:SF 1 "register_operand" "v, r")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"@
fabss\t%0, %1
bclri\t%0, %1, 31")
(define_insn "absdf2"
[(set (match_operand:DF 0 "register_operand" "=v")
(abs:DF (match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fabsd\t%0, %1")
;; -------------------------------------------------------------------------
;; Float Neg instructions
;; -------------------------------------------------------------------------
(define_insn "negsf2"
[(set (match_operand:SF 0 "register_operand" "=v")
(neg:SF (match_operand:SF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fnegs\t%0, %1")
(define_insn "negdf2"
[(set (match_operand:DF 0 "register_operand" "=v")
(neg:DF (match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fnegd\t%0, %1")
;; -------------------------------------------------------------------------
;; Float Sqrt instructions
;; -------------------------------------------------------------------------
(define_insn "sqrtsf2"
[(set (match_operand:SF 0 "register_operand" "=v")
(sqrt:SF (match_operand:SF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fsqrts\t%0, %1")
(define_insn "sqrtdf2"
[(set (match_operand:DF 0 "register_operand" "=v")
(sqrt:DF (match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_divd)"
"fsqrtd\t%0, %1")
;; -------------------------------------------------------------------------
;; Float Add instructions
;; -------------------------------------------------------------------------
(define_insn "addsf3"
[(set (match_operand:SF 0 "register_operand" "=v")
(plus:SF (match_operand:SF 1 "register_operand" "v")
(match_operand:SF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fadds\t%0, %1, %2")
(define_insn "adddf3"
[(set (match_operand:DF 0 "register_operand" "=v")
(plus:DF (match_operand:DF 1 "register_operand" "v")
(match_operand:DF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"faddd\t%0, %1, %2")
;; -------------------------------------------------------------------------
;; Float Sub instructions
;; -------------------------------------------------------------------------
(define_insn "subsf3"
[(set (match_operand:SF 0 "register_operand" "=v")
(minus:SF (match_operand:SF 1 "register_operand" "v")
(match_operand:SF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fsubs\t%0, %1, %2")
(define_insn "subdf3"
[(set (match_operand:DF 0 "register_operand" "=v")
(minus:DF (match_operand:DF 1 "register_operand" "v")
(match_operand:DF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fsubd\t%0, %1, %2")
;; -------------------------------------------------------------------------
;; Float Mul instructions
;; -------------------------------------------------------------------------
(define_insn "mulsf3"
[(set (match_operand:SF 0 "register_operand" "=v")
(mult:SF (match_operand:SF 1 "register_operand" "v")
(match_operand:SF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fmuls\t%0, %1, %2")
(define_insn "muldf3"
[(set (match_operand:DF 0 "register_operand" "=v")
(mult:DF (match_operand:DF 1 "register_operand" "v")
(match_operand:DF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fmuld\t%0, %1, %2")
(define_insn "*fpuv2_nmulsf3_1"
[(set (match_operand:SF 0 "register_operand" "=v")
(mult:SF (neg:SF (match_operand:SF 1 "register_operand" "%v"))
(match_operand:SF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fnmuls\t%0, %1, %2")
(define_insn "*fpuv2_nmulsf3_2"
[(set (match_operand:SF 0 "register_operand" "=v")
(neg:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
(match_operand:SF 2 "register_operand" "v"))))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fnmuls\t%0, %1, %2")
(define_insn "*fpuv2_nmuldf3_1"
[(set (match_operand:DF 0 "register_operand" "=v")
(mult:DF (neg:DF (match_operand:DF 1 "register_operand" "%v"))
(match_operand:DF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fnmuld\t%0, %1, %2")
(define_insn "*fpuv2_nmuldf3_2"
[(set (match_operand:DF 0 "register_operand" "=v")
(neg:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
(match_operand:DF 2 "register_operand" "v"))))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fnmuld\t%0, %1, %2")
;; -------------------------------------------------------------------------
;; Float Div instructions
;; -------------------------------------------------------------------------
(define_expand "divsf3"
[(set (match_operand:SF 0 "register_operand" "")
(div:SF (match_operand:SF 1 "csky_arith_float1_operand" "")
(match_operand:SF 2 "register_operand" "")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"")
(define_insn "*fpuv2_divsf3"
[(set (match_operand:SF 0 "register_operand" "=v")
(div:SF (match_operand:SF 1 "register_operand" "v")
(match_operand:SF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fdivs\t%0, %1, %2")
(define_insn "*fpuv2_1_divsf3"
[(set (match_operand:SF 0 "register_operand" "=v")
(div:SF (match_operand:SF 1 "csky_const_float1_operand" "i")
(match_operand:SF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"frecips\t%0, %2")
(define_expand "divdf3"
[(set (match_operand:DF 0 "register_operand" "")
(div:DF (match_operand:DF 1 "csky_arith_float1_operand" "")
(match_operand:DF 2 "register_operand" "")))]
"CSKY_ISA_FEATURE (fpv2_divd)"
"")
(define_insn "*fpuv2_divdf3"
[(set (match_operand:DF 0 "register_operand" "=v")
(div:DF (match_operand:DF 1 "register_operand" "v")
(match_operand:DF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_divd)"
"fdivd\t%0, %1, %2")
(define_insn "*fpuv2_1_divdf3"
[(set (match_operand:DF 0 "register_operand" "=v")
(div:DF (match_operand:DF 1 "csky_const_float1_operand" "i")
(match_operand:DF 2 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_divd)"
"frecipd\t%0, %2")
;; -------------------------------------------------------------------------
;; Float add(sub) with mult instructions
;; -------------------------------------------------------------------------
;; vrz <= vrz + vrx * vry
(define_insn "*fpuv2_fmacs"
[(set (match_operand:SF 0 "register_operand" "=v")
(plus:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
(match_operand:SF 2 "register_operand" "v"))
(match_operand:SF 3 "register_operand" "0")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fmacs\t%0, %1, %2")
(define_insn "*fpuv2_fmacd"
[(set (match_operand:DF 0 "register_operand" "=v")
(plus:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
(match_operand:DF 2 "register_operand" "v"))
(match_operand:DF 3 "register_operand" "0")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fmacd\t%0, %1, %2")
;; vrz <= vrz - vrx * vry
(define_insn "*fpuv2_fnmacs"
[(set (match_operand:SF 0 "register_operand" "=v")
(minus:SF (match_operand:SF 1 "register_operand" "0")
(mult:SF (match_operand:SF 2 "register_operand" "v")
(match_operand:SF 3 "register_operand" "v"))))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fnmacs\t%0, %2, %3")
(define_insn "*fpuv2_fnmacd"
[(set (match_operand:DF 0 "register_operand" "=v")
(minus:DF (match_operand:DF 1 "register_operand" "0")
(mult:DF (match_operand:DF 2 "register_operand" "v")
(match_operand:DF 3 "register_operand" "v"))))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fnmacd\t%0, %2, %3")
;; vrz <= vrx * vry - vrz
(define_insn "*fpuv2_fmscs"
[(set (match_operand:SF 0 "register_operand" "=v")
(minus:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
(match_operand:SF 2 "register_operand" "v"))
(match_operand:SF 3 "register_operand" "0")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fmscs\t%0, %1, %2")
(define_insn "*fpuv2_fmscd"
[(set (match_operand:DF 0 "register_operand" "=v")
(minus:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
(match_operand:DF 2 "register_operand" "v"))
(match_operand:DF 3 "register_operand" "0")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fmscd\t%0, %1, %2")
;; vrz = - (vrz + vrx * vry)
(define_insn "*fpuv2_fnmscs_1"
[(set (match_operand:SF 0 "register_operand" "=v")
(minus:SF (mult:SF (neg:SF (match_operand:SF 1 "register_operand" "%v"))
(match_operand:SF 2 "register_operand" "v"))
(match_operand:SF 3 "register_operand" "0")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fnmscs\t%0, %1, %2")
(define_insn "*fpuv2_fnmscs_2"
[(set (match_operand:SF 0 "register_operand" "=v")
(neg:SF (plus:SF (mult:SF (match_operand:SF 1 "register_operand" "v")
(match_operand:SF 2 "register_operand" "v"))
(match_operand:SF 3 "register_operand" "0"))))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fnmscs\t%0, %1, %2")
(define_insn "*fpuv2_fnmscd_1"
[(set (match_operand:DF 0 "register_operand" "=v")
(minus:DF (mult:DF (neg:DF (match_operand:DF 1 "register_operand" "%v"))
(match_operand:DF 2 "register_operand" "v"))
(match_operand:DF 3 "register_operand" "0")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fnmscd\t%0, %1, %2")
(define_insn "*fpuv2_fnmscd_2"
[(set (match_operand:DF 0 "register_operand" "=v")
(neg:DF (plus:DF (mult:DF (match_operand:DF 1 "register_operand" "v")
(match_operand:DF 2 "register_operand" "v"))
(match_operand:DF 3 "register_operand" "0"))))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fnmscd\t%0, %1, %2")
;; -------------------------------------------------------------------------
;; Float compare instructions
;; -------------------------------------------------------------------------
(define_expand "cbranchsf4"
[(set (pc) (if_then_else (match_operator 0 "csky_float_comparison_operator"
[(match_operand:SF 1 "register_operand")
(match_operand:SF 2 "csky_compare_operand_float")])
(label_ref (match_operand 3 ""))
(pc)))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"
{
enum rtx_code code = GET_CODE (operands[0]);
bool invert = csky_emit_compare_float (code, operands[1], operands[2]);
if (invert)
emit_jump_insn (gen_csky_jbf (operands[3]));
else
emit_jump_insn (gen_csky_jbt (operands[3]));
DONE;
}")
(define_insn "*fpuv2_unordered"
[(set (reg:CC 33) (unordered:CC (match_operand:SF 0 "register_operand" "v")
(match_operand:SF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fcmpuos\t%0, %1")
(define_insn "*fpuv2_unordered_zero"
[(set (reg:CC 33) (unordered:CC (match_operand:SF 0 "register_operand" "v")
(match_operand:SF 1 "csky_const_float0_operand" "i")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fcmpuos\t%0, %0")
(define_insn "*fpuv2_ne"
[(set (reg:CC 33) (ne:CC (match_operand:SF 0 "register_operand" "v")
(match_operand:SF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fcmpnes\t%0, %1")
(define_insn "*fpuv2_gt"
[(set (reg:CC 33) (gt:CC (match_operand:SF 0 "register_operand" "v")
(match_operand:SF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fcmplts\t%1, %0")
(define_insn "*fpuv2_ge"
[(set (reg:CC 33) (ge:CC (match_operand:SF 0 "register_operand" "v")
(match_operand:SF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fcmphss\t%0, %1")
(define_insn "*fpuv2_lt"
[(set (reg:CC 33) (lt:CC (match_operand:SF 0 "register_operand" "v")
(match_operand:SF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fcmplts\t%0, %1")
(define_insn "*fpuv2_le"
[(set (reg:CC 33) (le:CC (match_operand:SF 0 "register_operand" "v")
(match_operand:SF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fcmphss\t%1, %0")
(define_insn "*fpuv2_gez"
[(set (reg:CC 33) (ge:CC (match_operand:SF 0 "register_operand" "v")
(match_operand:SF 1 "csky_const_float0_operand" "i")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fcmpzhss\t%0")
(define_insn "*fpuv2_nez"
[(set (reg:CC 33) (ne:CC (match_operand:SF 0 "register_operand" "v")
(match_operand:SF 1 "csky_const_float0_operand" "i")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fcmpznes\t%0")
(define_expand "cbranchdf4"
[(set (pc) (if_then_else (match_operator 0 "csky_float_comparison_operator"
[(match_operand:DF 1 "register_operand")
(match_operand:DF 2 "csky_compare_operand_float")])
(label_ref (match_operand 3 ""))
(pc)))]
"CSKY_ISA_FEATURE (fpv2_df)"
"
{
enum rtx_code code = GET_CODE (operands[0]);
bool invert = csky_emit_compare_float (code, operands[1], operands[2]);
if (invert)
emit_jump_insn (gen_csky_jbf (operands[3]));
else
emit_jump_insn (gen_csky_jbt (operands[3]));
DONE;
}")
(define_insn "*fpuv2_dunordered"
[(set (reg:CC 33) (unordered:CC (match_operand:DF 0 "register_operand" "v")
(match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fcmpuod\t%0, %1")
(define_insn "*fpuv2_dunordered_zero"
[(set (reg:CC 33) (unordered:CC (match_operand:DF 0 "register_operand" "v")
(match_operand:DF 1 "csky_const_float0_operand" "i")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fcmpuod\t%0, %0")
(define_insn "*fpuv2_dne"
[(set (reg:CC 33) (ne:CC (match_operand:DF 0 "register_operand" "v")
(match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fcmpned\t%0, %1")
(define_insn "*fpuv2_dgt"
[(set (reg:CC 33) (gt:CC (match_operand:DF 0 "register_operand" "v")
(match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fcmpltd\t%1, %0")
(define_insn "*fpuv2_dge"
[(set (reg:CC 33) (ge:CC (match_operand:DF 0 "register_operand" "v")
(match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fcmphsd\t%0, %1")
(define_insn "*fpuv2_dlt"
[(set (reg:CC 33) (lt:CC (match_operand:DF 0 "register_operand" "v")
(match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fcmpltd\t%0, %1")
(define_insn "*fpuv2_dle"
[(set (reg:CC 33) (le:CC (match_operand:DF 0 "register_operand" "v")
(match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fcmphsd\t%1, %0")
(define_insn "*fpuv2_dgez"
[(set (reg:CC 33) (ge:CC (match_operand:DF 0 "register_operand" "v")
(match_operand:DF 1 "csky_const_float0_operand" "i")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fcmpzhsd\t%0")
(define_insn "*fpuv2_dnez"
[(set (reg:CC 33) (ne:CC (match_operand:DF 0 "register_operand" "v")
(match_operand:DF 1 "csky_const_float0_operand" "i")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fcmpzned\t%0")
;; -------------------------------------------------------------------------
;; Float convert instructions
;; -------------------------------------------------------------------------
;; DF <- SF
(define_insn "extendsfdf2"
[(set (match_operand:DF 0 "register_operand" "=v")
(float_extend:DF (match_operand:SF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fstod\t%0, %1")
;; SF <- DF
(define_insn "truncdfsf2"
[(set (match_operand:SF 0 "register_operand" "=v")
(float_truncate:SF (match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fdtos\t%0, %1")
;; SF <- SI
(define_insn "floatsisf2"
[(set (match_operand:SF 0 "register_operand" "=v")
(float:SF (match_operand:SI 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fsitos\t%0, %1")
;; DF <- SI
(define_insn "floatsidf2"
[(set (match_operand:DF 0 "register_operand" "=v")
(float:DF (match_operand:SI 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fsitod\t%0, %1")
;; SF <- unsigned SI
(define_insn "floatunssisf2"
[(set (match_operand:SF 0 "register_operand" "=v")
(unsigned_float:SF (match_operand:SI 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fuitos\t%0, %1")
;; DF <- unsigned SI
(define_insn "floatunssidf2"
[(set (match_operand:DF 0 "register_operand" "=v")
(unsigned_float:DF (match_operand:SI 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fuitod\t%0, %1")
;; SI <- SF
(define_insn "fix_truncsfsi2"
[(set (match_operand:SI 0 "register_operand" "=v")
(fix:SI (match_operand:SF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fstosi.rz\t%0, %1")
;; SI <- DF
(define_insn "fix_truncdfsi2"
[(set (match_operand:SI 0 "register_operand" "=v")
(fix:SI (match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fdtosi.rz\t%0, %1")
;; unsigned SI <- SF
(define_insn "fixuns_truncsfsi2"
[(set (match_operand:SI 0 "register_operand" "=v")
(unsigned_fix:SI (match_operand:SF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"fstoui.rz\t%0, %1")
;; unsigned SI <- DF
(define_insn "fixuns_truncdfsi2"
[(set (match_operand:SI 0 "register_operand" "=v")
(unsigned_fix:SI (match_operand:DF 1 "register_operand" "v")))]
"CSKY_ISA_FEATURE (fpv2_df)"
"fdtoui.rz\t%0, %1")
;; -------------------------------------------------------------------------
;; Float mov instructions
;; -------------------------------------------------------------------------
;; Note: movsf and movdf patterns are in csky.md.
;; cstore SF
(define_expand "cstoresf4"
[(set (match_operand:SI 0 "register_operand" "")
(match_operator 1 "ordered_comparison_operator"
[(match_operand:SF 2 "register_operand" "")
(match_operand:SF 3 "csky_compare_operand_float" "")]))]
"CSKY_ISA_FEATURE (fpv2_sf)"
"
{
bool invert = csky_emit_compare_float (GET_CODE (operands[1]),
operands[2], operands[3]);
if (invert)
emit_insn (gen_mvcv (operands[0]));
else
emit_insn (gen_mvc (operands[0]));
DONE;
}"
)
;; cstore DF
(define_expand "cstoredf4"
[(set (match_operand:SI 0 "register_operand" "")
(match_operator 1 "ordered_comparison_operator"
[(match_operand:DF 2 "register_operand" "")
(match_operand:DF 3 "csky_compare_operand_float" "")]))]
"CSKY_ISA_FEATURE (fpv2_df)"
"
{
bool invert = csky_emit_compare_float (GET_CODE (operands[1]),
operands[2], operands[3]);
if (invert)
emit_insn (gen_mvcv (operands[0]));
else
emit_insn (gen_mvc (operands[0]));
DONE;
}"
)

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/* ISA feature descriptions for the C-SKY back end.
Copyright (C) 2018 Free Software Foundation, Inc.
Contributed by C-SKY Microsystems and Mentor Graphics.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Before using #include to read this file, define a macro:
CSKY_ISA(CNAME, DESCRIPTION)
*/
/* Common insns */
CSKY_ISA (E1, "Extended insns for arch ck801 from base")
CSKY_ISA (E2, "Extended insns for arch ck802 from base")
CSKY_ISA (2E3, "Extended insns for arch ck803 from ck802")
CSKY_ISA (3E3r1, "Extended insns for cpu ck803n from ck803")
CSKY_ISA (3E7, "Extended insns for arch ck807 from ck803")
CSKY_ISA (7E10, "Extended insns for arch ck810 from ck807")
/* Special insns */
CSKY_ISA (div, "divide insns")
/* Extended insns */
CSKY_ISA (dsp, "Extended insns for DSP")
CSKY_ISA (java, "Extended insns for Java")
CSKY_ISA (fpv2_sf, "Single precision operations supported")
CSKY_ISA (fpv2_df, "Double precision operations supported")
CSKY_ISA (fpv2_divd, "Double precision div operations supported")
/* Specific insns mode */
#ifdef CSKY_ISA_MACRO
#define CSKY_ISA_CK801 CSKY_ISA_FEATURE_GET (E1)
#define CSKY_ISA_CK802 CSKY_ISA_FEATURE_GET (E2)
#define CSKY_ISA_CK803 CSKY_ISA_CK802, CSKY_ISA_FEATURE_GET (2E3), \
CSKY_ISA_FEATURE_GET (div)
#define CSKY_ISA_CK803R1 CSKY_ISA_CK803, CSKY_ISA_FEATURE_GET (3E3r1)
#define CSKY_ISA_CK807 CSKY_ISA_CK803, CSKY_ISA_FEATURE_GET (3E7)
#define CSKY_ISA_CK810 CSKY_ISA_CK807, CSKY_ISA_FEATURE_GET (7E10)
#define CSKY_ISA_DSP CSKY_ISA_FEATURE_GET (dsp)
#define CSKY_ISA_FPv2_SF CSKY_ISA_FEATURE_GET (fpv2_sf)
#define CSKY_ISA_FPv2 CSKY_ISA_FPv2_SF, CSKY_ISA_FEATURE_GET (fpv2_df)
#define CSKY_ISA_FPv2_DIVD CSKY_ISA_FPv2, CSKY_ISA_FEATURE_GET (fpv2_divd)
#endif

47
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/* ISA feature enumerations for C-SKY targets.
Copyright (C) 2018 Free Software Foundation, Inc.
Contributed by C-SKY Microsystems and Mentor Graphics.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_CSKY_ISA_FEATURE_H
#define GCC_CSKY_ISA_FEATURE_H
#ifndef CSKY_ISA_MACRO
#define CSKY_ISA_MACRO
#endif
#define CSKY_ISA_FEATURE_DEFINE(x) isa_bit_ ## x
#define CSKY_ISA_FEATURE_GET(x) CSKY_ISA_FEATURE_DEFINE (x)
enum csky_isa_feature
{
CSKY_ISA_FEATURE_DEFINE (none),
#undef CSKY_ISA
#define CSKY_ISA(IDENT, DESC) \
CSKY_ISA_FEATURE_DEFINE (IDENT),
#include "csky_isa.def"
#undef CSKY_ISA
CSKY_ISA_FEATURE_DEFINE (max)
};
#define CSKY_ISA_FEAT(x) x,
#define CSKY_ISA_FEAT_NONE CSKY_ISA_FEAT (isa_bit_none)
#endif /* GCC_CSKY_ISA_FEATURE_H */

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/* Processor and arch enumerations for C-SKY targets.
Copyright (C) 2018 Free Software Foundation, Inc.
Contributed by C-SKY Microsystems and Mentor Graphics.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef CSKY_OPTS_H
#define CSKY_OPTS_H
/* The various CSKY cores. */
enum csky_processor_type
{
#undef CSKY_CORE
#define CSKY_CORE(NAME, INTERNAL_IDENT, IDENT, ARCH, ISA) \
TARGET_CPU_##INTERNAL_IDENT,
#include "csky_cores.def"
#undef CSKY_CORE
/* Used to indicate that no processor has been specified. */
TARGET_CPU_csky_none
};
#define CSKY_TARGET_CORE_GET(name) TARGET_CPU_ ## name
/* The various CSKY architectures. */
enum csky_base_architecture
{
#undef CSKY_ARCH
#define CSKY_ARCH(NAME, CORE_IDENT, ARCH, ISA) \
CSKY_BASE_ARCH_##ARCH,
#include "csky_cores.def"
#undef CSKY_ARCH
CSKY_BASE_ARCH_NONE
};
#define CSKY_TARGET_ARCH_GET(name) CSKY_BASE_ARCH_ ## name
/* The various CSKY FPUs. */
enum csky_fpu_type
{
#undef CSKY_FPU
#define CSKY_FPU(NAME, CNAME, ISA) TARGET_FPU_##CNAME,
#include "csky_cores.def"
TARGET_FPU_auto
#undef CSKY_FPU
};
#define CSKY_TARGET_FPU_GET(name) TARGET_FPU_ ## name
#endif /* CSKY_OPTS_H */

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;; Scheduler information for C-SKY CK801 processors.
;; Copyright (C) 2018 Free Software Foundation, Inc.
;; Contributed by C-SKY Microsystems and Mentor Graphics.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful, but
;; WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;; General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
;; This is just a placeholder for a more accurate pipeline
;; description for CK801.
(define_automaton "ck801")
(define_cpu_unit "ck801_ex1" "ck801")
(define_cpu_unit "ck801_exit" "ck801")
(define_insn_reservation "ck801_generic" 1
(and (match_test "CSKY_TARGET_ARCH (CK801)")
(eq_attr "type" "alu,cmp,branch,cbranch,addsub,alu_ix,branch_jmp,call_jsr,call"))
"ck801_ex1+ck801_exit")
(define_insn_reservation "ck801_load" 1
(and (match_test "CSKY_TARGET_ARCH (CK801)")
(and (eq_attr "type" "load")
(match_test "!csky_minipool_load_p (insn)")))
"ck801_ex1+ck801_exit")
(define_insn_reservation "ck801_pool" 1
(and (match_test "CSKY_TARGET_ARCH (CK801)")
(and (eq_attr "type" "load")
(match_test "csky_minipool_load_p (insn)")))
"ck801_ex1+ck801_exit")
(define_insn_reservation "ck801_store" 1
(and (match_test "CSKY_TARGET_ARCH (CK801)")
(eq_attr "type" "store"))
"ck801_ex1+ck801_exit")
;; Switching between constant pool loads and loads/stores in the data section
;; carries an extra penalty.
(define_bypass 2 "ck801_load,ck801_store" "ck801_pool")
(define_bypass 2 "ck801_pool" "ck801_load,ck801_store")

77
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;; Instruction scheduling information for C-SKY CK802 processors.
;; Copyright (C) 2018 Free Software Foundation, Inc.
;; Contributed by C-SKY Microsystems and Mentor Graphics.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful, but
;; WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;; General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
(define_automaton "csky_ck802")
(define_cpu_unit "csky_ck802_ex" "csky_ck802")
(define_cpu_unit "csky_ck802_wb" "csky_ck802")
(define_insn_reservation "ck802_alu" 2
(and (match_test "CSKY_TARGET_ARCH (CK802)")
(eq_attr "type" "alu"))
"csky_ck802_ex, csky_ck802_wb")
(define_insn_reservation "ck802_branch" 2
(and (match_test "CSKY_TARGET_ARCH (CK802)")
(eq_attr "type" "branch, branch_jmp"))
"csky_ck802_ex, csky_ck802_wb")
(define_insn_reservation "ck802_cmp" 2
(and (match_test "CSKY_TARGET_ARCH (CK802)")
(eq_attr "type" "cmp"))
"csky_ck802_ex, csky_ck802_wb")
(define_insn_reservation "ck802_cbranch" 2
(and (match_test "CSKY_TARGET_ARCH (CK802)")
(eq_attr "type" "cbranch"))
"csky_ck802_ex, csky_ck802_wb")
(define_insn_reservation "ck802_call" 2
(and (match_test "CSKY_TARGET_ARCH (CK802)")
(eq_attr "type" "call, call_jsr"))
"csky_ck802_ex, csky_ck802_wb")
(define_insn_reservation "ck802_load" 2
(and (match_test "CSKY_TARGET_ARCH (CK802)")
(and (eq_attr "type" "load")
(match_test "!csky_minipool_load_p (insn)")))
"csky_ck802_ex, csky_ck802_wb")
(define_insn_reservation "ck802_pool" 2
(and (match_test "CSKY_TARGET_ARCH (CK802)")
(and (eq_attr "type" "load")
(match_test "csky_minipool_load_p (insn)")))
"csky_ck802_ex, csky_ck802_wb")
(define_insn_reservation "ck802_store" 2
(and (match_test "CSKY_TARGET_ARCH (CK802)")
(eq_attr "type" "store"))
"csky_ck802_ex, csky_ck802_wb")
;; Switching between constant pool loads and loads/stores in the data section
;; carries an extra penalty.
(define_bypass 3 "ck802_load,ck802_store" "ck802_pool")
(define_bypass 3 "ck802_pool" "ck802_load,ck802_store")
(define_bypass 1 "*" "ck802_alu")
(define_bypass 1 "*" "ck802_branch")
(define_bypass 2 "ck802_cmp" "ck802_cbranch")

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;; Scheduler information for C-SKY CK803 processors.
;; Copyright (C) 2018 Free Software Foundation, Inc.
;; Contributed by C-SKY Microsystems and Mentor Graphics.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful, but
;; WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;; General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
(define_automaton "ck803")
(define_cpu_unit "ck803_ex1" "ck803")
(define_cpu_unit "ck803_exit" "ck803")
(define_insn_reservation "ck803_3cycle" 1
(and (match_test "CSKY_TARGET_ARCH (CK803)")
(eq_attr "type" "alu,cmp,branch,branch_jmp,call_jsr,call"))
"ck803_ex1+ck803_exit")
(define_insn_reservation "ck803_alu1" 1
(and (match_test "CSKY_TARGET_ARCH (CK803)")
(eq_attr "type" "addsub,alu_ix"))
"ck803_ex1+ck803_exit")
(define_insn_reservation "ck803_cbranch" 1
(and (match_test "CSKY_TARGET_ARCH (CK803)")
(eq_attr "type" "cbranch"))
"ck803_ex1+ck803_exit")
(define_insn_reservation "ck803_load" 1
(and (match_test "CSKY_TARGET_ARCH (CK803)")
(and (eq_attr "type" "load")
(match_test "!csky_minipool_load_p (insn)")))
"ck803_ex1+ck803_exit")
(define_insn_reservation "ck803_pool" 1
(and (match_test "CSKY_TARGET_ARCH (CK803)")
(and (eq_attr "type" "load")
(match_test "csky_minipool_load_p (insn)")))
"ck803_ex1+ck803_exit")
(define_insn_reservation "ck803_store" 1
(and (match_test "CSKY_TARGET_ARCH (CK803)")
(eq_attr "type" "store"))
"ck803_ex1+ck803_exit")
;; Switching between constant pool loads and loads/stores in the data section
;; carries an extra penalty.
(define_bypass 2 "ck803_load,ck803_store" "ck803_pool")
(define_bypass 2 "ck803_pool" "ck803_load,ck803_store")
(define_bypass 2 "ck803_3cycle,ck803_cbranch,ck803_load,ck803_store,ck803_pool"
"ck803_cbranch")

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gcc/config/csky/csky_pipeline_ck810.md Normal file
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;; Instruction scheduling information for C-SKY CK810 processors.
;; Copyright (C) 2018 Free Software Foundation, Inc.
;; Contributed by C-SKY Microsystems and Mentor Graphics.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful, but
;; WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;; General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
;;-------------------------------------------------------------
;; Pipeline descriptions for ck810
;;-------------------------------------------------------------
(define_attr "cycle" "1,2,not_used_yet"
(const_string "1"))
(define_automaton "cskyv2_ck810")
(define_cpu_unit "pipeline_alu0" "cskyv2_ck810")
(define_insn_reservation "alu_one_cycle" 1
(and (eq_attr "cycle" "1")
(not (ior (match_test "CSKY_TARGET_ARCH (CK803)")
(match_test "CSKY_TARGET_ARCH (CK802)"))))
"pipeline_alu0")

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; -*- buffer-read-only: t -*-
; Generated automatically by csky_genopt.sh from csky_cores.def.
; Copyright (C) 2018 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
Enum
Name(csky_processor_type) Type(enum csky_processor_type)
Known CSKY CPUs (for use with the -mcpu= options):
EnumValue
Enum(csky_processor_type) String(ck801) Value( TARGET_CPU_ck801)
EnumValue
Enum(csky_processor_type) String(ck801t) Value( TARGET_CPU_ck801t)
EnumValue
Enum(csky_processor_type) String(ck802) Value( TARGET_CPU_ck802)
EnumValue
Enum(csky_processor_type) String(ck802t) Value( TARGET_CPU_ck802t)
EnumValue
Enum(csky_processor_type) String(ck802j) Value( TARGET_CPU_ck802j)
EnumValue
Enum(csky_processor_type) String(ck803) Value( TARGET_CPU_ck803)
EnumValue
Enum(csky_processor_type) String(ck803h) Value( TARGET_CPU_ck803h)
EnumValue
Enum(csky_processor_type) String(ck803t) Value( TARGET_CPU_ck803t)
EnumValue
Enum(csky_processor_type) String(ck803ht) Value( TARGET_CPU_ck803ht)
EnumValue
Enum(csky_processor_type) String(ck803f) Value( TARGET_CPU_ck803f)
EnumValue
Enum(csky_processor_type) String(ck803fh) Value( TARGET_CPU_ck803fh)
EnumValue
Enum(csky_processor_type) String(ck803e) Value( TARGET_CPU_ck803e)
EnumValue
Enum(csky_processor_type) String(ck803eh) Value( TARGET_CPU_ck803eh)
EnumValue
Enum(csky_processor_type) String(ck803et) Value( TARGET_CPU_ck803et)
EnumValue
Enum(csky_processor_type) String(ck803eht) Value( TARGET_CPU_ck803eht)
EnumValue
Enum(csky_processor_type) String(ck803ef) Value( TARGET_CPU_ck803ef)
EnumValue
Enum(csky_processor_type) String(ck803efh) Value( TARGET_CPU_ck803efh)
EnumValue
Enum(csky_processor_type) String(ck803ft) Value( TARGET_CPU_ck803ft)
EnumValue
Enum(csky_processor_type) String(ck803eft) Value( TARGET_CPU_ck803eft)
EnumValue
Enum(csky_processor_type) String(ck803efht) Value( TARGET_CPU_ck803efht)
EnumValue
Enum(csky_processor_type) String(ck803r1) Value( TARGET_CPU_ck803r1)
EnumValue
Enum(csky_processor_type) String(ck803hr1) Value( TARGET_CPU_ck803hr1)
EnumValue
Enum(csky_processor_type) String(ck803tr1) Value( TARGET_CPU_ck803tr1)
EnumValue
Enum(csky_processor_type) String(ck803htr1) Value( TARGET_CPU_ck803htr1)
EnumValue
Enum(csky_processor_type) String(ck803fr1) Value( TARGET_CPU_ck803fr1)
EnumValue
Enum(csky_processor_type) String(ck803fhr1) Value( TARGET_CPU_ck803fhr1)
EnumValue
Enum(csky_processor_type) String(ck803er1) Value( TARGET_CPU_ck803er1)
EnumValue
Enum(csky_processor_type) String(ck803ehr1) Value( TARGET_CPU_ck803ehr1)
EnumValue
Enum(csky_processor_type) String(ck803etr1) Value( TARGET_CPU_ck803etr1)
EnumValue
Enum(csky_processor_type) String(ck803ehtr1) Value( TARGET_CPU_ck803ehtr1)
EnumValue
Enum(csky_processor_type) String(ck803efr1) Value( TARGET_CPU_ck803efr1)
EnumValue
Enum(csky_processor_type) String(ck803efhr1) Value( TARGET_CPU_ck803efhr1)
EnumValue
Enum(csky_processor_type) String(ck803ftr1) Value( TARGET_CPU_ck803ftr1)
EnumValue
Enum(csky_processor_type) String(ck803eftr1) Value( TARGET_CPU_ck803eftr1)
EnumValue
Enum(csky_processor_type) String(ck803efhtr1) Value( TARGET_CPU_ck803efhtr1)
EnumValue
Enum(csky_processor_type) String(ck803s) Value( TARGET_CPU_ck803s)
EnumValue
Enum(csky_processor_type) String(ck803st) Value( TARGET_CPU_ck803st)
EnumValue
Enum(csky_processor_type) String(ck803se) Value( TARGET_CPU_ck803se)
EnumValue
Enum(csky_processor_type) String(ck803sf) Value( TARGET_CPU_ck803sf)
EnumValue
Enum(csky_processor_type) String(ck803sef) Value( TARGET_CPU_ck803sef)
EnumValue
Enum(csky_processor_type) String(ck803seft) Value( TARGET_CPU_ck803seft)
EnumValue
Enum(csky_processor_type) String(ck807e) Value( TARGET_CPU_ck807e)
EnumValue
Enum(csky_processor_type) String(ck807ef) Value( TARGET_CPU_ck807ef)
EnumValue
Enum(csky_processor_type) String(ck807) Value( TARGET_CPU_ck807)
EnumValue
Enum(csky_processor_type) String(ck807f) Value( TARGET_CPU_ck807f)
EnumValue
Enum(csky_processor_type) String(ck810e) Value( TARGET_CPU_ck810e)
EnumValue
Enum(csky_processor_type) String(ck810et) Value( TARGET_CPU_ck810et)
EnumValue
Enum(csky_processor_type) String(ck810ef) Value( TARGET_CPU_ck810ef)
EnumValue
Enum(csky_processor_type) String(ck810eft) Value( TARGET_CPU_ck810eft)
EnumValue
Enum(csky_processor_type) String(ck810) Value( TARGET_CPU_ck810)
EnumValue
Enum(csky_processor_type) String(ck810v) Value( TARGET_CPU_ck810v)
EnumValue
Enum(csky_processor_type) String(ck810f) Value( TARGET_CPU_ck810f)
EnumValue
Enum(csky_processor_type) String(ck810t) Value( TARGET_CPU_ck810t)
EnumValue
Enum(csky_processor_type) String(ck810fv) Value( TARGET_CPU_ck810fv)
EnumValue
Enum(csky_processor_type) String(ck810tv) Value( TARGET_CPU_ck810tv)
EnumValue
Enum(csky_processor_type) String(ck810ft) Value( TARGET_CPU_ck810ff)
EnumValue
Enum(csky_processor_type) String(ck810ftv) Value( TARGET_CPU_ck810ftv)
Enum
Name(csky_arch) Type(int)
Known CSKY architectures (for use with the -march= option):
EnumValue
Enum(csky_arch) String(ck801) Value(0)
EnumValue
Enum(csky_arch) String(ck802) Value(1)
EnumValue
Enum(csky_arch) String(ck803) Value(2)
EnumValue
Enum(csky_arch) String(ck807) Value(3)
EnumValue
Enum(csky_arch) String(ck810) Value(4)
Enum
Name(csky_fpu) Type(enum csky_fpu_type)
Known CSKY FPUs (for use with the -mfpu= option):
EnumValue
Enum(csky_fpu) String(fpv2_sf) Value(TARGET_FPU_fpv2_sf)
EnumValue
Enum(csky_fpu) String(fpv2) Value(TARGET_FPU_fpv2)
EnumValue
Enum(csky_fpu) String(fpv2_divd) Value(TARGET_FPU_fpv2_divd)
EnumValue
Enum(csky_fpu) String(auto) Value(TARGET_FPU_auto)

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;; Predicates for C-SKY.
;; Copyright (C) 2018 Free Software Foundation, Inc.
;; Contributed by C-SKY Microsystems and Mentor Graphics.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful, but
;; WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;; General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
;; Return 1 if OP is a load multiple operation.
(define_predicate "csky_load_multiple_operation"
(match_code "parallel")
{
int count = XVECLEN (op, 0);
int dest_regno;
rtx src_addr;
int i;
/* Perform a quick check so we don't blow up below. */
if (count <= 1
|| GET_CODE (XVECEXP (op, 0, 0)) != SET
|| GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
|| GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM
|| GET_CODE (XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0)) != REG
|| XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0) != stack_pointer_rtx)
return 0;
dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
for (i = 1; i < count; i++)
{
rtx elt = XVECEXP (op, 0, i);
if (GET_CODE (elt) != SET
|| GET_CODE (SET_DEST (elt)) != REG
|| GET_MODE (SET_DEST (elt)) != SImode
|| REGNO (SET_DEST (elt)) != (unsigned) (dest_regno + i)
|| GET_CODE (SET_SRC (elt)) != MEM
|| GET_MODE (SET_SRC (elt)) != SImode
|| GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
|| ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
|| GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
|| INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
return 0;
}
return 1;
})
;; Similar, for store multiple.
(define_predicate "csky_store_multiple_operation"
(match_code "parallel")
{
int count = XVECLEN (op, 0);
int src_regno;
rtx dest_addr;
int i;
/* Perform a quick check so we don't blow up below. */
if (count <= 1
|| GET_CODE (XVECEXP (op, 0, 0)) != SET
|| GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
|| GET_CODE (XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0)) != REG
|| XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0) != stack_pointer_rtx
|| GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
return 0;
src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
for (i = 1; i < count; i++)
{
rtx elt = XVECEXP (op, 0, i);
if (GET_CODE (elt) != SET
|| GET_CODE (SET_SRC (elt)) != REG
|| GET_MODE (SET_SRC (elt)) != SImode
|| REGNO (SET_SRC (elt)) != (unsigned) (src_regno + i)
|| GET_CODE (SET_DEST (elt)) != MEM
|| GET_MODE (SET_DEST (elt)) != SImode
|| GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
|| ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
|| GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
|| INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
return 0;
}
return 1;
})
(define_predicate "csky_arith_K_operand"
(match_code "reg,subreg,const_int")
{
if (register_operand (op, mode))
return 1;
if (CONST_INT_P (op) && CSKY_CONST_OK_FOR_K (INTVAL (op)))
return 1;
return 0;
})
(define_predicate "csky_literal_K_operand"
(match_code "const_int")
{
if (CONST_INT_P (op) && CSKY_CONST_OK_FOR_K (INTVAL (op)))
return 1;
return 0;
})
(define_predicate "csky_literal_I_operand"
(match_code "const_int")
{
if (CONST_INT_P (op) && CSKY_CONST_OK_FOR_I (INTVAL (op)))
return 1;
return 0;
})
(define_predicate "csky_literal_J_operand"
(match_code "const_int")
{
if (CONST_INT_P (op) && CSKY_CONST_OK_FOR_J (INTVAL (op)))
return 1;
return 0;
})
(define_predicate "csky_literal_Uk_operand"
(match_code "const_int")
{
if (CONST_INT_P (op) && CSKY_CONST_OK_FOR_Uk (INTVAL (op)))
return 1;
return 0;
})
;; Nonzero if OP is a register or constant value of 1
(define_predicate "csky_arith_int1_operand"
(match_code "reg,subreg,const_int")
{
if (register_operand (op, mode))
return 1;
if (op == const1_rtx)
return 1;
return 0;
})
;; Nonzero if OP is legal address for function call
(define_predicate "csky_call_address_operand"
(match_code "reg,subreg,symbol_ref")
{
if (!flag_pic && (GET_CODE (op) == SYMBOL_REF))
return 1;
if (register_operand (op, mode))
return 1;
return 0;
})
;; Nonzero if OP is a valid source operand for a compare operation.
(define_predicate "csky_compare_operand"
(match_code "const_int,reg,subreg")
{
if (register_operand (op, mode))
return 1;
if (GET_CODE (op) == CONST_INT && INTVAL (op) == 0)
return 1;
return 0;
})
(define_predicate "csky_literal_K_Uh_operand"
(match_code "const_int")
{
if (CONST_INT_P (op)
&& (CSKY_CONST_OK_FOR_K (INTVAL (op))
|| CSKY_CONST_OK_FOR_Uh (INTVAL (op))))
return 1;
return 0;
})
;; True if OP is a mem with an reg + optional displacement address.
(define_predicate "csky_simple_mem_operand"
(and (match_operand 0 "memory_operand")
(match_test "csky_simple_addr_operand_p (XEXP (op, 0))")))
(define_predicate "csky_arith_any_imm_operand"
(match_code "const_int,reg,subreg")
{
if (register_operand (op, mode))
return 1;
if (CONST_INT_P (op))
return 1;
return 0;
})
(define_predicate "csky_arith_O_operand"
(match_code "reg,subreg,const_int")
{
if (register_operand (op, mode))
return 1;
if (CONST_INT_P (op) && CSKY_CONST_OK_FOR_O (INTVAL (op)))
return 1;
return 0;
})
(define_predicate "csky_unspec_operand"
(match_code "unspec")
{
if (op == NULL || GET_CODE(op) != UNSPEC)
return 0;
return 1;
}
)
(define_predicate "csky_const_float1_operand"
(and (match_code "const_double")
(match_test "(op == CONST1_RTX (mode))")))
(define_predicate "csky_arith_float1_operand"
(ior (match_operand 0 "register_operand")
(match_operand 0 "csky_const_float1_operand")))
(define_predicate "csky_const_float0_operand"
(and (match_code "const_double")
(match_test "(op == CONST0_RTX (mode))")))
(define_predicate "csky_compare_operand_float"
(ior (match_operand 0 "register_operand")
(match_operand 0 "csky_const_float0_operand")))
(define_special_predicate "registers_push"
(match_code "parallel")
{
if ((GET_CODE (XVECEXP (op, 0, 0)) != SET)
|| (GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != UNSPEC)
|| (XINT (SET_SRC (XVECEXP (op, 0, 0)), 1) != UNSPEC_PUSHPOP_MULT))
return false;
return true;
})
(define_special_predicate "registers_pop"
(match_code "parallel")
{
if ((GET_CODE (XVECEXP (op, 0, 1)) != SET)
|| (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) != UNSPEC)
|| (XINT (SET_SRC (XVECEXP (op, 0, 1)), 1) != UNSPEC_PUSHPOP_MULT))
return false;
return true;
})
(define_predicate "push_memory_operand"
(match_code "mem")
{
rtx x = XEXP (op, 0);
if (GET_CODE (x) != PRE_MODIFY)
return false;
if (XEXP (x, 0) != stack_pointer_rtx)
return false;
x = XEXP (x, 1);
if (GET_CODE (x) != PLUS)
return false;
if (XEXP (x, 0) != stack_pointer_rtx)
return false;
return CONST_INT_P (XEXP (x, 1));
})
(define_predicate "pop_memory_operand"
(match_code "mem")
{
rtx x = XEXP (op, 0);
if (GET_CODE (x) != POST_MODIFY)
return false;
if (XEXP (x, 0) != stack_pointer_rtx)
return false;
x = XEXP (x, 1);
if (GET_CODE (x) != PLUS)
return false;
if (XEXP (x, 0) != stack_pointer_rtx)
return false;
return CONST_INT_P (XEXP (x, 1));
})
(define_special_predicate "csky_float_comparison_operator"
(match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,
unordered,ordered"))

147
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#! /bin/sh
# Script to generate SYSROOT_SUFFIX_SPEC equivalent to MULTILIB_OSDIRNAMES
# Arguments are MULTILIB_OSDIRNAMES, MULTILIB_OPTIONS and MULTILIB_MATCHES.
# Copyright (C) 2018 Free Software Foundation, Inc.
# Contributed by C-SKY Microsystems and Mentor Graphics.
# This file is part of GCC.
# GCC is free software; you can redistribute it and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation; either version 3, or (at your option) any later
# version.
# GCC is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for more details.
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
# This shell script produces a header file fragment that defines
# SYSROOT_SUFFIX_SPEC. It assumes that the sysroots will have the same
# structure and names used by the multilibs.
# Invocation:
# print-sysroot-suffix.sh \
# MULTILIB_OSDIRNAMES \
# MULTILIB_OPTIONS \
# MULTILIB_MATCHES \
# > t-sysroot-suffix.h
# The three options exactly correspond to the variables of the same
# names defined in the tmake_file fragments.
# Example:
# sh ./gcc/config/print-sysroot-suffix.sh "a=A" "a b/c/d" ""
# =>
# #undef SYSROOT_SUFFIX_SPEC
# #define SYSROOT_SUFFIX_SPEC "" \
# "%{a:" \
# "%{b:A/b/;" \
# "c:A/c/;" \
# "d:A/d/;" \
# ":A/};" \
# ":}"
# The script uses temporary subscripts in order to permit a recursive
# algorithm without the use of functions.
set -e
dirnames="$1"
options="$2"
matches="$3"
cat > print-sysroot-suffix3.sh <<\EOF
#! /bin/sh
# Print all the multilib matches for this option
result="$1"
EOF
for x in $matches; do
l=`echo $x | sed -e 's/=.*$//' -e 's/?/=/g'`
r=`echo $x | sed -e 's/^.*=//' -e 's/?/=/g'`
echo "[ \"\$1\" = \"$l\" ] && result=\"\$result|$r\"" >> print-sysroot-suffix3.sh
done
echo 'echo $result' >> print-sysroot-suffix3.sh
chmod +x print-sysroot-suffix3.sh
cat > print-sysroot-suffix2.sh <<\EOF
#! /bin/sh
# Recursive script to enumerate all multilib combinations, match against
# multilib directories and output a spec string of the result.
# Will fold identical trees.
padding="$1"
optstring="$2"
shift 2
n="\" \\
$padding\""
if [ $# = 0 ]; then
EOF
pat=
for x in $dirnames; do
# p=`echo $x | sed -e 's,=!,/$=/,'`
p=`echo $x | sed -e 's/=//g'`
# pat="$pat -e 's=^//$p='"
pat="$pat -e 's/$p/g'"
done
echo ' optstring=`echo "/$optstring" | sed '"$pat\`" >> print-sysroot-suffix2.sh
cat >> print-sysroot-suffix2.sh <<\EOF
case $optstring in
//*)
;;
*)
echo "$optstring"
;;
esac
else
thisopt="$1"
shift
bit=
lastcond=
result=
for x in `echo "$thisopt" | sed -e 's,/, ,g'`; do
case $x in
EOF
for x in `echo "$options" | sed -e 's,/, ,g'`; do
match=`./print-sysroot-suffix3.sh "$x"`
echo "$x) optmatch=\"$match\" ;;" >> print-sysroot-suffix2.sh
done
cat >> print-sysroot-suffix2.sh <<\EOF
esac
bit=`"$0" "$padding " "$optstring$x/" "$@"`
if [ -z "$lastopt" ]; then
lastopt="$optmatch"
else
if [ "$lastbit" = "$bit" ]; then
lastopt="$lastopt|$optmatch"
else
result="$result$lastopt:$lastbit;$n"
lastopt="$optmatch"
fi
fi
lastbit="$bit"
done
bit=`"$0" "$padding " "$optstring" "$@"`
if [ "$bit" = "$lastbit" ]; then
if [ -z "$result" ]; then
echo "$bit"
else
echo "$n%{$result:$bit}"
fi
else
echo "$n%{$result$lastopt:$lastbit;$n:$bit}"
fi
fi
EOF
chmod +x ./print-sysroot-suffix2.sh
result=`./print-sysroot-suffix2.sh \"\" \"\" $options`
echo "#undef SYSROOT_SUFFIX_SPEC"
echo "#define SYSROOT_SUFFIX_SPEC \"$result\""
rm print-sysroot-suffix2.sh
rm print-sysroot-suffix3.sh

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# Make rules for all C-SKY targets.
#
# Copyright (C) 2018 Free Software Foundation, Inc.
# Contributed by C-SKY Microsystems and Mentor Graphics.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
TM_H += $(srcdir)/config/csky/csky_cores.def
OPTIONS_H_EXTRA += $(srcdir)/config/csky/csky_cores.def
$(srcdir)/config/csky/csky_tables.opt: $(srcdir)/config/csky/csky_genopt.sh \
$(srcdir)/config/csky/csky_cores.def
$(SHELL) $(srcdir)/config/csky/csky_genopt.sh $(srcdir)/config/csky > \
$(srcdir)/config/csky/csky_tables.opt

107
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# Multilib configuration for csky*-elf.
#
# Copyright (C) 2018 Free Software Foundation, Inc.
# Contributed by C-SKY Microsystems and Mentor Graphics.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
# Endiannesses.
MULTILIB_OPTIONS = mlittle-endian/mbig-endian
MULTILIB_DIRNAMES = little big
MULTILIB_MATCHES = mlittle-endian=EL
MULTILIB_MATCHES = mbig-endian=EB
MULTILIB_EXCEPTIONS =
# Arch variants.
MULTILIB_OPTIONS += mcpu=ck802/mcpu=ck801/mcpu=ck803f/mcpu=ck807f/mcpu=ck810f
MULTILIB_DIRNAMES += ck802 ck801 ck803 ck807 ck810
# For arch ck802.
MULTILIB_MATCHES += mcpu?ck802=march?ck802
MULTILIB_MATCHES += mcpu?ck802=mcpu?ck802t
MULTILIB_MATCHES += mcpu?ck802=mcpu?ck802j
# For arch ck801.
MULTILIB_MATCHES += mcpu?ck801=march?ck801
MULTILIB_MATCHES += mcpu?ck801=mcpu?ck801t
# For arch ck803.
MULTILIB_MATCHES += mcpu?ck803f=march?ck803
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803fh
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803h
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803t
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803ht
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803e
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803eh
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803et
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803eht
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803ef
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803efh
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803ft
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803eft
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803efht
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803r1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803fr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803fhr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803hr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803tr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803htr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803er1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803ehr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803etr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803ehtr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803efr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803efhr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803ftr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803eftr1
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803efhtr1
# For arch ck803s.
MULTILIB_MATCHES += mcpu?ck803f=march?ck803s
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803s
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803st
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803se
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803sf
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803sef
MULTILIB_MATCHES += mcpu?ck803f=mcpu?ck803seft
# For arch ck810.
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810e
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810et
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810ef
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810eft
MULTILIB_MATCHES += mcpu?ck810f=march?ck810
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810v
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810t
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810vf
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810tv
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810ft
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810ftv
# For arch ck807.
MULTILIB_MATCHES += mcpu?ck807f=march?ck807e
MULTILIB_MATCHES += mcpu?ck807f=march?ck807ef
MULTILIB_MATCHES += mcpu?ck807f=march?ck807
MULTILIB_MATCHES += mcpu?ck807f=mcpu?ck807
# For option -msoft-float/-mhard-float.
MULTILIB_OPTIONS += msoft-float/mhard-float
MULTILIB_DIRNAMES += soft-fp hard-fp
MULTILIB_EXCEPTIONS += *mcpu=ck801/*mhard-float*
MULTILIB_EXCEPTIONS += *mcpu=ck802/*mhard-float*

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# Multilib configuration for csky*-linux-*.
#
# Copyright (C) 2018 Free Software Foundation, Inc.
# Contributed by C-SKY Microsystems and Mentor Graphics.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
# Endiannesses.
MULTILIB_OPTIONS = mlittle-endian/mbig-endian
MULTILIB_DIRNAMES = little big
MULTILIB_MATCHES = mlittle-endian=EL
MULTILIB_MATCHES = mbig-endian=EB
MULTILIB_EXCEPTIONS =
CSKY_MULTILIB_OSDIRNAMES = mbig-endian=/big mlittle-endian=/. mhard-float=/hard-fp msoft-float=/. mcpu.ck810f=/. mcpu.ck807f=/ck807
# Arch variants.
MULTILIB_OPTIONS += mcpu=ck810f/mcpu=ck807f
MULTILIB_DIRNAMES += ck810 ck807
# For ck807.
MULTILIB_MATCHES += mcpu?ck807f=march?ck807
MULTILIB_MATCHES += mcpu?ck807f=mcpu?ck807
# For arch ck810.
MULTILIB_MATCHES += mcpu?ck810f=march?ck810
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810v
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810t
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810vt
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810vf
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810ft
MULTILIB_MATCHES += mcpu?ck810f=mcpu?ck810vft
# For option -msoft-float/-mhard-float.
MULTILIB_OPTIONS += msoft-float/mhard-float
MULTILIB_DIRNAMES += soft-fp hard-fp

28
gcc/config/csky/t-sysroot-suffix Normal file
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# Makefile fragment for C-SKY sysroot suffix.
#
# Copyright (C) 2018 Free Software Foundation, Inc.
# Contributed by C-SKY Microsystems and Mentor Graphics.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
# Generate SYSROOT_SUFFIX_SPEC from MULTILIB_OSDIRNAMES.
sysroot-suffix.h: $(srcdir)/config/csky/print-sysroot-suffix.sh
$(SHELL) $(srcdir)/config/csky/print-sysroot-suffix.sh \
"$(CSKY_MULTILIB_OSDIRNAMES)" "$(MULTILIB_OPTIONS)" \
"$(MULTILIB_MATCHES)" > tmp-sysroot-suffix.h
mv tmp-sysroot-suffix.h $@