dp-hack.h: Add support for ARCHS.
2015-11-11 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/dp-hack.h: Add support for ARCHS. * config/arc/ieee-754/divdf3.S: Likewise. * config/arc/ieee-754/divsf3-stdmul.S: Likewise. * config/arc/ieee-754/muldf3.S: Likewise. * config/arc/ieee-754/mulsf3.S: Likewise * config/arc/lib1funcs.S: Likewise * config/arc/gmon/dcache_linesz.S: Don't read the build register for ARCv2 cores. * config/arc/gmon/profil.S (__profil, __profil_irq): Don't profile for ARCv2 cores. * config/arc/ieee-754/arc-ieee-754.h (MPYHU, MPYH): Define. * config/arc/t-arc700-uClibc: Remove hard selection for ARC 700 cores. From-SVN: r230151
This commit is contained in:
Claudiu Zissulescu
Claudiu Zissulescu
parent
35e2b6e162
commit
c0ab1970b9
11 changed files with 91 additions and 31 deletions
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@ -1,3 +1,19 @@
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2015-11-11 Claudiu Zissulescu <claziss@synopsys.com>
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* config/arc/dp-hack.h: Add support for ARCHS.
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* config/arc/ieee-754/divdf3.S: Likewise.
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* config/arc/ieee-754/divsf3-stdmul.S: Likewise.
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* config/arc/ieee-754/muldf3.S: Likewise.
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* config/arc/ieee-754/mulsf3.S: Likewise
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* config/arc/lib1funcs.S: Likewise
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* config/arc/gmon/dcache_linesz.S: Don't read the build register
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for ARCv2 cores.
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* config/arc/gmon/profil.S (__profil, __profil_irq): Don't profile
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for ARCv2 cores.
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* config/arc/ieee-754/arc-ieee-754.h (MPYHU, MPYH): Define.
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* config/arc/t-arc700-uClibc: Remove hard selection for ARC 700
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cores.
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2015-11-09 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
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* config/ia64/crtbegin.S: Check HAVE_INITFINI_ARRAY_SUPPORT
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@ -48,7 +48,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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#define L_mul_df
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#define L_div_df
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#elif (!defined (__ARC700__) && !defined (__ARC_MUL64__) \
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&& !defined(__ARC_MUL32BY16__))
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&& !defined (__ARC_MUL32BY16__) && !defined (__HS__))
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#define L_mul_df
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#define L_div_df
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#undef QUIET_NAN
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@ -38,6 +38,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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.global __dcache_linesz
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.balign 4
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__dcache_linesz:
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#if !defined (__EM__) && !defined (__HS__)
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lr r12,[D_CACHE_BUILD]
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extb_s r0,r12
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breq_s r0,0,.Lsz_nocache
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@ -51,5 +52,6 @@ __dcache_linesz:
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asl_s r0,r0,r12
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j_s [blink]
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.Lsz_nocache:
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#endif /* !__EM__ && !__HS__ */
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mov_s r0,1
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j_s [blink]
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@ -45,6 +45,7 @@ __profil_offset:
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.global __dcache_linesz
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.global __profil
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FUNC(__profil)
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#if !defined (__EM__) && !defined (__HS__)
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.Lstop_profiling:
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sr r0,[CONTROL0]
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j_s [blink]
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@ -107,6 +108,12 @@ nocache:
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j_s [blink]
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.balign 4
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1: j __profil_irq
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#else
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__profil:
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.balign 4
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mov_s r0,-1
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j_s [blink]
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#endif /* !__EM__ && !__HS__ */
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ENDFUNC(__profil)
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FUNC(__profil_irq)
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@ -114,6 +121,7 @@ nocache:
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.balign 32,0,12 ; make sure the code spans no more that two cache lines
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nop_s
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__profil_irq:
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#if !defined (__EM__) && !defined (__HS__)
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push_s r0
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ld r0,[__profil_offset]
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push_s r1
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@ -128,6 +136,9 @@ __profil_irq:
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nostore:ld.ab r2,[sp,8]
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pop_s r0
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j.f [ilink1]
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#else
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rtie
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#endif /* !__EM__ && !__HS__ */
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ENDFUNC(__profil_irq)
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; could save one cycle if the counters were allocated at link time and
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@ -54,3 +54,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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#define bmsk_l bmsk
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#define bxor_l bxor
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#define bcs_s blo_s
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#if defined (__HS__) || defined (__EM__)
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#define MPYHU mpymu
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#define MPYH mpym
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#else
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#define MPYHU mpyhu
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#define MPYH mpyh
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#endif
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@ -118,7 +118,7 @@ __divdf3_support: /* This label makes debugger output saner. */
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sub r11,r11,11
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asl DBL1L,DBL1L,r11
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sub r11,r11,1
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mpyhu r5,r4,r8
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MPYHU r5,r4,r8
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sub r7,r7,r11
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asl r4,r4,12
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b.d .Lpast_denorm_dbl1
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@ -189,25 +189,33 @@ __divdf3:
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asl r8,DBL1H,12
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lsr r12,DBL1L,20
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lsr r4,r8,26
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#ifdef __HS__
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add3 r10,pcl,60 ; (.Ldivtab-.) >> 3
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#else
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add3 r10,pcl,59 ; (.Ldivtab-.) >> 3
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#endif
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ld.as r4,[r10,r4]
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#ifdef __HS__
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ld.as r9,[pcl,182]; [pcl,(-((.-.L7ff00000) >> 2))] ; 0x7ff00000
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#else
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ld.as r9,[pcl,180]; [pcl,(-((.-.L7ff00000) >> 2))] ; 0x7ff00000
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#endif
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or r8,r8,r12
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mpyhu r5,r4,r8
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MPYHU r5,r4,r8
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and.f r7,DBL1H,r9
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asl r4,r4,12 ; having the asl here is a concession to the XMAC pipeline.
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beq.d .Ldenorm_dbl1
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and r6,DBL0H,r9
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.Lpast_denorm_dbl1: ; wb stall
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sub r4,r4,r5
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mpyhu r5,r4,r4
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MPYHU r5,r4,r4
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breq.d r6,0,.Ldenorm_dbl0
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lsr r8,r8,1
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asl r12,DBL0H,11
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lsr r10,DBL0L,21
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.Lpast_denorm_dbl0: ; wb stall
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bset r8,r8,31
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mpyhu r11,r5,r8
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MPYHU r11,r5,r8
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add_s r12,r12,r10
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bset r5,r12,31
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cmp r5,r8
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@ -215,7 +223,7 @@ __divdf3:
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; wb stall
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lsr.cc r5,r5,1
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sub r4,r4,r11 ; u1.31 inverse, about 30 bit
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mpyhu r11,r5,r4 ; result fraction highpart
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MPYHU r11,r5,r4 ; result fraction highpart
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breq r7,r9,.Linf_nan_dbl1
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lsr r8,r8,2 ; u3.29
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add r5,r6, /* wait for immediate / XMAC wb stall */ \
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@ -226,7 +234,7 @@ __divdf3:
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asl_s DBL1L,DBL1L,9 ; u-29.23:9
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sbc r6,r5,r7
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; resource conflict (not for XMAC)
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mpyhu r5,r11,DBL1L ; u-28.23:9
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MPYHU r5,r11,DBL1L ; u-28.23:9
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add.cs DBL0L,DBL0L,DBL0L
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asl_s DBL0L,DBL0L,6 ; u-26.25:7
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asl r10,r11,23
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@ -234,7 +242,7 @@ __divdf3:
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; wb stall (before 'and' for XMAC)
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lsr r7,r11,9
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sub r5,DBL0L,r5 ; rest msw ; u-26.31:0
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mpyh r12,r5,r4 ; result fraction lowpart
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MPYH r12,r5,r4 ; result fraction lowpart
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xor.f 0,DBL0H,DBL1H
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and DBL0H,r6,r9
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add_s DBL0H,DBL0H,r7 ; (XMAC wb stall)
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@ -261,7 +269,7 @@ __divdf3:
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sub.cs DBL0H,DBL0H,1
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sub.f r12,r12,2
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; resource conflict (not for XMAC)
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mpyhu r7,r12,DBL1L ; u-51.32
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MPYHU r7,r12,DBL1L ; u-51.32
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asl r5,r5,25 ; s-51.7:25
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lsr r10,r10,7 ; u-51.30:2
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; resource conflict (not for XMAC)
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@ -291,10 +299,21 @@ __divdf3:
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rsub r7,r6,5
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asr r10,r12,28
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bmsk r4,r12,27
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#ifdef __HS__
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min r7, r7, 31
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asr DBL0L, r4, r7
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#else
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asrs DBL0L,r4,r7
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#endif
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add DBL1H,r11,r10
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#ifdef __HS__
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abs.f r10, r4
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sub.mi r10, r10, 1
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#endif
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add.f r7,r6,32-5
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#ifdef __ARC700__
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abss r10,r4
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#endif
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asl r4,r4,r7
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mov.mi r4,r10
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add.f r10,r6,23
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@ -319,7 +338,7 @@ __divdf3:
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and r9,DBL0L,1 ; tie-breaker: round to even
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lsr r11,r11,7 ; u-51.30:2
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; resource conflict (not for XMAC)
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mpyhu r8,r12,DBL1L ; u-51.32
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MPYHU r8,r12,DBL1L ; u-51.32
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sub.mi r11,r11,DBL1L ; signed multiply adjust for r12*DBL1L
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add_s DBL1H,DBL1H,r11
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; resource conflict (not for XMAC)
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@ -144,7 +144,7 @@ __divsf3_support: /* This label makes debugger output saner. */
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ld.as r5,[r3,r5]
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add r4,r6,r6
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; load latency
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mpyhu r7,r5,r4
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MPYHU r7,r5,r4
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bic.ne.f 0, \
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0x60000000,r0 ; large number / denorm -> Inf
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beq_s .Linf_NaN
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@ -152,7 +152,7 @@ __divsf3_support: /* This label makes debugger output saner. */
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; wb stall
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; slow track
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sub r7,r5,r7
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mpyhu r8,r7,r6
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MPYHU r8,r7,r6
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asl_s r12,r12,23
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and.f r2,r0,r9
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add r2,r2,r12
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@ -160,7 +160,7 @@ __divsf3_support: /* This label makes debugger output saner. */
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; wb stall
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bne.d .Lpast_denorm_fp1
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.Ldenorm_fp0:
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mpyhu r8,r8,r7
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MPYHU r8,r8,r7
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bclr r12,r12,31
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norm.f r3,r12 ; flag for 0/x -> 0 check
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bic.ne.f 0,0x60000000,r1 ; denorm/large number -> 0
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@ -209,7 +209,7 @@ __divsf3:
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ld.as r5,[r3,r2]
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asl r4,r1,9
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ld.as r9,[pcl,-114]; [pcl,(-((.-.L7f800000) >> 2))] ; 0x7f800000
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mpyhu r7,r5,r4
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MPYHU r7,r5,r4
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asl r6,r1,8
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and.f r11,r1,r9
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bset r6,r6,31
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@ -217,14 +217,14 @@ __divsf3:
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; wb stall
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beq .Ldenorm_fp1
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sub r7,r5,r7
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mpyhu r8,r7,r6
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MPYHU r8,r7,r6
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breq.d r11,r9,.Linf_nan_fp1
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and.f r2,r0,r9
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beq.d .Ldenorm_fp0
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asl r12,r0,8
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; wb stall
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breq r2,r9,.Linf_nan_fp0
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mpyhu r8,r8,r7
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MPYHU r8,r8,r7
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.Lpast_denorm_fp1:
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bset r3,r12,31
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.Lpast_denorm_fp0:
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@ -234,7 +234,7 @@ __divsf3:
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/* wb stall */ \
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0x3f000000
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sub r7,r7,r8 ; u1.31 inverse, about 30 bit
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mpyhu r3,r3,r7
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MPYHU r3,r3,r7
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sbc r2,r2,r11
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xor.f 0,r0,r1
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and r0,r2,r9
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@ -132,19 +132,19 @@ __muldf3_support: /* This label makes debugger output saner. */
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.balign 4
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__muldf3:
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ld.as r9,[pcl,0x4b] ; ((.L7ff00000-.+2)/4)]
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mpyhu r4,DBL0L,DBL1L
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MPYHU r4,DBL0L,DBL1L
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bmsk r6,DBL0H,19
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bset r6,r6,20
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mpyu r7,r6,DBL1L
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and r11,DBL0H,r9
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breq r11,0,.Ldenorm_dbl0
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mpyhu r8,r6,DBL1L
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MPYHU r8,r6,DBL1L
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bmsk r10,DBL1H,19
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bset r10,r10,20
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mpyhu r5,r10,DBL0L
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MPYHU r5,r10,DBL0L
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add.f r4,r4,r7
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and r12,DBL1H,r9
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mpyhu r7,r6,r10
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MPYHU r7,r6,r10
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breq r12,0,.Ldenorm_dbl1
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adc.f r5,r5,r8
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mpyu r8,r10,DBL0L
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@ -64,7 +64,7 @@ __mulsf3:
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bset r2,r0,23
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asl_s r2,r2,8
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bset r3,r4,23
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mpyhu r6,r2,r3
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MPYHU r6,r2,r3
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and r11,r0,r9
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breq r11,0,.Ldenorm_dbl0
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mpyu r7,r2,r3
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@ -144,7 +144,7 @@ __mulsf3:
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add_s r2,r2,r2
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asl r2,r2,r4
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asl r4,r4,23
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mpyhu r6,r2,r3
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MPYHU r6,r2,r3
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breq r12,r9,.Ldenorm_dbl0_inf_nan_dbl1
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sub.ne.f r12,r12,r4
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mpyu r7,r2,r3
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@ -163,7 +163,7 @@ __mulsf3:
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asl r4,r4,r3
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sub_s r3,r3,1
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asl_s r3,r3,23
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mpyhu r6,r2,r4
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MPYHU r6,r2,r4
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sub.ne.f r11,r11,r3
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bmsk r8,r0,30
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mpyu r7,r2,r4
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@ -79,7 +79,7 @@ SYM(__mulsi3):
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j_s.d [blink]
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mov_s r0,mlo
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ENDFUNC(__mulsi3)
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#elif defined (__ARC700__)
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#elif defined (__ARC700__) || defined (__HS__)
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HIDDEN_FUNC(__mulsi3)
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mpyu r0,r0,r1
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nop_s
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@ -393,7 +393,12 @@ SYM(__udivmodsi4):
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lsr_s r1,r1
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cmp_s r0,r1
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xor.f r2,lp_count,31
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#if !defined (__EM__)
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mov_s lp_count,r2
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#else
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mov lp_count,r2
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nop_s
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#endif /* !__EM__ */
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#endif /* !__ARC_NORM__ */
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sub.cc r0,r0,r1
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mov_s r3,3
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@ -1260,7 +1265,7 @@ SYM(__ld_r13_to_r14_ret):
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#endif
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#ifdef L_muldf3
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#ifdef __ARC700__
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#if defined (__ARC700__) || defined (__HS__)
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#include "ieee-754/muldf3.S"
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#elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
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#include "ieee-754/arc600-mul64/muldf3.S"
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@ -1276,7 +1281,7 @@ SYM(__ld_r13_to_r14_ret):
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#endif
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#ifdef L_mulsf3
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#ifdef __ARC700__
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#if defined (__ARC700__) || defined (__HS__)
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#include "ieee-754/mulsf3.S"
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#elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
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#include "ieee-754/arc600-mul64/mulsf3.S"
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@ -1288,7 +1293,7 @@ SYM(__ld_r13_to_r14_ret):
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#endif
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#ifdef L_divdf3
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#ifdef __ARC700__
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#if defined (__ARC700__) || defined (__HS__)
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#include "ieee-754/divdf3.S"
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#elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
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#include "ieee-754/arc600-mul64/divdf3.S"
|
||||
|
|
@ -1298,7 +1303,7 @@ SYM(__ld_r13_to_r14_ret):
|
|||
#endif
|
||||
|
||||
#ifdef L_divsf3
|
||||
#ifdef __ARC700__
|
||||
#if defined (__ARC700__) || defined (__HS__)
|
||||
#include "ieee-754/divsf3-stdmul.S"
|
||||
#elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
|
||||
#include "ieee-754/arc600-mul64/divsf3.S"
|
||||
|
|
|
|||
|
|
@ -28,10 +28,10 @@
|
|||
CRTSTUFF_T_CFLAGS += -mno-sdata
|
||||
|
||||
# Compile crtbeginS.o and crtendS.o with pic.
|
||||
CRTSTUFF_T_CFLAGS_S = $(CRTSTUFF_T_CFLAGS) -mA7 -fPIC
|
||||
CRTSTUFF_T_CFLAGS_S = $(CRTSTUFF_T_CFLAGS) -fPIC
|
||||
|
||||
# Compile libgcc2.a with pic.
|
||||
TARGET_LIBGCC2_CFLAGS = -mA7 -fPIC
|
||||
TARGET_LIBGCC2_CFLAGS = -fPIC
|
||||
|
||||
PROFILE_OSDEP = prof-freq.o
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue