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Imported fixes for testsuite failures from psion branch.

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From-SVN: r20560
This commit is contained in:
Nick Clifton 1998-06-18 11:44:52 +00:00 • committed by Nick Clifton
parent f9df0a1d52
commit bf3ad13976
3 changed files with 17 additions and 4 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
Thu Jun 18 11:43:54 1998 Nick Clifton <nickc@cygnus.com>
* config/arm/thumb.h (GO_IF_LEGITIMATE_ADDRESS): Disallow REG+REG
addressing when one register is the frame pointer or stack
pointer. Disallow REG+CONST addressing in HI mode.
Thu Jun 18 17:30:39 1998 J"orn Rennecke <amylaar@cygnus.co.uk> Thu Jun 18 17:30:39 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
* reload.c (find_reloads): Don't narrow scope of RELOAD_OTHER to * reload.c (find_reloads): Don't narrow scope of RELOAD_OTHER to

13
gcc/config/arm/thumb.h
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@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, for ARM/Thumb. /* Definitions of target machine for GNU compiler, for ARM/Thumb.
Copyright (C) 19996, 1997, 1998 Free Software Foundation, Inc. Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
The basis of this contribution was generated by The basis of this contribution was generated by
Richard Earnshaw, Advanced RISC Machines Ltd Richard Earnshaw, Advanced RISC Machines Ltd
@ -900,8 +900,12 @@ int thumb_shiftable_const ();
if (GET_MODE_SIZE (MODE) <= 4 \ if (GET_MODE_SIZE (MODE) <= 4 \
&& GET_CODE (XEXP (X, 0)) == REG \ && GET_CODE (XEXP (X, 0)) == REG \
&& GET_CODE (XEXP (X, 1)) == REG \ && GET_CODE (XEXP (X, 1)) == REG \
&& XEXP (X, 0) != frame_pointer_rtx \ && XEXP (X, 0) != frame_pointer_rtx \
&& XEXP (X, 1) != frame_pointer_rtx \ && XEXP (X, 1) != frame_pointer_rtx \
/* CYGNUS LOCAL nickc */ \
&& XEXP (X, 0) != virtual_stack_vars_rtx \
&& XEXP (X, 1) != virtual_stack_vars_rtx \
/* END CYGNUS LOCAL */ \
&& REG_OK_FOR_INDEX_P (XEXP (X, 0)) \ && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
&& REG_OK_FOR_INDEX_P (XEXP (X, 1))) \ && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
goto WIN; \ goto WIN; \
@ -909,6 +913,9 @@ int thumb_shiftable_const ();
else if (GET_CODE (XEXP (X, 0)) == REG \ else if (GET_CODE (XEXP (X, 0)) == REG \
&& (REG_OK_FOR_INDEX_P (XEXP (X, 0)) \ && (REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
|| XEXP (X, 0) == arg_pointer_rtx) \ || XEXP (X, 0) == arg_pointer_rtx) \
/* CYGNUS LOCAL nickc */ \
&& GET_MODE_SIZE (MODE) != 2 \
/* END CYGNUS LOCAL */ \
&& GET_CODE (XEXP (X, 1)) == CONST_INT \ && GET_CODE (XEXP (X, 1)) == CONST_INT \
&& LEGITIMATE_OFFSET (MODE, INTVAL (XEXP (X, 1)))) \ && LEGITIMATE_OFFSET (MODE, INTVAL (XEXP (X, 1)))) \
goto WIN; \ goto WIN; \

2
gcc/config/arm/thumb.md
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@ -1,5 +1,5 @@
;; thumb.md Machine description for ARM/Thumb processors ;; thumb.md Machine description for ARM/Thumb processors
;; Copyright (C) 19996, 1997, 1998 Free Software Foundation, Inc. ;; Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
;; The basis of this contribution was generated by ;; The basis of this contribution was generated by
;; Richard Earnshaw, Advanced RISC Machines Ltd ;; Richard Earnshaw, Advanced RISC Machines Ltd