test/rs6000: Add Power9 and up as vect_len target

Power9 supports vector with length in bytes load/store, this patch
is to teach check_effective_target_vect_len_load_store to take it
and its laters as effective vector with length targets.

Also supplement the documents for has_arch_pwr*.

Bootstrapped/regtested on powerpc64le-linux-gnu P8, also on
powerpc64le-linux-gnu P9 with explicit usage setting.

gcc/ChangeLog:

	* doc/sourcebuild.texi (has_arch_pwr5, has_arch_pwr6, has_arch_pwr7,
	has_arch_pwr8, has_arch_pwr9): Document.

gcc/testsuite/ChangeLog:

	* lib/target-supports.exp
	(check_effective_target_vect_len_load_store): Call check function
	check_effective_target_has_arch_pwr9.

gcc/doc/sourcebuild.texi

@@ -2199,6 +2199,26 @@ PowerPC target supports executing AltiVec instructions.
 
 @item vsx_hw
 PowerPC target supports executing VSX instructions (ISA 2.06).
+
+@item has_arch_pwr5
+PowerPC target pre-defines macro _ARCH_PWR5 which means the @code{-mcpu}
+setting is Power5 or later.
+
+@item has_arch_pwr6
+PowerPC target pre-defines macro _ARCH_PWR6 which means the @code{-mcpu}
+setting is Power6 or later.
+
+@item has_arch_pwr7
+PowerPC target pre-defines macro _ARCH_PWR7 which means the @code{-mcpu}
+setting is Power7 or later.
+
+@item has_arch_pwr8
+PowerPC target pre-defines macro _ARCH_PWR8 which means the @code{-mcpu}
+setting is Power8 or later.
+
+@item has_arch_pwr9
+PowerPC target pre-defines macro _ARCH_PWR9 which means the @code{-mcpu}
+setting is Power9 or later.
 @end table
 
 @subsubsection Other hardware attributes

gcc/testsuite/lib/target-supports.exp

@@ -7085,7 +7085,7 @@ proc check_effective_target_vect_fully_masked { } {
 # @code{len_store} optabs.
 
 proc check_effective_target_vect_len_load_store { } {
-    return 0
+    return [check_effective_target_has_arch_pwr9]
 }
 
 # Return the value of parameter vect-partial-vector-usage specified for