Second part of MS1->MT renaming
Second part of MS1->MT renaming * config/mt/mt.md (doloop_end): Call mt_add_loop. (movqi, movhi): Call mt_set_memflags. (*movdf_internal): Call mt_split_words. (reload_inqi, reload_outqi, reload_inhi, reload_outhi): Call mt_set_memflags. (cmpsi): Store to mt_compare_op[01]. (beq, bne, bge, bgt, ble, blt, bgeu, bgtu, bleu, bltu, bunge, bungt, bunle, bunlt): Call mt_emit_cbranch. (prologue): Call mt_expand_prologue. (epilogu): Call mt_expend_epilogue. (eh_return): Call mt_expand_eh_return. (eh_epilogue): Call me_emit_eh_epilogue. (conditional_trap): Store to mt_compare_op[01]. * config/mt/crti.asm: Adjust comment. * config/mt/crtn.asm: Adjust comment. * config/mt/mt.c (MT_INT_ARG_FIRST): Renamed. (mt_compare_op0, mt_compare_op1): Renamed. (current_frame_info, zero_frame_info): Adjust type. (mt_ucmpsi3_libcall): Renamed. (mt_flag_delayed_branch): Renamed. (mt_struct_value_rtx, mt_return_addr_rtx): Renamed. (mt_nops_required, mt_nop_reasons): Renamed. (mt_asm_output_opcode, mt_get_attr_type, mt_final_prescan_insn, mt_debug_stack, mt_print_operand_simple_address, mt_print_operand_address, mt_print_operand): Renamed, adjusted. (mt_init_cumulative_args, mt_function_arg_slotno, mt_function_arg, mt_function_arg_advance, mt_arg_partial_bytes, mt_pass_by_reference, mt_function_arg_boundary, mt_reg_ok_for_base_p, mt_legitimate_simple_address_p, mt_legitimate_address_p): Renamed, adjusted. (mt_cpu): Renamed. (mt_init_machine_status, mt_override_options, mt_builtin_saveregs, mt_va_start, mt_compute_frame_size, mt_emit_save_restore, mt_emit_save_fp, mt_emit_save_regs, mt_interrupt_function_p, mt_expand_prologue, mt_epilogue_uses, mt_expand_epilogue, mt_expand_eh_return, mt_emit_eh_prologue, mt_handl_interrupt_attribute): Renamed, adjusted. (mt_attribute_table): Renamed, adjusted. (mt_initial_elimination_offset, mt_generate_compare, mt_emit_cbranch, mt_set_memflags_1, mt_set_memflags, mt_secondary_reload_class, mt_function_value, mt_split_words, mt_pass_in_stack, mt_add_loop, mt_loop_nesting, mt_block_length, mt_scan_loop, mt_reorg_loops): Renamed, adjusted. (mt_labels): Renamed. (mt_add_branches, mt_check_delay_slot, mt_reorg_hazard, mt_machine_reorg): Renamed, adjusted. (mt_attribute_table: Renamed. (TARGET_ATTRIBUTE_TABLE, TARGET_STRUCT_VALUE_RTX, TARGET_PASS_BY_REFERENCE, TARGET_MUST_PASS_IN_STACK, TARGET_ARG_PARTIAL_BYTES, TARGET_MACHINE_DEPENDENT_REORG): Adjust. * config/mt/mt.opt (march): Set mt_cpu_string. * config/mt/mt.h (mt_ucmpsi3_libcall, mt_cpu): Renamed. (TARGET_CPU_CPP_BUILTINS): Adjust. (TARGET_MS1_64_001, TARGET_MS1_16_002, TARGET_MS1_16_003, TARGET_MS2): Adjust. (TARGET_VERSION, OVERRIDE_OPTIONS, SECONDARY_RELOAD_CLASS): Adjust. (MT_MIN_INT): Renamed. (RETURN_ADDR_RTX): Adjust. (struct mt_frame_info): Renamed. (current_frame_info): Adjust type. (INITIAL_ELIMINATION_OFFSET): Adjust. (MT_NUM_ARG_REGS): Renamed. (REG_PARM_STACK_SPACE, FUNCTION_ARG, INIT_CUMULATVE_ARGS, FUNCTION_ARG_ADVANCE, FUNCTION_ARG_BOUNDARY, FUNCTION_VALUE, LIBCALL_VALUE, EPILOGUE_USES, EXPAND_BUILTIN_VA_START, GO_IF_LEGITIMATE_ADDRESS, REG_OK_FOR_BASE_P, ASM_OUTPUT_OPCODE, FINAL_REPSCAN_INSN, PRINT_OPERAND, PRINT_OPERAND_ADDRESS): Adjust. (mt_compare_op0, mt_compare_op1): Renamed. * config/mt/mt-protos.h: Rename prototypes. From-SVN: r108569
This commit is contained in:
parent
6bec927194
commit
bccef6d862
8 changed files with 412 additions and 340 deletions
|
@ -1,3 +1,76 @@
|
|||
2005-12-15 Nathan Sidwell <nathan@codesourcery.com>
|
||||
|
||||
Second part of MS1->MT renaming
|
||||
* config/mt/mt.md (doloop_end): Call mt_add_loop.
|
||||
(movqi, movhi): Call mt_set_memflags.
|
||||
(*movdf_internal): Call mt_split_words.
|
||||
(reload_inqi, reload_outqi, reload_inhi, reload_outhi): Call
|
||||
mt_set_memflags.
|
||||
(cmpsi): Store to mt_compare_op[01].
|
||||
(beq, bne, bge, bgt, ble, blt, bgeu, bgtu, bleu, bltu, bunge,
|
||||
bungt, bunle, bunlt): Call mt_emit_cbranch.
|
||||
(prologue): Call mt_expand_prologue.
|
||||
(epilogu): Call mt_expend_epilogue.
|
||||
(eh_return): Call mt_expand_eh_return.
|
||||
(eh_epilogue): Call me_emit_eh_epilogue.
|
||||
(conditional_trap): Store to mt_compare_op[01].
|
||||
* config/mt/crti.asm: Adjust comment.
|
||||
* config/mt/crtn.asm: Adjust comment.
|
||||
* config/mt/mt.c (MT_INT_ARG_FIRST): Renamed.
|
||||
(mt_compare_op0, mt_compare_op1): Renamed.
|
||||
(current_frame_info, zero_frame_info): Adjust type.
|
||||
(mt_ucmpsi3_libcall): Renamed.
|
||||
(mt_flag_delayed_branch): Renamed.
|
||||
(mt_struct_value_rtx, mt_return_addr_rtx): Renamed.
|
||||
(mt_nops_required, mt_nop_reasons): Renamed.
|
||||
(mt_asm_output_opcode, mt_get_attr_type, mt_final_prescan_insn,
|
||||
mt_debug_stack, mt_print_operand_simple_address,
|
||||
mt_print_operand_address, mt_print_operand): Renamed, adjusted.
|
||||
(mt_init_cumulative_args, mt_function_arg_slotno, mt_function_arg,
|
||||
mt_function_arg_advance, mt_arg_partial_bytes,
|
||||
mt_pass_by_reference, mt_function_arg_boundary,
|
||||
mt_reg_ok_for_base_p, mt_legitimate_simple_address_p,
|
||||
mt_legitimate_address_p): Renamed, adjusted.
|
||||
(mt_cpu): Renamed.
|
||||
(mt_init_machine_status, mt_override_options, mt_builtin_saveregs,
|
||||
mt_va_start, mt_compute_frame_size, mt_emit_save_restore,
|
||||
mt_emit_save_fp, mt_emit_save_regs, mt_interrupt_function_p,
|
||||
mt_expand_prologue, mt_epilogue_uses, mt_expand_epilogue,
|
||||
mt_expand_eh_return, mt_emit_eh_prologue,
|
||||
mt_handl_interrupt_attribute): Renamed, adjusted.
|
||||
(mt_attribute_table): Renamed, adjusted.
|
||||
(mt_initial_elimination_offset, mt_generate_compare,
|
||||
mt_emit_cbranch, mt_set_memflags_1, mt_set_memflags,
|
||||
mt_secondary_reload_class, mt_function_value, mt_split_words,
|
||||
mt_pass_in_stack, mt_add_loop, mt_loop_nesting, mt_block_length,
|
||||
mt_scan_loop, mt_reorg_loops): Renamed, adjusted.
|
||||
(mt_labels): Renamed.
|
||||
(mt_add_branches, mt_check_delay_slot, mt_reorg_hazard,
|
||||
mt_machine_reorg): Renamed, adjusted.
|
||||
(mt_attribute_table: Renamed.
|
||||
(TARGET_ATTRIBUTE_TABLE, TARGET_STRUCT_VALUE_RTX,
|
||||
TARGET_PASS_BY_REFERENCE, TARGET_MUST_PASS_IN_STACK,
|
||||
TARGET_ARG_PARTIAL_BYTES, TARGET_MACHINE_DEPENDENT_REORG): Adjust.
|
||||
* config/mt/mt.opt (march): Set mt_cpu_string.
|
||||
* config/mt/mt.h (mt_ucmpsi3_libcall, mt_cpu): Renamed.
|
||||
(TARGET_CPU_CPP_BUILTINS): Adjust.
|
||||
(TARGET_MS1_64_001, TARGET_MS1_16_002, TARGET_MS1_16_003,
|
||||
TARGET_MS2): Adjust.
|
||||
(TARGET_VERSION, OVERRIDE_OPTIONS, SECONDARY_RELOAD_CLASS): Adjust.
|
||||
(MT_MIN_INT): Renamed.
|
||||
(RETURN_ADDR_RTX): Adjust.
|
||||
(struct mt_frame_info): Renamed.
|
||||
(current_frame_info): Adjust type.
|
||||
(INITIAL_ELIMINATION_OFFSET): Adjust.
|
||||
(MT_NUM_ARG_REGS): Renamed.
|
||||
(REG_PARM_STACK_SPACE, FUNCTION_ARG, INIT_CUMULATVE_ARGS,
|
||||
FUNCTION_ARG_ADVANCE, FUNCTION_ARG_BOUNDARY, FUNCTION_VALUE,
|
||||
LIBCALL_VALUE, EPILOGUE_USES, EXPAND_BUILTIN_VA_START,
|
||||
GO_IF_LEGITIMATE_ADDRESS, REG_OK_FOR_BASE_P, ASM_OUTPUT_OPCODE,
|
||||
FINAL_REPSCAN_INSN, PRINT_OPERAND, PRINT_OPERAND_ADDRESS): Adjust.
|
||||
(mt_compare_op0, mt_compare_op1): Renamed.
|
||||
* config/mt/mt-protos.h: Rename prototypes.
|
||||
|
||||
2005-12-15 Richard Guenther <rguenther@suse.de>
|
||||
|
||||
* tree-flow.h (okay_component_ref_for_subvars): Remove.
|
||||
|
@ -147,6 +220,9 @@
|
|||
|
||||
2005-12-13 Nathan Sidwell <nathan@codesourcery.com>
|
||||
|
||||
* sim/common/sim-signal.c (sim_signal_to_target): Add missing ':'.
|
||||
* sim/common/sim-signal.h (sim_signal_to_target): Return an int.
|
||||
|
||||
* config/mt/t-mt (crti.o, crtn.o): Add multilib options.
|
||||
(EXTRA_MULTILIB_PARTS): Define.
|
||||
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
# crti.asm for ms1
|
||||
# crti.asm for mt
|
||||
#
|
||||
# Copyright (C) 2005 Free Software Foundation, Inc.
|
||||
#
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
# crtn.asm for ms1
|
||||
# crtn.asm for mt
|
||||
|
||||
# Copyright (C) 2005 Free Software Foundation, Inc.
|
||||
#
|
||||
|
|
|
@ -18,49 +18,49 @@
|
|||
Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
|
||||
02110-1301, USA. */
|
||||
|
||||
extern void ms1_init_expanders (void);
|
||||
extern void ms1_expand_prologue (void);
|
||||
extern void ms1_expand_epilogue (enum epilogue_type);
|
||||
extern unsigned ms1_compute_frame_size (int);
|
||||
extern void ms1_override_options (void);
|
||||
extern int ms1_initial_elimination_offset (int, int);
|
||||
extern const char * ms1_asm_output_opcode (FILE *, const char *);
|
||||
extern int ms1_epilogue_uses (int);
|
||||
extern void ms1_add_loop (void);
|
||||
extern void mt_init_expanders (void);
|
||||
extern void mt_expand_prologue (void);
|
||||
extern void mt_expand_epilogue (enum epilogue_type);
|
||||
extern unsigned mt_compute_frame_size (int);
|
||||
extern void mt_override_options (void);
|
||||
extern int mt_initial_elimination_offset (int, int);
|
||||
extern const char * mt_asm_output_opcode (FILE *, const char *);
|
||||
extern int mt_epilogue_uses (int);
|
||||
extern void mt_add_loop (void);
|
||||
|
||||
#ifdef TREE_CODE
|
||||
extern const char * ms1_cannot_inline_p (tree);
|
||||
extern int ms1_function_arg_boundary (enum machine_mode, tree);
|
||||
extern void ms1_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
|
||||
extern const char * mt_cannot_inline_p (tree);
|
||||
extern int mt_function_arg_boundary (enum machine_mode, tree);
|
||||
extern void mt_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
|
||||
#endif
|
||||
|
||||
#ifdef RTX_CODE
|
||||
extern void ms1_expand_eh_return (rtx *);
|
||||
extern void ms1_emit_eh_epilogue (rtx *);
|
||||
extern void ms1_print_operand (FILE *, rtx, int);
|
||||
extern void ms1_print_operand_address (FILE *, rtx);
|
||||
extern int ms1_check_split (rtx, enum machine_mode);
|
||||
extern int ms1_reg_ok_for_base_p (rtx, int);
|
||||
extern int ms1_legitimate_address_p (enum machine_mode, rtx, int);
|
||||
extern void mt_expand_eh_return (rtx *);
|
||||
extern void mt_emit_eh_epilogue (rtx *);
|
||||
extern void mt_print_operand (FILE *, rtx, int);
|
||||
extern void mt_print_operand_address (FILE *, rtx);
|
||||
extern int mt_check_split (rtx, enum machine_mode);
|
||||
extern int mt_reg_ok_for_base_p (rtx, int);
|
||||
extern int mt_legitimate_address_p (enum machine_mode, rtx, int);
|
||||
/* Predicates for machine description. */
|
||||
extern int uns_arith_operand (rtx, enum machine_mode);
|
||||
extern int arith_operand (rtx, enum machine_mode);
|
||||
extern int reg_or_0_operand (rtx, enum machine_mode);
|
||||
extern int big_const_operand (rtx, enum machine_mode);
|
||||
extern int single_const_operand (rtx, enum machine_mode);
|
||||
extern void ms1_emit_cbranch (enum rtx_code, rtx, rtx, rtx);
|
||||
extern void ms1_set_memflags (rtx);
|
||||
extern rtx ms1_return_addr_rtx (int);
|
||||
extern void ms1_split_words (enum machine_mode, enum machine_mode, rtx *);
|
||||
extern void ms1_final_prescan_insn (rtx, rtx *, int);
|
||||
extern void mt_emit_cbranch (enum rtx_code, rtx, rtx, rtx);
|
||||
extern void mt_set_memflags (rtx);
|
||||
extern rtx mt_return_addr_rtx (int);
|
||||
extern void mt_split_words (enum machine_mode, enum machine_mode, rtx *);
|
||||
extern void mt_final_prescan_insn (rtx, rtx *, int);
|
||||
#endif
|
||||
|
||||
#ifdef TREE_CODE
|
||||
#ifdef RTX_CODE
|
||||
extern void ms1_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
|
||||
extern rtx ms1_function_arg (const CUMULATIVE_ARGS *, enum machine_mode, tree, int, int);
|
||||
extern void ms1_va_start (tree, rtx);
|
||||
extern enum reg_class ms1_secondary_reload_class (enum reg_class, enum machine_mode, rtx);
|
||||
extern rtx ms1_function_value (tree, enum machine_mode, tree);
|
||||
extern void mt_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
|
||||
extern rtx mt_function_arg (const CUMULATIVE_ARGS *, enum machine_mode, tree, int, int);
|
||||
extern void mt_va_start (tree, rtx);
|
||||
extern enum reg_class mt_secondary_reload_class (enum reg_class, enum machine_mode, rtx);
|
||||
extern rtx mt_function_value (tree, enum machine_mode, tree);
|
||||
#endif
|
||||
#endif
|
||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -19,7 +19,7 @@
|
|||
Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
|
||||
02110-1301, USA. */
|
||||
|
||||
extern struct rtx_def * ms1_ucmpsi3_libcall;
|
||||
extern struct rtx_def * mt_ucmpsi3_libcall;
|
||||
|
||||
enum processor_type
|
||||
{
|
||||
|
@ -35,7 +35,7 @@ enum epilogue_type
|
|||
NORMAL_EPILOGUE
|
||||
};
|
||||
|
||||
extern enum processor_type ms1_cpu;
|
||||
extern enum processor_type mt_cpu;
|
||||
|
||||
|
||||
/* A C string constant that tells the GCC driver program options to pass to
|
||||
|
@ -91,19 +91,19 @@ march=MS2:exit-ms2.o%s; \
|
|||
#define TARGET_CPU_CPP_BUILTINS() \
|
||||
do \
|
||||
{ \
|
||||
builtin_define_std ("ms1"); \
|
||||
builtin_assert ("machine=ms1"); \
|
||||
builtin_define_std ("mt"); \
|
||||
builtin_assert ("machine=mt"); \
|
||||
} \
|
||||
while (0)
|
||||
|
||||
#define TARGET_MS1_64_001 (ms1_cpu == PROCESSOR_MS1_64_001)
|
||||
#define TARGET_MS1_16_002 (ms1_cpu == PROCESSOR_MS1_16_002)
|
||||
#define TARGET_MS1_16_003 (ms1_cpu == PROCESSOR_MS1_16_003)
|
||||
#define TARGET_MS2 (ms1_cpu == PROCESSOR_MS2)
|
||||
#define TARGET_MS1_64_001 (mt_cpu == PROCESSOR_MS1_64_001)
|
||||
#define TARGET_MS1_16_002 (mt_cpu == PROCESSOR_MS1_16_002)
|
||||
#define TARGET_MS1_16_003 (mt_cpu == PROCESSOR_MS1_16_003)
|
||||
#define TARGET_MS2 (mt_cpu == PROCESSOR_MS2)
|
||||
|
||||
#define TARGET_VERSION fprintf (stderr, " (ms1)");
|
||||
#define TARGET_VERSION fprintf (stderr, " (mt)");
|
||||
|
||||
#define OVERRIDE_OPTIONS ms1_override_options ()
|
||||
#define OVERRIDE_OPTIONS mt_override_options ()
|
||||
|
||||
#define CAN_DEBUG_WITHOUT_FP 1
|
||||
|
||||
|
@ -343,7 +343,7 @@ enum reg_class
|
|||
#define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
|
||||
|
||||
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,X) \
|
||||
ms1_secondary_reload_class((CLASS), (MODE), (X))
|
||||
mt_secondary_reload_class((CLASS), (MODE), (X))
|
||||
|
||||
/* A C expression for the maximum number of consecutive registers of
|
||||
class CLASS needed to hold a value of mode MODE. */
|
||||
|
@ -402,8 +402,8 @@ enum reg_class
|
|||
(`G', `H') that specify particular ranges of `const_double' values. */
|
||||
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
|
||||
|
||||
/* Most negative value represent on ms1 */
|
||||
#define MS1_MIN_INT 0x80000000
|
||||
/* Most negative value represent on mt */
|
||||
#define MT_MIN_INT 0x80000000
|
||||
|
||||
/* Basic Stack Layout. */
|
||||
|
||||
|
@ -454,7 +454,7 @@ enum save_direction
|
|||
#define FIRST_PARM_OFFSET(FUNDECL) 0
|
||||
|
||||
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
|
||||
ms1_return_addr_rtx (COUNT)
|
||||
mt_return_addr_rtx (COUNT)
|
||||
|
||||
/* A C expression whose value is RTL representing the location of the incoming
|
||||
return address at the beginning of any function, before the prologue. This
|
||||
|
@ -493,7 +493,7 @@ enum save_direction
|
|||
/* Structure to be filled in by compute_frame_size with register
|
||||
save masks, and offsets for the current function. */
|
||||
|
||||
struct ms1_frame_info
|
||||
struct mt_frame_info
|
||||
{
|
||||
unsigned int total_size; /* # Bytes that the entire frame takes up. */
|
||||
unsigned int pretend_size; /* # Bytes we push and pretend caller did. */
|
||||
|
@ -508,7 +508,7 @@ struct ms1_frame_info
|
|||
int initialized; /* Nonzero if frame size already calculated. */
|
||||
};
|
||||
|
||||
extern struct ms1_frame_info current_frame_info;
|
||||
extern struct mt_frame_info current_frame_info;
|
||||
|
||||
/* If defined, this macro specifies a table of register pairs used to eliminate
|
||||
unneeded registers that point into the stack frame. */
|
||||
|
@ -531,7 +531,7 @@ extern struct ms1_frame_info current_frame_info;
|
|||
registers. This macro must be defined if `ELIMINABLE_REGS' is
|
||||
defined. */
|
||||
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
|
||||
(OFFSET) = ms1_initial_elimination_offset (FROM, TO)
|
||||
(OFFSET) = mt_initial_elimination_offset (FROM, TO)
|
||||
|
||||
/* If defined, the maximum amount of space required for outgoing
|
||||
arguments will be computed and placed into the variable
|
||||
|
@ -543,11 +543,11 @@ extern struct ms1_frame_info current_frame_info;
|
|||
#define OUTGOING_REG_PARM_STACK_SPACE
|
||||
|
||||
/* The number of register assigned to holding function arguments. */
|
||||
#define MS1_NUM_ARG_REGS 4
|
||||
#define MT_NUM_ARG_REGS 4
|
||||
|
||||
/* Define this if it is the responsibility of the caller to allocate
|
||||
the area reserved for arguments passed in registers. */
|
||||
#define REG_PARM_STACK_SPACE(FNDECL) (MS1_NUM_ARG_REGS * UNITS_PER_WORD)
|
||||
#define REG_PARM_STACK_SPACE(FNDECL) (MT_NUM_ARG_REGS * UNITS_PER_WORD)
|
||||
|
||||
/* Define this macro if `REG_PARM_STACK_SPACE' is defined, but the stack
|
||||
parameters don't skip the area specified by it. */
|
||||
|
@ -560,18 +560,18 @@ extern struct ms1_frame_info current_frame_info;
|
|||
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
|
||||
|
||||
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
|
||||
ms1_function_arg (& (CUM), (MODE), (TYPE), (NAMED), FALSE)
|
||||
mt_function_arg (& (CUM), (MODE), (TYPE), (NAMED), FALSE)
|
||||
|
||||
#define CUMULATIVE_ARGS int
|
||||
|
||||
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
|
||||
ms1_init_cumulative_args (& (CUM), FNTYPE, LIBNAME, FNDECL, FALSE)
|
||||
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
|
||||
mt_init_cumulative_args (& (CUM), FNTYPE, LIBNAME, FNDECL, FALSE)
|
||||
|
||||
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
||||
ms1_function_arg_advance (&CUM, MODE, TYPE, NAMED)
|
||||
mt_function_arg_advance (&CUM, MODE, TYPE, NAMED)
|
||||
|
||||
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
|
||||
ms1_function_arg_boundary (MODE, TYPE)
|
||||
mt_function_arg_boundary (MODE, TYPE)
|
||||
|
||||
#define FUNCTION_ARG_REGNO_P(REGNO) \
|
||||
((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM))
|
||||
|
@ -579,10 +579,10 @@ extern struct ms1_frame_info current_frame_info;
|
|||
#define RETURN_VALUE_REGNUM RETVAL_REGNUM
|
||||
|
||||
#define FUNCTION_VALUE(VALTYPE, FUNC) \
|
||||
ms1_function_value (VALTYPE, TYPE_MODE(VALTYPE), FUNC)
|
||||
mt_function_value (VALTYPE, TYPE_MODE(VALTYPE), FUNC)
|
||||
|
||||
#define LIBCALL_VALUE(MODE) \
|
||||
ms1_function_value (NULL_TREE, MODE, NULL_TREE)
|
||||
mt_function_value (NULL_TREE, MODE, NULL_TREE)
|
||||
|
||||
#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == RETURN_VALUE_REGNUM)
|
||||
|
||||
|
@ -600,7 +600,7 @@ extern struct ms1_frame_info current_frame_info;
|
|||
adjust the stack pointer before a return from the function. */
|
||||
#define EXIT_IGNORE_STACK 1
|
||||
|
||||
#define EPILOGUE_USES(REGNO) ms1_epilogue_uses(REGNO)
|
||||
#define EPILOGUE_USES(REGNO) mt_epilogue_uses(REGNO)
|
||||
|
||||
/* Define this macro if the function epilogue contains delay slots to which
|
||||
instructions from the rest of the function can be "moved". */
|
||||
|
@ -613,7 +613,7 @@ extern struct ms1_frame_info current_frame_info;
|
|||
#define FUNCTION_PROFILER(FILE, LABELNO) gcc_unreachable ()
|
||||
|
||||
#define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG) \
|
||||
ms1_va_start (VALIST, NEXTARG)
|
||||
mt_va_start (VALIST, NEXTARG)
|
||||
|
||||
/* Trampolines are not implemented. */
|
||||
#define TRAMPOLINE_SIZE 0
|
||||
|
@ -637,21 +637,21 @@ extern struct ms1_frame_info current_frame_info;
|
|||
#ifdef REG_OK_STRICT
|
||||
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
||||
{ \
|
||||
if (ms1_legitimate_address_p (MODE, X, 1)) \
|
||||
if (mt_legitimate_address_p (MODE, X, 1)) \
|
||||
goto ADDR; \
|
||||
}
|
||||
#else
|
||||
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
||||
{ \
|
||||
if (ms1_legitimate_address_p (MODE, X, 0)) \
|
||||
if (mt_legitimate_address_p (MODE, X, 0)) \
|
||||
goto ADDR; \
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef REG_OK_STRICT
|
||||
#define REG_OK_FOR_BASE_P(X) ms1_reg_ok_for_base_p (X, 1)
|
||||
#define REG_OK_FOR_BASE_P(X) mt_reg_ok_for_base_p (X, 1)
|
||||
#else
|
||||
#define REG_OK_FOR_BASE_P(X) ms1_reg_ok_for_base_p (X, 0)
|
||||
#define REG_OK_FOR_BASE_P(X) mt_reg_ok_for_base_p (X, 0)
|
||||
#endif
|
||||
|
||||
#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
|
||||
|
@ -759,19 +759,19 @@ extern struct ms1_frame_info current_frame_info;
|
|||
desire, and increment the variable PTR to point at the end of the opcode so
|
||||
that it will not be output twice. */
|
||||
#define ASM_OUTPUT_OPCODE(STREAM, PTR) \
|
||||
(PTR) = ms1_asm_output_opcode (STREAM, PTR)
|
||||
(PTR) = mt_asm_output_opcode (STREAM, PTR)
|
||||
|
||||
#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
|
||||
ms1_final_prescan_insn (INSN, OPVEC, NOPERANDS)
|
||||
mt_final_prescan_insn (INSN, OPVEC, NOPERANDS)
|
||||
|
||||
#define PRINT_OPERAND(STREAM, X, CODE) ms1_print_operand (STREAM, X, CODE)
|
||||
#define PRINT_OPERAND(STREAM, X, CODE) mt_print_operand (STREAM, X, CODE)
|
||||
|
||||
/* A C expression which evaluates to true if CODE is a valid punctuation
|
||||
character for use in the `PRINT_OPERAND' macro. */
|
||||
/* #: Print nop for delay slot. */
|
||||
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '#')
|
||||
|
||||
#define PRINT_OPERAND_ADDRESS(STREAM, X) ms1_print_operand_address (STREAM, X)
|
||||
#define PRINT_OPERAND_ADDRESS(STREAM, X) mt_print_operand_address (STREAM, X)
|
||||
|
||||
/* If defined, C string expressions to be used for the `%R', `%L', `%U', and
|
||||
`%I' options of `asm_fprintf' (see `final.c'). These are useful when a
|
||||
|
@ -874,6 +874,6 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE)
|
|||
stored from the compare operation. Note that we can't use "rtx" here
|
||||
since it hasn't been defined! */
|
||||
|
||||
extern struct rtx_def * ms1_compare_op0;
|
||||
extern struct rtx_def * ms1_compare_op1;
|
||||
extern struct rtx_def * mt_compare_op0;
|
||||
extern struct rtx_def * mt_compare_op1;
|
||||
|
||||
|
|
|
@ -68,8 +68,8 @@
|
|||
|
||||
;; Delay Slots
|
||||
|
||||
;; The ms1 does not allow branches in the delay slot.
|
||||
;; The ms1 does not allow back to back memory or io instruction.
|
||||
;; The mt does not allow branches in the delay slot.
|
||||
;; The mt does not allow back to back memory or io instruction.
|
||||
;; The compiler does not know what the type of instruction is at
|
||||
;; the destination of the branch. Thus, only type that will be acceptable
|
||||
;; (safe) is the arith type.
|
||||
|
@ -199,7 +199,7 @@
|
|||
(const_int -1)))
|
||||
(clobber (match_scratch:SI 5 ""))])]
|
||||
"TARGET_MS1_16_003 || TARGET_MS2"
|
||||
{ms1_add_loop ();})
|
||||
{mt_add_loop ();})
|
||||
|
||||
;; Moves
|
||||
|
||||
|
@ -294,7 +294,7 @@
|
|||
start_sequence ();
|
||||
emit_insn (gen_storeqi (gen_lowpart (SImode, data), address,
|
||||
scratch1, scratch2, scratch3));
|
||||
ms1_set_memflags (operands[0]);
|
||||
mt_set_memflags (operands[0]);
|
||||
seq = get_insns ();
|
||||
end_sequence ();
|
||||
emit_insn (seq);
|
||||
|
@ -313,7 +313,7 @@
|
|||
|
||||
start_sequence ();
|
||||
emit_insn (gen_loadqi (gen_lowpart (SImode, data), address, scratch1));
|
||||
ms1_set_memflags (operands[1]);
|
||||
mt_set_memflags (operands[1]);
|
||||
seq = get_insns ();
|
||||
end_sequence ();
|
||||
emit_insn (seq);
|
||||
|
@ -333,7 +333,7 @@
|
|||
|
||||
start_sequence ();
|
||||
emit_insn (gen_movsi (gen_lowpart (SImode, data), address));
|
||||
ms1_set_memflags (operands[1]);
|
||||
mt_set_memflags (operands[1]);
|
||||
seq = get_insns ();
|
||||
end_sequence ();
|
||||
emit_insn (seq);
|
||||
|
@ -467,7 +467,7 @@
|
|||
start_sequence ();
|
||||
emit_insn (gen_storehi (gen_lowpart (SImode, data), address,
|
||||
scratch1, scratch2, scratch3));
|
||||
ms1_set_memflags (operands[0]);
|
||||
mt_set_memflags (operands[0]);
|
||||
seq = get_insns ();
|
||||
end_sequence ();
|
||||
emit_insn (seq);
|
||||
|
@ -487,7 +487,7 @@
|
|||
start_sequence ();
|
||||
emit_insn (gen_loadhi (gen_lowpart (SImode, data), address,
|
||||
scratch1));
|
||||
ms1_set_memflags (operands[1]);
|
||||
mt_set_memflags (operands[1]);
|
||||
seq = get_insns ();
|
||||
end_sequence ();
|
||||
emit_insn (seq);
|
||||
|
@ -506,7 +506,7 @@
|
|||
|
||||
start_sequence ();
|
||||
emit_insn (gen_movsi (gen_lowpart (SImode, data), address));
|
||||
ms1_set_memflags (operands[1]);
|
||||
mt_set_memflags (operands[1]);
|
||||
seq = get_insns ();
|
||||
end_sequence ();
|
||||
emit_insn (seq);
|
||||
|
@ -716,7 +716,7 @@
|
|||
|
||||
"{
|
||||
/* figure out what precisely to put into operands 2, 3, 4, and 5 */
|
||||
ms1_split_words (SImode, DFmode, operands);
|
||||
mt_split_words (SImode, DFmode, operands);
|
||||
}"
|
||||
)
|
||||
|
||||
|
@ -757,7 +757,7 @@
|
|||
|
||||
start_sequence ();
|
||||
emit_insn (gen_loadqi (gen_lowpart (SImode, data), address, scratch1));
|
||||
ms1_set_memflags (operands[1]);
|
||||
mt_set_memflags (operands[1]);
|
||||
seq = get_insns ();
|
||||
end_sequence ();
|
||||
emit_insn (seq);
|
||||
|
@ -786,7 +786,7 @@
|
|||
start_sequence ();
|
||||
emit_insn (gen_storeqi (gen_lowpart (SImode, data), address,
|
||||
scratch1, scratch2, scratch3));
|
||||
ms1_set_memflags (operands[0]);
|
||||
mt_set_memflags (operands[0]);
|
||||
seq = get_insns ();
|
||||
end_sequence ();
|
||||
emit_insn (seq);
|
||||
|
@ -824,7 +824,7 @@
|
|||
start_sequence ();
|
||||
emit_insn (gen_loadhi (gen_lowpart (SImode, data), address,
|
||||
scratch1));
|
||||
ms1_set_memflags (operands[1]);
|
||||
mt_set_memflags (operands[1]);
|
||||
seq = get_insns ();
|
||||
end_sequence ();
|
||||
emit_insn (seq);
|
||||
|
@ -853,7 +853,7 @@
|
|||
start_sequence ();
|
||||
emit_insn (gen_storehi (gen_lowpart (SImode, data), address,
|
||||
scratch1, scratch2, scratch3));
|
||||
ms1_set_memflags (operands[0]);
|
||||
mt_set_memflags (operands[0]);
|
||||
seq = get_insns ();
|
||||
end_sequence ();
|
||||
emit_insn (seq);
|
||||
|
@ -1014,8 +1014,8 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
ms1_compare_op0 = operands[0];
|
||||
ms1_compare_op1 = operands[1];
|
||||
mt_compare_op0 = operands[0];
|
||||
mt_compare_op1 = operands[1];
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1026,8 +1026,8 @@
|
|||
[(use (match_operand 0 "" ""))]
|
||||
""
|
||||
"
|
||||
{ ms1_emit_cbranch (EQ, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
{
|
||||
mt_emit_cbranch (EQ, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1035,8 +1035,8 @@
|
|||
[(use (match_operand 0 "" ""))]
|
||||
""
|
||||
"
|
||||
{ ms1_emit_cbranch (NE, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
{
|
||||
mt_emit_cbranch (NE, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1044,8 +1044,8 @@
|
|||
[(use (match_operand 0 "" ""))]
|
||||
""
|
||||
"
|
||||
{ ms1_emit_cbranch (GE, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
{
|
||||
mt_emit_cbranch (GE, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1053,8 +1053,8 @@
|
|||
[(use (match_operand 0 "" ""))]
|
||||
""
|
||||
"
|
||||
{ ms1_emit_cbranch (GT, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
{
|
||||
mt_emit_cbranch (GT, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1062,8 +1062,8 @@
|
|||
[(use (match_operand 0 "" ""))]
|
||||
""
|
||||
"
|
||||
{ ms1_emit_cbranch (LE, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
{
|
||||
mt_emit_cbranch (LE, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1071,8 +1071,8 @@
|
|||
[(use (match_operand 0 "" ""))]
|
||||
""
|
||||
"
|
||||
{ ms1_emit_cbranch (LT, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
{
|
||||
mt_emit_cbranch (LT, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1080,8 +1080,8 @@
|
|||
[(use (match_operand 0 "" ""))]
|
||||
""
|
||||
"
|
||||
{ ms1_emit_cbranch (GEU, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
{
|
||||
mt_emit_cbranch (GEU, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1089,8 +1089,8 @@
|
|||
[(use (match_operand 0 "" ""))]
|
||||
""
|
||||
"
|
||||
{ ms1_emit_cbranch (GTU, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
{
|
||||
mt_emit_cbranch (GTU, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1098,8 +1098,8 @@
|
|||
[(use (match_operand 0 "" ""))]
|
||||
""
|
||||
"
|
||||
{ ms1_emit_cbranch (LEU, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
{
|
||||
mt_emit_cbranch (LEU, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1107,8 +1107,8 @@
|
|||
[(use (match_operand 0 "" ""))]
|
||||
""
|
||||
"
|
||||
{ ms1_emit_cbranch (LTU, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
{
|
||||
mt_emit_cbranch (LTU, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1116,8 +1116,8 @@
|
|||
[(use (match_operand 0 "" ""))]
|
||||
""
|
||||
"
|
||||
{ ms1_emit_cbranch (GEU, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
{
|
||||
mt_emit_cbranch (GEU, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1126,8 +1126,7 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
ms1_emit_cbranch (GTU, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
mt_emit_cbranch (GTU, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1136,8 +1135,7 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
ms1_emit_cbranch (LEU, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
mt_emit_cbranch (LEU, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1146,8 +1144,7 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
ms1_emit_cbranch (LTU, operands[0],
|
||||
ms1_compare_op0, ms1_compare_op1);
|
||||
mt_emit_cbranch (LTU, operands[0], mt_compare_op0, mt_compare_op1);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1284,7 +1281,7 @@
|
|||
[(set_attr "length" "4")
|
||||
(set_attr "type" "branch")])
|
||||
|
||||
;; No unsigned operators on Morpho ms1. All the unsigned operations are
|
||||
;; No unsigned operators on Morpho mt. All the unsigned operations are
|
||||
;; converted to the signed operations above.
|
||||
|
||||
|
||||
|
@ -1292,7 +1289,7 @@
|
|||
|
||||
;; "seq", "sne", "slt", "sle", "sgt", "sge", "sltu", "sleu",
|
||||
;; "sgtu", and "sgeu" don't exist as regular instruction on the
|
||||
;; ms1, so these are not defined
|
||||
;; mt, so these are not defined
|
||||
|
||||
;; Call and branch instructions
|
||||
|
||||
|
@ -1402,7 +1399,7 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
ms1_expand_prologue ();
|
||||
mt_expand_prologue ();
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1411,7 +1408,7 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
ms1_expand_epilogue (NORMAL_EPILOGUE);
|
||||
mt_expand_epilogue (NORMAL_EPILOGUE);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1421,7 +1418,7 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
ms1_expand_eh_return (operands);
|
||||
mt_expand_eh_return (operands);
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1432,7 +1429,7 @@
|
|||
"#"
|
||||
"reload_completed"
|
||||
[(const_int 1)]
|
||||
"ms1_emit_eh_epilogue (operands); DONE;"
|
||||
"mt_emit_eh_epilogue (operands); DONE;"
|
||||
)
|
||||
|
||||
;; No operation, needed in case the user uses -g but not -O.
|
||||
|
@ -1479,8 +1476,8 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
operands[2] = ms1_compare_op0;
|
||||
operands[3] = ms1_compare_op1;
|
||||
operands[2] = mt_compare_op0;
|
||||
operands[3] = mt_compare_op1;
|
||||
}")
|
||||
|
||||
;; Templates to control handling of interrupts
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
; Options for the ms1 port of the compiler
|
||||
; Options for the mt port of the compiler
|
||||
;
|
||||
; Copyright (C) 2005 Free Software Foundation, Inc.
|
||||
;
|
||||
|
@ -52,5 +52,5 @@ Target RejectNegative Mask(DEBUG)
|
|||
Internal debug switch
|
||||
|
||||
march=
|
||||
Target RejectNegative Joined Var(ms1_cpu_string)
|
||||
Target RejectNegative Joined Var(mt_cpu_string)
|
||||
Specify CPU for code generation purposes
|
||||
|
|
Loading…
Add table
Reference in a new issue