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constraints.md: New.

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* config/m68k/constraints.md: New.
	* config/m68k/m68k.h (REG_CLASS_FROM_LETTER,
	CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P,
	EXTRA_CONSTRAINT): Remove.
	* config/m68k/m68k.md: Include constraints.md.
	* expr.c (expand_expr_real_1): Copy DECL_RTL before using it.

From-SVN: r124335
This commit is contained in:
Kazu Hirata 2007-05-01 17:54:15 +00:00 • committed by Kazu Hirata
parent e1f28918ef
commit b38bab9485
5 changed files with 118 additions and 68 deletions
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9
gcc/ChangeLog
View file

@ -1,3 +1,12 @@
2007-05-01 Kazu Hirata <kazu@codesourcery.com>
* config/m68k/constraints.md: New.
* config/m68k/m68k.h (REG_CLASS_FROM_LETTER,
CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P,
EXTRA_CONSTRAINT): Remove.
* config/m68k/m68k.md: Include constraints.md.
* expr.c (expand_expr_real_1): Copy DECL_RTL before using it.
2007-05-01 Ian Lance Taylor <iant@google.com>
PR tree-optimization/31739

107
gcc/config/m68k/constraints.md Normal file
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@ -0,0 +1,107 @@
;; Constraint definitions for m68k
;; Copyright (C) 2007 Free Software Foundation, Inc.
;; This file is part of GCC.
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published
;; by the Free Software Foundation; either version 2, or (at your
;; option) any later version.
;; GCC is distributed in the hope that it will be useful, but WITHOUT
;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
;; License for more details.
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING. If not, write to
;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
;; Boston, MA 02110-1301, USA.
(define_register_constraint "a" "ADDR_REGS"
"Address register.")
(define_register_constraint "d" "DATA_REGS"
"Data register.")
(define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS"
"Floating point register.")
(define_constraint "I"
"Integer constant in the range 1 @dots 8, for immediate shift counts and addq."
(and (match_code "const_int")
(match_test "ival > 0 && ival <= 8")))
(define_constraint "J"
"Signed 16-bit integer constant."
(and (match_code "const_int")
(match_test "ival >= -0x8000 && ival <= 0x7fff")))
(define_constraint "K"
"Integer constant that moveq can't handle."
(and (match_code "const_int")
(match_test "ival < -0x80 || ival >= 0x80")))
(define_constraint "L"
"Integer constant in the range -8 @dots -1, for subq."
(and (match_code "const_int")
(match_test "ival < 0 && ival >= -8")))
(define_constraint "M"
"Integer constant that moveq+notb can't handle."
(and (match_code "const_int")
(match_test "ival < -0x100 || ival >= 0x100")))
(define_constraint "N"
"Integer constant in the range 24 @dots 31, for rotatert:SI 8 to 1 expressed as rotate."
(and (match_code "const_int")
(match_test "ival >= 24 && ival <= 31")))
(define_constraint "O"
"Integer constant 16, for rotate using swap."
(and (match_code "const_int")
(match_test "ival == 16")))
(define_constraint "P"
"Integer constant in the range 8 @dots 15, for rotatert:HI 8 to 1 expressed as rotate."
(and (match_code "const_int")
(match_test "ival >= 8 && ival <= 15")))
(define_constraint "R"
"Integer constant that mov3q can handle."
(and (match_code "const_int")
(match_test "valid_mov3q_const (ival)")))
(define_constraint "G"
"Defines all of the floating constants that are *NOT* 68881
constants. This is so 68881 constants get reloaded and the fpmovecr
is used."
(and (match_code "const_double")
(match_test "!(TARGET_68881 && standard_68881_constant_p (op))")))
(define_constraint "S"
"Used for operands that satisfy 'm' when -mpcrel is in effect."
(and (match_code "mem")
(match_test "TARGET_PCREL
&& (GET_CODE (XEXP (op, 0)) == SYMBOL_REF
|| GET_CODE (XEXP (op, 0)) == LABEL_REF
|| GET_CODE (XEXP (op, 0)) == CONST)")))
(define_constraint "T"
"Used for operands that satisfy 's' when -mpcrel is not in effect."
(and (match_code "symbol_ref,label_ref,const")
(match_test "!flag_pic")))
(define_memory_constraint "Q"
"Means address register indirect addressing mode."
(and (match_code "mem")
(match_test "m68k_matches_q_p (op)")))
(define_constraint "U"
"Used for register offset addressing."
(and (match_code "mem")
(match_test "m68k_matches_u_p (op)")))
(define_constraint "W"
"Used for const_call_operands."
(match_operand 0 "const_call_operand"))

68
gcc/config/m68k/m68k.h
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@ -485,74 +485,6 @@ extern enum reg_class regno_reg_class[];
#define INDEX_REG_CLASS GENERAL_REGS
#define BASE_REG_CLASS ADDR_REGS
/* We do a trick here to modify the effective constraints on the
machine description; we zorch the constraint letters that aren't
appropriate for a specific target. This allows us to guarantee
that a specific kind of register will not be used for a given target
without fiddling with the register classes above. */
#define REG_CLASS_FROM_LETTER(C) \
((C) == 'a' ? ADDR_REGS : \
((C) == 'd' ? DATA_REGS : \
((C) == 'f' ? (TARGET_HARD_FLOAT ? \
FP_REGS : NO_REGS) : \
NO_REGS)))
/* For the m68k, `I' is used for the range 1 to 8
allowed as immediate shift counts and in addq.
`J' is used for the range of signed numbers that fit in 16 bits.
`K' is for numbers that moveq can't handle.
`L' is for range -8 to -1, range of values that can be added with subq.
`M' is for numbers that moveq+notb can't handle.
'N' is for range 24 to 31, rotatert:SI 8 to 1 expressed as rotate.
'O' is for 16 (for rotate using swap).
'P' is for range 8 to 15, rotatert:HI 8 to 1 expressed as rotate.
'R' is for numbers that mov3q can handle. */
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \
(C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
(C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
(C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : \
(C) == 'M' ? (VALUE) < -0x100 || (VALUE) >= 0x100 : \
(C) == 'N' ? (VALUE) >= 24 && (VALUE) <= 31 : \
(C) == 'O' ? (VALUE) == 16 : \
(C) == 'P' ? (VALUE) >= 8 && (VALUE) <= 15 : \
(C) == 'R' ? valid_mov3q_const (VALUE) : 0)
/* "G" defines all of the floating constants that are *NOT* 68881
constants. This is so 68881 constants get reloaded and the
fpmovecr is used. */
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 )
/* `Q' means address register indirect addressing mode.
`S' is for operands that satisfy 'm' when -mpcrel is in effect.
`T' is for operands that satisfy 's' when -mpcrel is not in effect.
`U' is for register offset addressing.
`W' is for const_call_operands. */
#define EXTRA_CONSTRAINT(OP,CODE) \
((CODE) == 'S' \
? (TARGET_PCREL \
&& GET_CODE (OP) == MEM \
&& (GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \
|| GET_CODE (XEXP (OP, 0)) == LABEL_REF \
|| GET_CODE (XEXP (OP, 0)) == CONST)) \
: \
(CODE) == 'T' \
? (!flag_pic \
&& (GET_CODE (OP) == SYMBOL_REF \
|| GET_CODE (OP) == LABEL_REF \
|| GET_CODE (OP) == CONST)) \
: \
(CODE) == 'Q' \
? m68k_matches_q_p (OP) \
: \
(CODE) == 'U' \
? m68k_matches_u_p (OP) \
: \
(CODE) == 'W' \
? const_call_operand (OP, VOIDmode) \
: 0)
#define PREFERRED_RELOAD_CLASS(X,CLASS) \
m68k_preferred_reload_class (X, CLASS)

1
gcc/config/m68k/m68k.md
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@ -135,6 +135,7 @@
])
(include "predicates.md")
(include "constraints.md")
;; Mode macros for floating point operations.
;; Valid floating point modes

1
gcc/expr.c
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@ -6968,6 +6968,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
case RESULT_DECL:
decl_rtl = DECL_RTL (exp);
gcc_assert (decl_rtl);
decl_rtl = copy_rtx (decl_rtl);
/* Ensure variable marked as used even if it doesn't go through
a parser. If it hasn't be used yet, write out an external