Daily bump.
This commit is contained in:
parent
f0eabc52c9
commit
aeaf942699
7 changed files with 294 additions and 1 deletions
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@ -1,3 +1,7 @@
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2023-04-24 Martin Liska <mliska@suse.cz>
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* MAINTAINERS: Fix sorting.
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2023-04-21 Peter Foley <pefoley2@pefoley.com>
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* configure: Regenerate.
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205
gcc/ChangeLog
205
gcc/ChangeLog
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@ -1,3 +1,208 @@
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2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
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* tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
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simplify two successive VEC_PERM_EXPRs with same VLA mask,
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where mask chooses elements in reverse order.
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2023-04-24 Andrew Pinski <apinski@marvell.com>
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* tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
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and support diamond shaped basic block form.
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(tree_ssa_phiopt_worker): Update call to match_simplify_replacement
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2023-04-24 Andrew Pinski <apinski@marvell.com>
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* tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
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Instead of calling last_and_only_stmt, look for the last statement
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manually.
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2023-04-24 Andrew Pinski <apinski@marvell.com>
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* tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
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New function.
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(match_simplify_replacement): Call
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empty_bb_or_one_feeding_into_p instead of doing it inline.
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2023-04-24 Andrew Pinski <apinski@marvell.com>
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PR tree-optimization/68894
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* tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
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continue for the do_hoist_loads diamond case.
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2023-04-24 Andrew Pinski <apinski@marvell.com>
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* tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
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code for better code readability.
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2023-04-24 Andrew Pinski <apinski@marvell.com>
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PR tree-optimization/109604
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* tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
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diamond form check from ...
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(minmax_replacement): Here.
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2023-04-24 Patrick Palka <ppalka@redhat.com>
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* tree.cc (strip_array_types): Don't define here.
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(is_typedef_decl): Don't define here.
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(typedef_variant_p): Don't define here.
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* tree.h (strip_array_types): Define here.
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(is_typedef_decl): Define here.
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(typedef_variant_p): Define here.
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2023-04-24 Frederik Harwath <frederik@codesourcery.com>
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* doc/generic.texi (OpenMP): Add != to allowed
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conditions and state that vars can be unsigned.
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* tree.def (OMP_FOR): Likewise.
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2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64-simd.md (mulv2di3): New expander.
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2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
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* doc/install.texi: Consistently use Solaris rather than Solaris 2.
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Remove explicit Solaris 11 references.
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Markup fixes.
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(Options specification, --with-gnu-as): as and gas always differ
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on Solaris.
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Remove /usr/ccs/bin reference.
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(Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
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(i?86-*-solaris2*): Merge assembler, linker recommendations ...
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(*-*-solaris2*): ... here.
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Update bundled GCC versions.
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Don't refer to pre-built binaries.
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Remove /bin/sh warning.
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Update assembler, linker recommendations.
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Document GNAT bootstrap compiler.
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(sparc-sun-solaris2*): Remove non-UltraSPARC reference.
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(sparc64-*-solaris2*): Move content...
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(sparcv9-*-solaris2*): ...here.
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Add GDC for 64-bit bootstrap compilers.
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2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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PR target/109406
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* config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
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case.
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* config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
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pattern.
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2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
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(aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
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(aarch64_<su>abal2<mode>): New define_expand.
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* config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
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(aarch64_rtx_costs): Handle ABD rtxes.
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* config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
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* config/aarch64/iterators.md (ABAL2): Delete.
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(sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
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2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
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(aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
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(<sur>sadv16qi): Rename to...
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(<su>sadv16qi): ... This. Adjust for the above.
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* config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
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(<su>sad<vsi2qi>): ... This. Adjust for the above.
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* config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
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* config/aarch64/iterators.md (ABAL): Delete.
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(sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
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2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
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(aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
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(aarch64_<su>abdl2<mode>): New define_expand.
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* config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
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* config/aarch64/iterators.md (ABDL2): Delete.
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(sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
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2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
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(aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
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unspec.
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* config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
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* config/aarch64/iterators.md (ABDL): Delete.
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(sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
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2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64-simd.md
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(*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
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2023-04-24 Richard Biener <rguenther@suse.de>
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* gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
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last_stmt.
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* graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
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Likewise.
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* ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
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(set_switch_stmt_execution_predicate): Likewise.
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(phi_result_unknown_predicate): Likewise.
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* ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
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(ipa_analyze_indirect_call_uses): Likewise.
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* predict.cc (predict_iv_comparison): Likewise.
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(predict_extra_loop_exits): Likewise.
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(predict_loops): Likewise.
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(tree_predict_by_opcode): Likewise.
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* gimple-predicate-analysis.cc (predicate::init_from_control_deps):
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Likewise.
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* gimple-pretty-print.cc (dump_implicit_edges): Likewise.
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* tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
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(replace_phi_edge_with_variable): Likewise.
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(two_value_replacement): Likewise.
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(value_replacement): Likewise.
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(minmax_replacement): Likewise.
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(spaceship_replacement): Likewise.
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(cond_removal_in_builtin_zero_pattern): Likewise.
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* tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
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* tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
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(vn_phi_lookup): Likewise.
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(vn_phi_insert): Likewise.
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* tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
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* tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
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Likewise.
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(back_threader_profitability::possibly_profitable_path_p):
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Likewise.
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* tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
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Likewise.
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* tree-switch-conversion.cc (pass_convert_switch::execute):
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Likewise.
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(pass_lower_switch<O0>::execute): Likewise.
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* tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
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* tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
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* tree-vect-slp.cc (vect_slp_function): Likewise.
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* tree-vect-stmts.cc (cfun_returns): Likewise.
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* tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
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(vect_loop_dist_alias_call): Likewise.
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2023-04-24 Richard Biener <rguenther@suse.de>
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* cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
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2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
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* config/riscv/riscv-vsetvl.cc
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(vector_infos_manager::all_avail_in_compatible_p): New function.
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(pass_vsetvl::refine_vsetvls): Optimize vsetvls.
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* config/riscv/riscv-vsetvl.h: New function.
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2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
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* config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
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comment for cleanup_insns.
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2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
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* config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
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* config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
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with the fault first load property.
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2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
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@ -1 +1 @@
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20230424
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20230425
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@ -1,3 +1,8 @@
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2023-04-24 Patrick Palka <ppalka@redhat.com>
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* cp-tree.h (cp_expr_location): Define here.
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* tree.cc (cp_expr_location): Don't define here.
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2023-04-21 Jason Merrill <jason@redhat.com>
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PR c++/108099
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@ -1,3 +1,7 @@
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2023-04-24 Joseph Myers <joseph@codesourcery.com>
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* hr.po, sv.po, zh_CN.po: Update.
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2023-04-12 Joseph Myers <joseph@codesourcery.com>
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* de.po: Update.
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@ -1,3 +1,69 @@
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2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
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* gcc.target/aarch64/sve/acle/general/rev-1.c: New test.
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2023-04-24 Andrew Pinski <apinski@marvell.com>
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* gcc.dg/tree-ssa/phi-opt-23.c: Update testcase.
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* gcc.dg/tree-ssa/phi-opt-24.c: Likewise.
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2023-04-24 Andrew Pinski <apinski@marvell.com>
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* gcc.dg/tree-ssa/ssa-ifcombine-13.c: Add -fno-ssa-phiopt.
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2023-04-24 Andrew Pinski <apinski@marvell.com>
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PR tree-optimization/109604
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* gcc.c-torture/compile/pr109604-1.c: New test.
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* gcc.c-torture/compile/pr109604-2.c: New test.
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2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* gcc.target/aarch64/sve-neon-modes_1.c: New test.
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* gcc.target/aarch64/sve-neon-modes_2.c: New test.
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2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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PR target/109406
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* gcc.target/aarch64/sve2/div-by-bitmask_1.c: Adjust for unpredicated SVE2
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MUL.
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* gcc.target/aarch64/sve2/unpred_mul_1.c: New test.
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2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* gcc.target/aarch64/simd/vabal_combine.c: New test.
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2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* gcc.target/aarch64/simd/addlv_zext.c: New test.
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2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
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* gcc.target/riscv/rvv/vsetvl/avl_single-102.c: New test.
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2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
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* gcc.target/riscv/rvv/vsetvl/ffload-1.c: New test.
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* gcc.target/riscv/rvv/vsetvl/ffload-2.c: New test.
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* gcc.target/riscv/rvv/vsetvl/ffload-3.c: New test.
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* gcc.target/riscv/rvv/vsetvl/ffload-5.c: New test.
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* gcc.target/riscv/rvv/vsetvl/ffload-6.c: New test.
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* gcc.target/riscv/rvv/vsetvl/ffload-7.c: New test.
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2023-04-24 liuhongt <hongtao.liu@intel.com>
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PR tree-optimization/109011
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* gcc.target/i386/pr109011-b1.c: New test.
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* gcc.target/i386/pr109011-b2.c: New test.
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* gcc.target/i386/pr109011-d1.c: New test.
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* gcc.target/i386/pr109011-d2.c: New test.
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* gcc.target/i386/pr109011-q1.c: New test.
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* gcc.target/i386/pr109011-q2.c: New test.
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* gcc.target/i386/pr109011-w1.c: New test.
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* gcc.target/i386/pr109011-w2.c: New test.
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* gcc.target/i386/pr109011-dq1.c: New file.
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* gcc.target/i386/pr109011-dq2.c: New file.
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2023-04-23 Gaius Mulley <gaiusmod2@gmail.com>
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* lib/gm2.exp (gm2_target_compile_default): Conditionally
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2023-04-24 Patrick Palka <ppalka@redhat.com>
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* include/bits/max_size_type.h (__max_diff_type::operator>>=):
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Fix propagation of sign bit.
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* testsuite/std/ranges/iota/max_size_type.cc: Avoid using the
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non-standard 'signed typedef-name'. Add some compile-time tests
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for right-shifting a negative __max_diff_type value by more than
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one.
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2023-04-19 Patrick Palka <ppalka@redhat.com>
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Jonathan Wakely <jwakely@redhat.com>
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Reference in a new issue