testsuite: aarch64: Fix invalid SVE tests
Some scan-assembler tests for SVE code generation were erroneously split over multiple lines - meaning they became invalid. This patch gets the tests working again by putting each test on a single line. The extract_[1234].c tests are corrected to expect that extracted 32-bit values are moved into 'w' registers rather than 'x' registers. gcc/testsuite/ChangeLog: 2021-08-06 Jonathan Wright <jonathan.wright@arm.com> * gcc.target/aarch64/sve/dup_lane_1.c: Don't split scan-assembler tests over multiple lines. Expect 32-bit result values in 'w' registers. * gcc.target/aarch64/sve/extract_1.c: Likewise. * gcc.target/aarch64/sve/extract_2.c: Likewise. * gcc.target/aarch64/sve/extract_3.c: Likewise. * gcc.target/aarch64/sve/extract_4.c: Likewise.
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5 changed files with 24 additions and 48 deletions
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@ -56,27 +56,19 @@ TEST_ALL (DUP_LANE)
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/* { dg-final { scan-assembler-not {\ttbl\t} } } */
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/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, d[0-9]} 2 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.d, z[0-9]+\.d\[0\]} 2 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, d[0-9]} 2 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.d, z[0-9]+\.d\[0\]} 2 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.d, z[0-9]+\.d\[2\]} 2 } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.d, z[0-9]+\.d\[3\]} 2 } } */
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/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.s, s[0-9]} 2 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.s, z[0-9]+\.s\[0\]} 2 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.s, s[0-9]} 2 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.s, z[0-9]+\.s\[0\]} 2 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.s, z[0-9]+\.s\[5\]} 2 } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.s, z[0-9]+\.s\[7\]} 2 } } */
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/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.h, h[0-9]} 2 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.h, z[0-9]+\.h\[0\]} 2 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.h, h[0-9]} 2 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.h, z[0-9]+\.h\[0\]} 2 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.h, z[0-9]+\.h\[6\]} 2 } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.h, z[0-9]+\.h\[15\]} 2 } } */
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/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.b, b[0-9]} 1 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.b, z[0-9]+\.b\[0\]} 1 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.b, b[0-9]} 1 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.b, z[0-9]+\.b\[0\]} 1 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.b, z[0-9]+\.b\[19\]} 1 } } */
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/* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.b, z[0-9]+\.b\[31\]} 1 } } */
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@ -56,10 +56,8 @@ typedef _Float16 vnx8hf __attribute__((vector_size (32)));
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TEST_ALL (EXTRACT)
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 2 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 2 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
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/* { dg-final { scan-assembler-not {\tdup\td[0-9]+, v[0-9]+\.d\[0\]\n} } } */
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/* { dg-final { scan-assembler-times {\tdup\td[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
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@ -67,10 +65,8 @@ TEST_ALL (EXTRACT)
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/* { dg-final { scan-assembler-times {\tlastb\tx[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tlastb\td[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, s[0-9]\n} 2 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.s\[0\]\n} 1 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tfmov\tw[0-9]+, s[0-9]\n} 2 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[0\]\n} 1 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[1\]\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[3\]\n} 1 } } */
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/* { dg-final { scan-assembler-not {\tdup\ts[0-9]+, v[0-9]+\.s\[0\]\n} } } */
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@ -56,10 +56,8 @@ typedef _Float16 vnx16hf __attribute__((vector_size (64)));
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TEST_ALL (EXTRACT)
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 2 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 2 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
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/* { dg-final { scan-assembler-not {\tdup\td[0-9]+, v[0-9]+\.d\[0\]\n} } } */
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/* { dg-final { scan-assembler-times {\tdup\td[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
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@ -67,10 +65,8 @@ TEST_ALL (EXTRACT)
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/* { dg-final { scan-assembler-times {\tlastb\tx[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tlastb\td[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, s[0-9]\n} 2 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.s\[0\]\n} 1 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tfmov\tw[0-9]+, s[0-9]\n} 2 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[0\]\n} 1 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[1\]\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[3\]\n} 1 } } */
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/* { dg-final { scan-assembler-not {\tdup\ts[0-9]+, v[0-9]+\.s\[0\]\n} } } */
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@ -77,10 +77,8 @@ typedef _Float16 vnx32hf __attribute__((vector_size (128)));
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TEST_ALL (EXTRACT)
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 5 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 5 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
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/* { dg-final { scan-assembler-not {\tdup\td[0-9]+, v[0-9]+\.d\[0\]\n} } } */
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/* { dg-final { scan-assembler-times {\tdup\td[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
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@ -89,10 +87,8 @@ TEST_ALL (EXTRACT)
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/* { dg-final { scan-assembler-times {\tlastb\tx[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tlastb\td[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, s[0-9]\n} 5 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.s\[0\]\n} 1 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tfmov\tw[0-9]+, s[0-9]\n} 5 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[0\]\n} 1 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[1\]\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[3\]\n} 1 } } */
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/* { dg-final { scan-assembler-not {\tdup\ts[0-9]+, v[0-9]+\.s\[0\]\n} } } */
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@ -84,10 +84,8 @@ typedef _Float16 v128hf __attribute__((vector_size (256)));
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TEST_ALL (EXTRACT)
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 6 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 6 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
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/* { dg-final { scan-assembler-not {\tdup\td[0-9]+, v[0-9]+\.d\[0\]\n} } } */
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/* { dg-final { scan-assembler-times {\tdup\td[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
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@ -96,10 +94,8 @@ TEST_ALL (EXTRACT)
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/* { dg-final { scan-assembler-times {\tlastb\tx[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tlastb\td[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, s[0-9]\n} 6 {
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target { aarch64_little_endian } } } } */
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/* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.s\[0\]\n} 1 {
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target { aarch64_big_endian } } } } */
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/* { dg-final { scan-assembler-times {\tfmov\tw[0-9]+, s[0-9]\n} 6 { target aarch64_little_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[0\]\n} 1 { target aarch64_big_endian } } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[1\]\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[3\]\n} 1 } } */
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/* { dg-final { scan-assembler-not {\tdup\ts[0-9]+, v[0-9]+\.s\[0\]\n} } } */
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