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re PR target/65871 (bzhi builtin/intrinsic wrongly assumes bzhi instruction doesn't set the ZF flag)

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PR target/65871
	* config/i386/i386.md (*bmi_andn_<mode>_ccno): New pattern.

testsuite/ChangeLog:

	PR target/65871
	* gcc.target/i386/pr65871-3.c: New test.

From-SVN: r222795
This commit is contained in:
Uros Bizjak 2015-05-05 06:36:19 +02:00
parent d6ed95fcb5
commit a42de35f0d
4 changed files with 57 additions and 14 deletions
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11
gcc/ChangeLog
View file

@ -1,4 +1,9 @@
2015-05-02 Jan Hubicka <hubicka@ucw.cz>
2015-05-05 Uros Bizjak <ubizjak@gmail.com>
PR target/65871
* config/i386/i386.md (*bmi_andn_<mode>_ccno): New pattern.
2015-05-04 Jan Hubicka <hubicka@ucw.cz>
* tree.c (verify_type): Check various uses of TYPE_MAXVAL;
fix overactive TYPE_MIN_VALUE check and add FIXME for type
@ -438,8 +443,8 @@
2015-04-29 Uros Bizjak <ubizjak@gmail.com>
PR target/65871
* config/i386/i386.md (*bmi_bextr_<mode>_cczonly): New pattern.
(*bmi2_bzhi_<mode>3_1_cczonly): Ditto.
* config/i386/i386.md (*bmi_bextr_<mode>_ccz): New pattern.
(*bmi2_bzhi_<mode>3_1_ccz): Ditto.
(setcc+movzbl peephole2): Check also clobbered reg.
(setcc+andl peephole2): Ditto.

31
gcc/config/i386/i386.md
View file

@ -12554,10 +12554,9 @@
;; BMI instructions.
(define_insn "*bmi_andn_<mode>"
[(set (match_operand:SWI48 0 "register_operand" "=r,r")
(and:SWI48
(not:SWI48
(match_operand:SWI48 1 "register_operand" "r,r"))
(match_operand:SWI48 2 "nonimmediate_operand" "r,m")))
(and:SWI48
(not:SWI48 (match_operand:SWI48 1 "register_operand" "r,r"))
(match_operand:SWI48 2 "nonimmediate_operand" "r,m")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_BMI"
"andn\t{%2, %1, %0|%0, %1, %2}"
@ -12565,11 +12564,25 @@
(set_attr "btver2_decode" "direct, double")
(set_attr "mode" "<MODE>")])
(define_insn "*bmi_andn_<mode>_ccno"
[(set (reg FLAGS_REG)
(compare
(and:SWI48
(not:SWI48 (match_operand:SWI48 1 "register_operand" "r,r"))
(match_operand:SWI48 2 "nonimmediate_operand" "r,m"))
(const_int 0)))
(clobber (match_scratch:SWI48 0 "=r,r"))]
"TARGET_BMI && ix86_match_ccmode (insn, CCNOmode)"
"andn\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "bitmanip")
(set_attr "btver2_decode" "direct, double")
(set_attr "mode" "<MODE>")])
(define_insn "bmi_bextr_<mode>"
[(set (match_operand:SWI48 0 "register_operand" "=r,r")
(unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "r,m")
(match_operand:SWI48 2 "register_operand" "r,r")]
UNSPEC_BEXTR))
(unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "r,m")
(match_operand:SWI48 2 "register_operand" "r,r")]
UNSPEC_BEXTR))
(clobber (reg:CC FLAGS_REG))]
"TARGET_BMI"
"bextr\t{%2, %1, %0|%0, %1, %2}"
@ -12577,7 +12590,7 @@
(set_attr "btver2_decode" "direct, double")
(set_attr "mode" "<MODE>")])
(define_insn "*bmi_bextr_<mode>_cczonly"
(define_insn "*bmi_bextr_<mode>_ccz"
[(set (reg:CCZ FLAGS_REG)
(compare:CCZ
(unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "r,m")
@ -12680,7 +12693,7 @@
(set_attr "prefix" "vex")
(set_attr "mode" "<MODE>")])
(define_insn "*bmi2_bzhi_<mode>3_1_cczonly"
(define_insn "*bmi2_bzhi_<mode>3_1_ccz"
[(set (reg:CCZ FLAGS_REG)
(compare:CCZ
(zero_extract:SWI48

9
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,8 @@
2015-05-05 Uros Bizjak <ubizjak@gmail.com>
PR target/65871
* gcc.target/i386/pr65871-3.c: New test.
2015-05-04 Jeff Law <law@redhat.com>
Revert:
@ -174,7 +179,7 @@
scan pattern.
* gfortran.dg/bound_9.f90: New test case.
2015-04-29 Uros Bizjak <ubizjak@gmail.com>
2015-04-30 Uros Bizjak <ubizjak@gmail.com>
* g++.dg/ipa/devirt-28a.C: Require LTO effective target.
* g++.dg/ext/sync-4.C (dg-additional-options): Use -march=pentium
@ -232,7 +237,7 @@
2015-04-29 Uros Bizjak <ubizjak@gmail.com>
PR target/65871
* gcc.target/i386/pr65871-1.c: New test
* gcc.target/i386/pr65871-1.c: New test.
* gcc.target/i386/pr65871-2.c: Ditto.
2015-04-29 Marek Polacek <polacek@redhat.com>

20
gcc/testsuite/gcc.target/i386/pr65871-3.c Normal file
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@ -0,0 +1,20 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mbmi" } */
int foo (int x, int y)
{
if (~x & y)
return 1;
return 0;
}
int bar (int x, int y)
{
if ((~x & y) > 0)
return 1;
return 0;
}
/* { dg-final { scan-assembler-not "test" } } */