re PR target/62055 (missed optimization: recognize fnabs (FP negative absolute value) (x86-64))
PR target/62055 * config/i386/i386.md (*nabstf2_1): New insn pattern. (*nabs<mode>2_1): Ditto. (nabs sse-reg splitter): New splitter. * config/i386/sse.md (*nabs<mode>2): New insn_and_split pattern. testsuite/ChangeLog: PR target/62055 * gcc.target/i386/fnabs.c: New test. From-SVN: r272396
This commit is contained in:
Uros Bizjak
parent
bf0af866a4
commit
a064fd4c73
5 changed files with 114 additions and 1 deletions
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@ -1,3 +1,11 @@
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2019-06-17 Uroš Bizjak <ubizjak@gmail.com>
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PR target/62055
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* config/i386/i386.md (*nabstf2_1): New insn pattern.
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(*nabs<mode>2_1): Ditto.
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(nabs sse-reg splitter): New splitter.
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* config/i386/sse.md (*nabs<mode>2): New insn_and_split pattern.
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2019-06-17 Jan Hubicka <hubicka@ucw.cz>
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PR bootstrap/90873.
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@ -9452,6 +9452,16 @@
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"#"
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[(set_attr "isa" "noavx,noavx,avx,avx")])
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(define_insn "*nabstf2_1"
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[(set (match_operand:TF 0 "register_operand" "=x,x,Yv,Yv")
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(neg:TF
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(abs:TF
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(match_operand:TF 1 "vector_operand" "0,xBm,Yv,m"))))
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(use (match_operand:TF 2 "vector_operand" "xBm,0,Yvm,Yv"))]
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"TARGET_SSE"
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"#"
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[(set_attr "isa" "noavx,noavx,avx,avx")])
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(define_expand "<code><mode>2"
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[(set (match_operand:X87MODEF 0 "register_operand")
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(absneg:X87MODEF (match_operand:X87MODEF 1 "register_operand")))]
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@ -9553,6 +9563,48 @@
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[(const_int 0)]
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"ix86_split_fp_absneg_operator (<CODE>, <MODE>mode, operands); DONE;")
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(define_insn "*nabs<mode>2_1"
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[(set (match_operand:MODEF 0 "register_operand" "=x,x,Yv")
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(neg:MODEF
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(abs:MODEF
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(match_operand:MODEF 1 "register_operand" "0,x,Yv"))))
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(use (match_operand:<ssevecmode> 2 "vector_operand" "xBm,0,Yvm"))]
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"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
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"#"
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[(set_attr "isa" "noavx,noavx,avx")])
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(define_split
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[(set (match_operand:SSEMODEF 0 "sse_reg_operand")
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(neg:SSEMODEF
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(abs:SSEMODEF
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(match_operand:SSEMODEF 1 "vector_operand"))))
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(use (match_operand:<ssevecmodef> 2 "vector_operand"))]
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"((SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
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|| (TARGET_SSE && (<MODE>mode == TFmode)))
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&& reload_completed"
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[(set (match_dup 0) (match_dup 3))]
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{
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machine_mode mode = <MODE>mode;
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machine_mode vmode = <ssevecmodef>mode;
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operands[0] = lowpart_subreg (vmode, operands[0], mode);
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operands[1] = lowpart_subreg (vmode, operands[1], mode);
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if (TARGET_AVX)
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{
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if (MEM_P (operands[1]))
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std::swap (operands[1], operands[2]);
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}
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else
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{
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if (operands_match_p (operands[0], operands[2]))
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std::swap (operands[1], operands[2]);
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}
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operands[3]
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= gen_rtx_fmt_ee (IOR, vmode, operands[1], operands[2]);
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})
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;; Conditionalize these after reload. If they match before reload, we
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;; lose the clobber and ability to use integer instructions.
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@ -1748,6 +1748,33 @@
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}
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[(set_attr "isa" "noavx,noavx,avx,avx")])
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(define_insn_and_split "*nabs<mode>2"
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[(set (match_operand:VF 0 "register_operand" "=x,x,v,v")
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(neg:VF
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(abs:VF
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(match_operand:VF 1 "vector_operand" "0,xBm,v,m"))))
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(use (match_operand:VF 2 "vector_operand" "xBm,0,vm,v"))]
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"TARGET_SSE"
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"#"
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"&& reload_completed"
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[(set (match_dup 0) (match_dup 3))]
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{
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if (TARGET_AVX)
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{
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if (MEM_P (operands[1]))
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std::swap (operands[1], operands[2]);
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}
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else
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{
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if (operands_match_p (operands[0], operands[2]))
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std::swap (operands[1], operands[2]);
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}
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operands[3]
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= gen_rtx_fmt_ee (IOR, <MODE>mode, operands[1], operands[2]);
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}
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[(set_attr "isa" "noavx,noavx,avx,avx")])
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(define_expand "<plusminus_insn><mode>3<mask_name><round_name>"
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[(set (match_operand:VF 0 "register_operand")
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(plusminus:VF
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@ -1,3 +1,8 @@
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2019-06-17 Uroš Bizjak <ubizjak@gmail.com>
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PR target/62055
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* gcc.target/i386/fnabs.c: New test.
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2019-06-17 Marek Polacek <polacek@redhat.com>
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PR c++/83820 - excessive attribute arguments not detected.
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@ -22,7 +27,7 @@
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2019-06-16 Jozef Lawrynowicz <jozef.l@mittosystems.com>
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* lib/target-supports.exp: Add check_effective_target_longlong64.
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* lib/target-supports.exp: Add check_effective_target_longlong64.
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2019-06-16 Jan Hubicka <hubicka@ucw.cz>
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21
gcc/testsuite/gcc.target/i386/fnabs.c
Normal file
21
gcc/testsuite/gcc.target/i386/fnabs.c
Normal file
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@ -0,0 +1,21 @@
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/* PR target/62055 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -msse2 -mfpmath=sse" } */
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float testf (float a)
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{
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return -__builtin_fabsf (a);
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}
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double test (double a)
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{
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return -__builtin_fabs (a);
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}
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__float128 testq (__float128 a)
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{
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return -__builtin_fabsq (a);
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}
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/* { dg-final { scan-assembler-times "\tv?orp\[sd\]\[ \t\]" 2 } } */
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/* { dg-final { scan-assembler-times "\tv?por\[ \t\]" 1 } } */
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