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nvptx.c (nvptx_output_call_insn): Expect hard regs.

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* config/nvptx/nvptx.c (nvptx_output_call_insn): Expect hard regs.
	* config/nvptx/nvptx.md (nvptx_reg_or_mem_operand): Rename to ...
	(nvptx_nonimmediate_operand): ... here.  Update all uses.
	(call_insn_operand): Use REG_P.
	(call_operation): Allow hard regs.

From-SVN: r231972
This commit is contained in:
Nathan Sidwell 2015-12-28 13:38:10 +00:00 • committed by Nathan Sidwell
parent bcdb352b2c
commit a02d84b6f8
3 changed files with 25 additions and 21 deletions
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8
gcc/ChangeLog
View file

@ -1,3 +1,11 @@
2015-12-28 Nathan Sidwell <nathan@acm.org>
* config/nvptx/nvptx.c (nvptx_output_call_insn): Expect hard regs.
* config/nvptx/nvptx.md (nvptx_reg_or_mem_operand): Rename to ...
(nvptx_nonimmediate_operand): ... here. Update all uses.
(call_insn_operand): Use REG_P.
(call_operation): Allow hard regs.
2015-12-25 Jan Hubicka <hubicka@ucw.cz>
* ipa-visibility.c (function_and_variable_visibility): Do not

12
gcc/config/nvptx/nvptx.c
View file

@ -1808,14 +1808,14 @@ nvptx_output_call_insn (rtx_insn *insn, rtx result, rtx callee)
{
rtx t = XEXP (XVECEXP (pat, 0, argno), 0);
machine_mode mode = GET_MODE (t);
const char *ptx_type = nvptx_ptx_type_from_mode (mode, false);
/* Mode splitting has already been done. */
fprintf (asm_out_file, "\t\t.param%s %%out_arg%d%s;\n",
nvptx_ptx_type_from_mode (mode, false), argno,
mode == QImode || mode == HImode ? "[1]" : "");
fprintf (asm_out_file, "\t\tst.param%s [%%out_arg%d], %%r%d;\n",
nvptx_ptx_type_from_mode (mode, false), argno,
REGNO (t));
fprintf (asm_out_file, "\t\t.param%s %%out_arg%d;\n"
"\t\tst.param%s [%%out_arg%d], ",
ptx_type, argno, ptx_type, argno);
output_reg (asm_out_file, REGNO (t), VOIDmode);
fprintf (asm_out_file, ";\n");
}
fprintf (asm_out_file, "\t\tcall ");

26
gcc/config/nvptx/nvptx.md
View file

@ -69,7 +69,7 @@
return register_operand (op, mode);
})
(define_predicate "nvptx_reg_or_mem_operand"
(define_predicate "nvptx_nonimmediate_operand"
(match_code "mem,reg")
{
return (REG_P (op) ? register_operand (op, mode)
@ -104,7 +104,7 @@
(define_predicate "call_insn_operand"
(match_code "symbol_ref,reg")
{
return GET_CODE (op) != SYMBOL_REF || SYMBOL_REF_FUNCTION_P (op);
return REG_P (op) || SYMBOL_REF_FUNCTION_P (op);
})
;; Return true if OP is a call with parallel USEs of the argument
@ -118,11 +118,7 @@
{
rtx elt = XVECEXP (op, 0, i);
if (GET_CODE (elt) != USE
|| GET_CODE (XEXP (elt, 0)) != REG
|| XEXP (elt, 0) == frame_pointer_rtx
|| XEXP (elt, 0) == arg_pointer_rtx
|| XEXP (elt, 0) == stack_pointer_rtx)
if (GET_CODE (elt) != USE || !REG_P (XEXP (elt, 0)))
return false;
}
return true;
@ -237,7 +233,7 @@
(define_insn "zero_extendqihi2"
[(set (match_operand:HI 0 "nvptx_register_operand" "=R,R")
(zero_extend:HI (match_operand:QI 1 "nvptx_reg_or_mem_operand" "R,m")))]
(zero_extend:HI (match_operand:QI 1 "nvptx_nonimmediate_operand" "R,m")))]
""
"@
%.\\tcvt.u16.u%T1\\t%0, %1;
@ -246,7 +242,7 @@
(define_insn "zero_extend<mode>si2"
[(set (match_operand:SI 0 "nvptx_register_operand" "=R,R")
(zero_extend:SI (match_operand:QHIM 1 "nvptx_reg_or_mem_operand" "R,m")))]
(zero_extend:SI (match_operand:QHIM 1 "nvptx_nonimmediate_operand" "R,m")))]
""
"@
%.\\tcvt.u32.u%T1\\t%0, %1;
@ -255,7 +251,7 @@
(define_insn "zero_extend<mode>di2"
[(set (match_operand:DI 0 "nvptx_register_operand" "=R,R")
(zero_extend:DI (match_operand:QHSIM 1 "nvptx_reg_or_mem_operand" "R,m")))]
(zero_extend:DI (match_operand:QHSIM 1 "nvptx_nonimmediate_operand" "R,m")))]
""
"@
%.\\tcvt.u64.u%T1\\t%0, %1;
@ -264,7 +260,7 @@
(define_insn "extend<mode>si2"
[(set (match_operand:SI 0 "nvptx_register_operand" "=R,R")
(sign_extend:SI (match_operand:QHIM 1 "nvptx_reg_or_mem_operand" "R,m")))]
(sign_extend:SI (match_operand:QHIM 1 "nvptx_nonimmediate_operand" "R,m")))]
""
"@
%.\\tcvt.s32.s%T1\\t%0, %1;
@ -273,7 +269,7 @@
(define_insn "extend<mode>di2"
[(set (match_operand:DI 0 "nvptx_register_operand" "=R,R")
(sign_extend:DI (match_operand:QHSIM 1 "nvptx_reg_or_mem_operand" "R,m")))]
(sign_extend:DI (match_operand:QHSIM 1 "nvptx_nonimmediate_operand" "R,m")))]
""
"@
%.\\tcvt.s64.s%T1\\t%0, %1;
@ -281,7 +277,7 @@
[(set_attr "subregs_ok" "true")])
(define_insn "trunchiqi2"
[(set (match_operand:QI 0 "nvptx_reg_or_mem_operand" "=R,m")
[(set (match_operand:QI 0 "nvptx_nonimmediate_operand" "=R,m")
(truncate:QI (match_operand:HI 1 "nvptx_register_operand" "R,R")))]
""
"@
@ -290,7 +286,7 @@
[(set_attr "subregs_ok" "true")])
(define_insn "truncsi<mode>2"
[(set (match_operand:QHIM 0 "nvptx_reg_or_mem_operand" "=R,m")
[(set (match_operand:QHIM 0 "nvptx_nonimmediate_operand" "=R,m")
(truncate:QHIM (match_operand:SI 1 "nvptx_register_operand" "R,R")))]
""
"@
@ -299,7 +295,7 @@
[(set_attr "subregs_ok" "true")])
(define_insn "truncdi<mode>2"
[(set (match_operand:QHSIM 0 "nvptx_reg_or_mem_operand" "=R,m")
[(set (match_operand:QHSIM 0 "nvptx_nonimmediate_operand" "=R,m")
(truncate:QHSIM (match_operand:DI 1 "nvptx_register_operand" "R,R")))]
""
"@