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arm.h (arm_class_likely_spilled_p): Check against LO_REGS only for Thumb-1.

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2011-03-06  Andrew Stubbs  <ams@codesourcery.com>
	    Julian Brown  <julian@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>

	gcc/
	* config/arm/arm.h (arm_class_likely_spilled_p): Check against
	LO_REGS only for Thumb-1.
	(MODE_BASE_REG_CLASS): Restrict base registers to those which can
	be used in short instructions when optimising for size on Thumb-2.



Co-Authored-By: Julian Brown <julian@codesourcery.com>
Co-Authored-By: Mark Shinwell <shinwell@codesourcery.com>

From-SVN: r172032
This commit is contained in:
Andrew Stubbs 2011-04-06 09:52:52 +00:00 • committed by Andrew Stubbs
parent 33abfb6bdb
commit 9adc580c20
3 changed files with 17 additions and 6 deletions
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9
gcc/ChangeLog
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@ -1,3 +1,12 @@
2011-03-06 Andrew Stubbs <ams@codesourcery.com>
Julian Brown <julian@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* config/arm/arm.h (arm_class_likely_spilled_p): Check against
LO_REGS only for Thumb-1.
(MODE_BASE_REG_CLASS): Restrict base registers to those which can
be used in short instructions when optimising for size on Thumb-2.
2011-04-06 Eric Botcazou <ebotcazou@adacore.com>
* gimple-low.c (lower_gimple_return): When not optimizing, force labels

12
gcc/config/arm/arm.c
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@ -22333,14 +22333,16 @@ arm_preferred_simd_mode (enum machine_mode mode)
/* Implement TARGET_CLASS_LIKELY_SPILLED_P.
We need to define this for LO_REGS on thumb. Otherwise we can end up
using r0-r4 for function arguments, r7 for the stack frame and don't
have enough left over to do doubleword arithmetic. */
We need to define this for LO_REGS on Thumb-1. Otherwise we can end up
using r0-r4 for function arguments, r7 for the stack frame and don't have
enough left over to do doubleword arithmetic. For Thumb-2 all the
potentially problematic instructions accept high registers so this is not
necessary. Care needs to be taken to avoid adding new Thumb-2 patterns
that require many low registers. */
static bool
arm_class_likely_spilled_p (reg_class_t rclass)
{
if ((TARGET_THUMB && rclass == LO_REGS)
if ((TARGET_THUMB1 && rclass == LO_REGS)
|| rclass == CC_REG)
return true;

2
gcc/config/arm/arm.h
View file

@ -1165,7 +1165,7 @@ enum reg_class
when addressing quantities in QI or HI mode; if we don't know the
mode, then we must be conservative. */
#define MODE_BASE_REG_CLASS(MODE) \
(TARGET_32BIT ? CORE_REGS : \
(TARGET_ARM || (TARGET_THUMB2 && !optimize_size) ? CORE_REGS : \
(((MODE) == SImode) ? BASE_REGS : LO_REGS))
/* For Thumb we can not support SP+reg addressing, so we return LO_REGS