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[AArch64] Relax modes_tieable_p and cannot_change_mode_class

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gcc/

	* config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
	* config/aarch64/aarch64.c
	(aarch64_cannot_change_mode_class): Weaken conditions.
	(aarch64_modes_tieable_p): New.
	* config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.

From-SVN: r209878
This commit is contained in:
James Greenhalgh 2014-04-28 21:00:38 +00:00 • committed by James Greenhalgh
parent bf245bf484
commit 97e1ad78bc
4 changed files with 43 additions and 3 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
* config/aarch64/aarch64.c
(aarch64_cannot_change_mode_class): Weaken conditions.
(aarch64_modes_tieable_p): New.
* config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
2014-04-28 Pat Haugen <pthaugen@us.ibm.com> 2014-04-28 Pat Haugen <pthaugen@us.ibm.com>
* config/rs6000/sync.md (AINT mode_iterator): Move definition. * config/rs6000/sync.md (AINT mode_iterator): Move definition.

2
gcc/config/aarch64/aarch64-protos.h
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@ -175,6 +175,8 @@ bool aarch64_is_extend_from_extract (enum machine_mode, rtx, rtx);
bool aarch64_is_long_call_p (rtx); bool aarch64_is_long_call_p (rtx);
bool aarch64_label_mentioned_p (rtx); bool aarch64_label_mentioned_p (rtx);
bool aarch64_legitimate_pic_operand_p (rtx); bool aarch64_legitimate_pic_operand_p (rtx);
bool aarch64_modes_tieable_p (enum machine_mode mode1,
enum machine_mode mode2);
bool aarch64_move_imm (HOST_WIDE_INT, enum machine_mode); bool aarch64_move_imm (HOST_WIDE_INT, enum machine_mode);
bool aarch64_mov_operand_p (rtx, enum aarch64_symbol_context, bool aarch64_mov_operand_p (rtx, enum aarch64_symbol_context,
enum machine_mode); enum machine_mode);

33
gcc/config/aarch64/aarch64.c
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@ -8316,7 +8316,8 @@ aarch64_cannot_change_mode_class (enum machine_mode from,
/* Limited combinations of subregs are safe on FPREGs. Particularly, /* Limited combinations of subregs are safe on FPREGs. Particularly,
1. Vector Mode to Scalar mode where 1 unit of the vector is accessed. 1. Vector Mode to Scalar mode where 1 unit of the vector is accessed.
2. Scalar to Scalar for integer modes or same size float modes. 2. Scalar to Scalar for integer modes or same size float modes.
3. Vector to Vector modes. */ 3. Vector to Vector modes.
4. On little-endian only, Vector-Structure to Vector modes. */
if (GET_MODE_SIZE (from) > GET_MODE_SIZE (to)) if (GET_MODE_SIZE (from) > GET_MODE_SIZE (to))
{ {
if (aarch64_vector_mode_supported_p (from) if (aarch64_vector_mode_supported_p (from)
@ -8332,11 +8333,41 @@ aarch64_cannot_change_mode_class (enum machine_mode from,
if (aarch64_vector_mode_supported_p (from) if (aarch64_vector_mode_supported_p (from)
&& aarch64_vector_mode_supported_p (to)) && aarch64_vector_mode_supported_p (to))
return false; return false;
/* Within an vector structure straddling multiple vector registers
we are in a mixed-endian representation. As such, we can't
easily change modes for BYTES_BIG_ENDIAN. Otherwise, we can
switch between vectors and vector structures cheaply. */
if (!BYTES_BIG_ENDIAN)
if ((aarch64_vector_mode_supported_p (from)
&& aarch64_vect_struct_mode_p (to))
|| (aarch64_vector_mode_supported_p (to)
&& aarch64_vect_struct_mode_p (from)))
return false;
} }
return true; return true;
} }
/* Implement MODES_TIEABLE_P. */
bool
aarch64_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2)
{
if (GET_MODE_CLASS (mode1) == GET_MODE_CLASS (mode2))
return true;
/* We specifically want to allow elements of "structure" modes to
be tieable to the structure. This more general condition allows
other rarer situations too. */
if (TARGET_SIMD
&& aarch64_vector_mode_p (mode1)
&& aarch64_vector_mode_p (mode2))
return true;
return false;
}
#undef TARGET_ADDRESS_COST #undef TARGET_ADDRESS_COST
#define TARGET_ADDRESS_COST aarch64_address_cost #define TARGET_ADDRESS_COST aarch64_address_cost

3
gcc/config/aarch64/aarch64.h
View file

@ -365,8 +365,7 @@ extern unsigned long aarch64_tune_flags;
#define HARD_REGNO_MODE_OK(REGNO, MODE) aarch64_hard_regno_mode_ok (REGNO, MODE) #define HARD_REGNO_MODE_OK(REGNO, MODE) aarch64_hard_regno_mode_ok (REGNO, MODE)
#define MODES_TIEABLE_P(MODE1, MODE2) \ #define MODES_TIEABLE_P(MODE1, MODE2) aarch64_modes_tieable_p (MODE1, MODE2)
(GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
#define DWARF2_UNWIND_INFO 1 #define DWARF2_UNWIND_INFO 1