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middle-end/113622 - allow .VEC_SET and .VEC_EXTRACT for global hard regs

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The following expands .VEC_SET and .VEC_EXTRACT instruction selection
to global hard registers, not only automatic variables (possibly)
promoted to registers.  This can avoid some ICEs later and create
better code.

	PR middle-end/113622
	* gimple-isel.cc (gimple_expand_vec_set_extract_expr):
	Also allow DECL_HARD_REGISTER variables.

	* gcc.target/i386/pr113622-1.c: New testcase.
This commit is contained in:
Richard Biener 2024-01-29 09:47:31 +01:00
parent d41a1873f3
commit 96bc048d78
2 changed files with 14 additions and 1 deletions
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3
gcc/gimple-isel.cc
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@ -104,7 +104,8 @@ gimple_expand_vec_set_extract_expr (struct function *fun,
machine_mode outermode = TYPE_MODE (TREE_TYPE (view_op0));
machine_mode extract_mode = TYPE_MODE (TREE_TYPE (ref));
if (auto_var_in_fn_p (view_op0, fun->decl)
if ((auto_var_in_fn_p (view_op0, fun->decl)
|| (VAR_P (view_op0) && DECL_HARD_REGISTER (view_op0)))
&& !TREE_ADDRESSABLE (view_op0)
&& ((!is_extract && can_vec_set_var_idx_p (outermode))
|| (is_extract

12
gcc/testsuite/gcc.target/i386/pr113622-1.c Normal file
View file

@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mavx512f -w" } */
typedef float __attribute__ ((vector_size (64))) vec;
register vec a asm("zmm5"), b asm("zmm6"), c asm("zmm7");
void
test (void)
{
for (int i = 0; i < 8; i++)
c[i] = a[i] < b[i] ? 0.1 : 0.2;
}